From: Eric Dong <eric.dong@intel.com>
To: edk2-devel@lists.01.org
Cc: Jiewen Yao <jiewen.yao@intel.com>, Ruiyu Ni <ruiyu.ni@intel.com>
Subject: [Patch] UefiCpuPkg/PiSmmCpuDxeSmm: Combine INIT-SIPI-SIPI.
Date: Thu, 28 Sep 2017 16:49:06 +0800 [thread overview]
Message-ID: <1506588546-7636-1-git-send-email-eric.dong@intel.com> (raw)
In S3 resume path, current implementation do 2 separate INIT-SIPI-SIPI,
this is not necessary. This change combine these 2 INIT-SIPI-SIPI to 1
and add CpuPause between them.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
---
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 112 +++++++++++++++-----------------------
1 file changed, 44 insertions(+), 68 deletions(-)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index 9404501..6dc4886 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -39,6 +39,11 @@ typedef struct {
//
SPIN_LOCK *mMemoryMappedLock = NULL;
+//
+// Signal that SMM BASE relocation is complete.
+//
+volatile BOOLEAN mInitApsAfterSmmBaseReloc;
+
/**
Get starting address and size of the rendezvous entry for APs.
Information for fixing a jump instruction in the code is also returned.
@@ -343,62 +348,59 @@ SetProcessorRegister (
}
/**
- AP initialization before SMBASE relocation in the S3 boot path.
+ Set registers for the current processor.
+
+ @param RegisterTableList The input registers list.
+
**/
VOID
-EarlyMPRendezvousProcedure (
- VOID
+SetRegisters (
+ IN CPU_REGISTER_TABLE *RegisterTableList
)
{
- CPU_REGISTER_TABLE *RegisterTableList;
UINT32 InitApicId;
UINTN Index;
- LoadMtrrData (mAcpiCpuData.MtrrTable);
-
- //
- // Find processor number for this CPU.
- //
- RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable;
InitApicId = GetInitialApicId ();
for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) {
if (RegisterTableList[Index].InitialApicId == InitApicId) {
SetProcessorRegister (&RegisterTableList[Index]);
- break;
+ return;
}
}
-
- //
- // Count down the number with lock mechanism.
- //
- InterlockedDecrement (&mNumberToFinish);
}
/**
- AP initialization after SMBASE relocation in the S3 boot path.
+ AP initialization before then after SMBASE relocation in the S3 boot path.
**/
VOID
MPRendezvousProcedure (
VOID
)
{
- CPU_REGISTER_TABLE *RegisterTableList;
- UINT32 InitApicId;
- UINTN Index;
UINTN TopOfStack;
UINT8 Stack[128];
+ LoadMtrrData (mAcpiCpuData.MtrrTable);
+
+ SetRegisters ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable);
+
+ //
+ // Count down the number with lock mechanism.
+ //
+ InterlockedDecrement (&mNumberToFinish);
+
+ //
+ // Wait for BSP to signal SMM Base relocation done.
+ //
+ while (!mInitApsAfterSmmBaseReloc) {
+ CpuPause ();
+ }
+
ProgramVirtualWireMode ();
DisableLvtInterrupts ();
- RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable;
- InitApicId = GetInitialApicId ();
- for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) {
- if (RegisterTableList[Index].InitialApicId == InitApicId) {
- SetProcessorRegister (&RegisterTableList[Index]);
- break;
- }
- }
+ SetRegisters ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable);
//
// Place AP into the safe code, count down the number with lock mechanism in the safe code.
@@ -473,34 +475,25 @@ PrepareApStartupVector (
**/
VOID
-EarlyInitializeCpu (
+InitializeCpuBeforeRebase (
VOID
)
{
- CPU_REGISTER_TABLE *RegisterTableList;
- UINT32 InitApicId;
- UINTN Index;
-
LoadMtrrData (mAcpiCpuData.MtrrTable);
- //
- // Find processor number for this CPU.
- //
- RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable;
- InitApicId = GetInitialApicId ();
- for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) {
- if (RegisterTableList[Index].InitialApicId == InitApicId) {
- SetProcessorRegister (&RegisterTableList[Index]);
- break;
- }
- }
+ SetRegisters ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable);
ProgramVirtualWireMode ();
PrepareApStartupVector (mAcpiCpuData.StartupVector);
mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1;
- mExchangeInfo->ApFunction = (VOID *) (UINTN) EarlyMPRendezvousProcedure;
+ mExchangeInfo->ApFunction = (VOID *) (UINTN) MPRendezvousProcedure;
+
+ //
+ // Execute code for before SmmBaseReloc. Note: This flag is maintained across S3 boots.
+ //
+ mInitApsAfterSmmBaseReloc = FALSE;
//
// Send INIT IPI - SIPI to all APs
@@ -520,35 +513,18 @@ EarlyInitializeCpu (
**/
VOID
-InitializeCpu (
+InitializeCpuAfterRebase (
VOID
)
{
- CPU_REGISTER_TABLE *RegisterTableList;
- UINT32 InitApicId;
- UINTN Index;
-
- RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable;
- InitApicId = GetInitialApicId ();
- for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) {
- if (RegisterTableList[Index].InitialApicId == InitApicId) {
- SetProcessorRegister (&RegisterTableList[Index]);
- break;
- }
- }
+ SetRegisters ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable);
mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1;
- //
- // StackStart was updated when APs were waken up in EarlyInitializeCpu.
- // Re-initialize StackAddress to original beginning address.
- //
- mExchangeInfo->StackStart = (VOID *) (UINTN) mAcpiCpuData.StackAddress;
- mExchangeInfo->ApFunction = (VOID *) (UINTN) MPRendezvousProcedure;
//
- // Send INIT IPI - SIPI to all APs
+ // Signal that SMM base relocation is complete and to continue initialization.
//
- SendInitSipiSipiAllExcludingSelf ((UINT32)mAcpiCpuData.StartupVector);
+ mInitApsAfterSmmBaseReloc = TRUE;
while (mNumberToFinish > 0) {
CpuPause ();
@@ -659,7 +635,7 @@ SmmRestoreCpu (
//
// First time microcode load and restore MTRRs
//
- EarlyInitializeCpu ();
+ InitializeCpuBeforeRebase ();
}
//
@@ -674,7 +650,7 @@ SmmRestoreCpu (
//
// Restore MSRs for BSP and all APs
//
- InitializeCpu ();
+ InitializeCpuAfterRebase ();
}
//
--
2.7.0.windows.1
reply other threads:[~2017-09-28 8:45 UTC|newest]
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