From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=eric.dong@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E0EE621F2AF86 for ; Thu, 28 Sep 2017 02:12:02 -0700 (PDT) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP; 28 Sep 2017 02:15:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,449,1500966000"; d="scan'208";a="154305578" Received: from ydong10-win10.ccr.corp.intel.com ([10.239.158.57]) by orsmga005.jf.intel.com with ESMTP; 28 Sep 2017 02:15:12 -0700 From: Eric Dong To: edk2-devel@lists.01.org Cc: Jiewen Yao , Ruiyu Ni Date: Thu, 28 Sep 2017 17:15:07 +0800 Message-Id: <1506590107-7324-3-git-send-email-eric.dong@intel.com> X-Mailer: git-send-email 2.7.0.windows.1 In-Reply-To: <1506590107-7324-1-git-send-email-eric.dong@intel.com> References: <1506590107-7324-1-git-send-email-eric.dong@intel.com> Subject: [Patch 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to avoid duplicated code. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 28 Sep 2017 09:12:03 -0000 Refine code to avoid duplicate code to set processor register. Cc: Jiewen Yao Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 78 ++++++++++----------------------------- 1 file changed, 20 insertions(+), 58 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index ae4b516..500a0e2 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -208,18 +208,28 @@ Returns: This function programs registers for the calling processor. - @param RegisterTable Pointer to register table of the running processor. + @param RegisterTableList Pointer to register table of the running processor. **/ VOID SetProcessorRegister ( - IN CPU_REGISTER_TABLE *RegisterTable + IN CPU_REGISTER_TABLE *RegisterTableList ) { CPU_REGISTER_TABLE_ENTRY *RegisterTableEntry; UINTN Index; UINTN Value; SPIN_LOCK *MsrSpinLock; + UINT32 InitApicId; + CPU_REGISTER_TABLE *RegisterTable; + + InitApicId = GetInitialApicId (); + for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { + if (RegisterTableList[Index].InitialApicId == InitApicId) { + RegisterTable = &RegisterTableList[Index]; + break; + } + } // // Traverse Register Table of this logical processor @@ -347,8 +357,6 @@ SetProcessorRegister ( } } - - /** AP initialization before then after SMBASE relocation in the S3 boot path. **/ @@ -357,26 +365,12 @@ MPRendezvousProcedure ( VOID ) { - CPU_REGISTER_TABLE *RegisterTableList; - UINT32 InitApicId; - UINTN Index; UINTN TopOfStack; UINT8 Stack[128]; LoadMtrrData (mAcpiCpuData.MtrrTable); - // - // Find processor number for this CPU. - // - RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable; - InitApicId = GetInitialApicId (); - for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { - if (RegisterTableList[Index].InitialApicId == InitApicId) { - SetProcessorRegister (&RegisterTableList[Index]); - break; - } - } - + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable); // // Count down the number with lock mechanism. @@ -393,14 +387,7 @@ MPRendezvousProcedure ( ProgramVirtualWireMode (); DisableLvtInterrupts (); - RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable; - InitApicId = GetInitialApicId (); - for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { - if (RegisterTableList[Index].InitialApicId == InitApicId) { - SetProcessorRegister (&RegisterTableList[Index]); - break; - } - } + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable); // // Place AP into the safe code, count down the number with lock mechanism in the safe code. @@ -475,27 +462,13 @@ PrepareApStartupVector ( **/ VOID -EarlyInitializeCpu ( +InitializeCpuBeforeRebase ( VOID ) { - CPU_REGISTER_TABLE *RegisterTableList; - UINT32 InitApicId; - UINTN Index; - LoadMtrrData (mAcpiCpuData.MtrrTable); - // - // Find processor number for this CPU. - // - RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable; - InitApicId = GetInitialApicId (); - for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { - if (RegisterTableList[Index].InitialApicId == InitApicId) { - SetProcessorRegister (&RegisterTableList[Index]); - break; - } - } + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable); ProgramVirtualWireMode (); @@ -527,22 +500,11 @@ EarlyInitializeCpu ( **/ VOID -InitializeCpu ( +InitializeCpuAfterRebase ( VOID ) { - CPU_REGISTER_TABLE *RegisterTableList; - UINT32 InitApicId; - UINTN Index; - - RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable; - InitApicId = GetInitialApicId (); - for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { - if (RegisterTableList[Index].InitialApicId == InitApicId) { - SetProcessorRegister (&RegisterTableList[Index]); - break; - } - } + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable); mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1; @@ -660,7 +622,7 @@ SmmRestoreCpu ( // // First time microcode load and restore MTRRs // - EarlyInitializeCpu (); + InitializeCpuBeforeRebase (); } // @@ -675,7 +637,7 @@ SmmRestoreCpu ( // // Restore MSRs for BSP and all APs // - InitializeCpu (); + InitializeCpuAfterRebase (); } // -- 2.7.0.windows.1