* [Patch v2 0/2] UefiCpuPkg/PiSmmCpuDxeSmm: Enhance S3 code. @ 2017-09-29 0:26 Eric Dong 2017-09-29 0:26 ` [Patch v2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Combine INIT-SIPI-SIPI Eric Dong 2017-09-29 0:26 ` [Patch v2 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to avoid duplicated code Eric Dong 0 siblings, 2 replies; 5+ messages in thread From: Eric Dong @ 2017-09-29 0:26 UTC (permalink / raw) To: edk2-devel Combine INIT-SIPI-SIPI code and remove the duplicate code. V2: Change patch 2 to includes: Change function parameter to avoid touch global info in function. Enhance function name, make it more user friendly Eric Dong (2): UefiCpuPkg/PiSmmCpuDxeSmm: Combine INIT-SIPI-SIPI. UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to avoid duplicated code. UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 123 +++++++++++++------------------------- 1 file changed, 43 insertions(+), 80 deletions(-) -- 2.7.0.windows.1 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [Patch v2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Combine INIT-SIPI-SIPI. 2017-09-29 0:26 [Patch v2 0/2] UefiCpuPkg/PiSmmCpuDxeSmm: Enhance S3 code Eric Dong @ 2017-09-29 0:26 ` Eric Dong 2017-09-29 0:55 ` Ni, Ruiyu 2017-09-29 0:26 ` [Patch v2 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to avoid duplicated code Eric Dong 1 sibling, 1 reply; 5+ messages in thread From: Eric Dong @ 2017-09-29 0:26 UTC (permalink / raw) To: edk2-devel; +Cc: Jiewen Yao, Ruiyu Ni In S3 resume path, current implementation do 2 separate INIT-SIPI-SIPI, this is not necessary. This change combine these 2 INIT-SIPI-SIPI to 1 and add CpuPause between them. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 51 ++++++++++++++++++++------------------- 1 file changed, 26 insertions(+), 25 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index 9404501..ae4b516 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -39,6 +39,11 @@ typedef struct { // SPIN_LOCK *mMemoryMappedLock = NULL; +// +// Signal that SMM BASE relocation is complete. +// +volatile BOOLEAN mInitApsAfterSmmBaseReloc; + /** Get starting address and size of the rendezvous entry for APs. Information for fixing a jump instruction in the code is also returned. @@ -342,17 +347,21 @@ SetProcessorRegister ( } } + + /** - AP initialization before SMBASE relocation in the S3 boot path. + AP initialization before then after SMBASE relocation in the S3 boot path. **/ VOID -EarlyMPRendezvousProcedure ( +MPRendezvousProcedure ( VOID ) { CPU_REGISTER_TABLE *RegisterTableList; UINT32 InitApicId; UINTN Index; + UINTN TopOfStack; + UINT8 Stack[128]; LoadMtrrData (mAcpiCpuData.MtrrTable); @@ -368,25 +377,18 @@ EarlyMPRendezvousProcedure ( } } + // // Count down the number with lock mechanism. // InterlockedDecrement (&mNumberToFinish); -} -/** - AP initialization after SMBASE relocation in the S3 boot path. -**/ -VOID -MPRendezvousProcedure ( - VOID - ) -{ - CPU_REGISTER_TABLE *RegisterTableList; - UINT32 InitApicId; - UINTN Index; - UINTN TopOfStack; - UINT8 Stack[128]; + // + // Wait for BSP to signal SMM Base relocation done. + // + while (!mInitApsAfterSmmBaseReloc) { + CpuPause (); + } ProgramVirtualWireMode (); DisableLvtInterrupts (); @@ -500,7 +502,12 @@ EarlyInitializeCpu ( PrepareApStartupVector (mAcpiCpuData.StartupVector); mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1; - mExchangeInfo->ApFunction = (VOID *) (UINTN) EarlyMPRendezvousProcedure; + mExchangeInfo->ApFunction = (VOID *) (UINTN) MPRendezvousProcedure; + + // + // Execute code for before SmmBaseReloc. Note: This flag is maintained across S3 boots. + // + mInitApsAfterSmmBaseReloc = FALSE; // // Send INIT IPI - SIPI to all APs @@ -538,17 +545,11 @@ InitializeCpu ( } mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1; - // - // StackStart was updated when APs were waken up in EarlyInitializeCpu. - // Re-initialize StackAddress to original beginning address. - // - mExchangeInfo->StackStart = (VOID *) (UINTN) mAcpiCpuData.StackAddress; - mExchangeInfo->ApFunction = (VOID *) (UINTN) MPRendezvousProcedure; // - // Send INIT IPI - SIPI to all APs + // Signal that SMM base relocation is complete and to continue initialization. // - SendInitSipiSipiAllExcludingSelf ((UINT32)mAcpiCpuData.StartupVector); + mInitApsAfterSmmBaseReloc = TRUE; while (mNumberToFinish > 0) { CpuPause (); -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Patch v2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Combine INIT-SIPI-SIPI. 2017-09-29 0:26 ` [Patch v2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Combine INIT-SIPI-SIPI Eric Dong @ 2017-09-29 0:55 ` Ni, Ruiyu 0 siblings, 0 replies; 5+ messages in thread From: Ni, Ruiyu @ 2017-09-29 0:55 UTC (permalink / raw) To: Dong, Eric, edk2-devel@lists.01.org; +Cc: Yao, Jiewen Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> -----Original Message----- From: Dong, Eric Sent: Friday, September 29, 2017 8:27 AM To: edk2-devel@lists.01.org Cc: Yao, Jiewen <jiewen.yao@intel.com>; Ni, Ruiyu <ruiyu.ni@intel.com> Subject: [Patch v2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Combine INIT-SIPI-SIPI. In S3 resume path, current implementation do 2 separate INIT-SIPI-SIPI, this is not necessary. This change combine these 2 INIT-SIPI-SIPI to 1 and add CpuPause between them. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 51 ++++++++++++++++++++------------------- 1 file changed, 26 insertions(+), 25 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index 9404501..ae4b516 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -39,6 +39,11 @@ typedef struct { // SPIN_LOCK *mMemoryMappedLock = NULL; +// +// Signal that SMM BASE relocation is complete. +// +volatile BOOLEAN mInitApsAfterSmmBaseReloc; + /** Get starting address and size of the rendezvous entry for APs. Information for fixing a jump instruction in the code is also returned. @@ -342,17 +347,21 @@ SetProcessorRegister ( } } + + /** - AP initialization before SMBASE relocation in the S3 boot path. + AP initialization before then after SMBASE relocation in the S3 boot path. **/ VOID -EarlyMPRendezvousProcedure ( +MPRendezvousProcedure ( VOID ) { CPU_REGISTER_TABLE *RegisterTableList; UINT32 InitApicId; UINTN Index; + UINTN TopOfStack; + UINT8 Stack[128]; LoadMtrrData (mAcpiCpuData.MtrrTable); @@ -368,25 +377,18 @@ EarlyMPRendezvousProcedure ( } } + // // Count down the number with lock mechanism. // InterlockedDecrement (&mNumberToFinish); -} -/** - AP initialization after SMBASE relocation in the S3 boot path. -**/ -VOID -MPRendezvousProcedure ( - VOID - ) -{ - CPU_REGISTER_TABLE *RegisterTableList; - UINT32 InitApicId; - UINTN Index; - UINTN TopOfStack; - UINT8 Stack[128]; + // + // Wait for BSP to signal SMM Base relocation done. + // + while (!mInitApsAfterSmmBaseReloc) { + CpuPause (); + } ProgramVirtualWireMode (); DisableLvtInterrupts (); @@ -500,7 +502,12 @@ EarlyInitializeCpu ( PrepareApStartupVector (mAcpiCpuData.StartupVector); mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1; - mExchangeInfo->ApFunction = (VOID *) (UINTN) EarlyMPRendezvousProcedure; + mExchangeInfo->ApFunction = (VOID *) (UINTN) MPRendezvousProcedure; + + // + // Execute code for before SmmBaseReloc. Note: This flag is maintained across S3 boots. + // + mInitApsAfterSmmBaseReloc = FALSE; // // Send INIT IPI - SIPI to all APs @@ -538,17 +545,11 @@ InitializeCpu ( } mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1; - // - // StackStart was updated when APs were waken up in EarlyInitializeCpu. - // Re-initialize StackAddress to original beginning address. - // - mExchangeInfo->StackStart = (VOID *) (UINTN) mAcpiCpuData.StackAddress; - mExchangeInfo->ApFunction = (VOID *) (UINTN) MPRendezvousProcedure; // - // Send INIT IPI - SIPI to all APs + // Signal that SMM base relocation is complete and to continue initialization. // - SendInitSipiSipiAllExcludingSelf ((UINT32)mAcpiCpuData.StartupVector); + mInitApsAfterSmmBaseReloc = TRUE; while (mNumberToFinish > 0) { CpuPause (); -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [Patch v2 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to avoid duplicated code. 2017-09-29 0:26 [Patch v2 0/2] UefiCpuPkg/PiSmmCpuDxeSmm: Enhance S3 code Eric Dong 2017-09-29 0:26 ` [Patch v2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Combine INIT-SIPI-SIPI Eric Dong @ 2017-09-29 0:26 ` Eric Dong 2017-09-29 0:55 ` Ni, Ruiyu 1 sibling, 1 reply; 5+ messages in thread From: Eric Dong @ 2017-09-29 0:26 UTC (permalink / raw) To: edk2-devel; +Cc: Jiewen Yao, Ruiyu Ni V2: Change function parameter to avoid touch global info in function. Enhance function name, make it more user friendly V1: Refine code to avoid duplicate code to set processor register. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 84 +++++++++++---------------------------- 1 file changed, 24 insertions(+), 60 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index ae4b516..ef72b9b 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -208,18 +208,30 @@ Returns: This function programs registers for the calling processor. - @param RegisterTable Pointer to register table of the running processor. + @param RegisterTables Pointer to register table of the running processor. + @param RegisterTableCount Register table count. **/ VOID SetProcessorRegister ( - IN CPU_REGISTER_TABLE *RegisterTable + IN CPU_REGISTER_TABLE *RegisterTables, + IN UINTN RegisterTableCount ) { CPU_REGISTER_TABLE_ENTRY *RegisterTableEntry; UINTN Index; UINTN Value; SPIN_LOCK *MsrSpinLock; + UINT32 InitApicId; + CPU_REGISTER_TABLE *RegisterTable; + + InitApicId = GetInitialApicId (); + for (Index = 0; Index < RegisterTableCount; Index++) { + if (RegisterTables[Index].InitialApicId == InitApicId) { + RegisterTable = &RegisterTables[Index]; + break; + } + } // // Traverse Register Table of this logical processor @@ -347,36 +359,20 @@ SetProcessorRegister ( } } - - /** AP initialization before then after SMBASE relocation in the S3 boot path. **/ VOID -MPRendezvousProcedure ( +InitializeAp ( VOID ) { - CPU_REGISTER_TABLE *RegisterTableList; - UINT32 InitApicId; - UINTN Index; UINTN TopOfStack; UINT8 Stack[128]; LoadMtrrData (mAcpiCpuData.MtrrTable); - // - // Find processor number for this CPU. - // - RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable; - InitApicId = GetInitialApicId (); - for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { - if (RegisterTableList[Index].InitialApicId == InitApicId) { - SetProcessorRegister (&RegisterTableList[Index]); - break; - } - } - + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable, mAcpiCpuData.NumberOfCpus); // // Count down the number with lock mechanism. @@ -393,14 +389,7 @@ MPRendezvousProcedure ( ProgramVirtualWireMode (); DisableLvtInterrupts (); - RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable; - InitApicId = GetInitialApicId (); - for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { - if (RegisterTableList[Index].InitialApicId == InitApicId) { - SetProcessorRegister (&RegisterTableList[Index]); - break; - } - } + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable, mAcpiCpuData.NumberOfCpus); // // Place AP into the safe code, count down the number with lock mechanism in the safe code. @@ -475,34 +464,20 @@ PrepareApStartupVector ( **/ VOID -EarlyInitializeCpu ( +InitializeCpuBeforeRebase ( VOID ) { - CPU_REGISTER_TABLE *RegisterTableList; - UINT32 InitApicId; - UINTN Index; - LoadMtrrData (mAcpiCpuData.MtrrTable); - // - // Find processor number for this CPU. - // - RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable; - InitApicId = GetInitialApicId (); - for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { - if (RegisterTableList[Index].InitialApicId == InitApicId) { - SetProcessorRegister (&RegisterTableList[Index]); - break; - } - } + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable, mAcpiCpuData.NumberOfCpus); ProgramVirtualWireMode (); PrepareApStartupVector (mAcpiCpuData.StartupVector); mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1; - mExchangeInfo->ApFunction = (VOID *) (UINTN) MPRendezvousProcedure; + mExchangeInfo->ApFunction = (VOID *) (UINTN) InitializeAp; // // Execute code for before SmmBaseReloc. Note: This flag is maintained across S3 boots. @@ -527,22 +502,11 @@ EarlyInitializeCpu ( **/ VOID -InitializeCpu ( +InitializeCpuAfterRebase ( VOID ) { - CPU_REGISTER_TABLE *RegisterTableList; - UINT32 InitApicId; - UINTN Index; - - RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable; - InitApicId = GetInitialApicId (); - for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { - if (RegisterTableList[Index].InitialApicId == InitApicId) { - SetProcessorRegister (&RegisterTableList[Index]); - break; - } - } + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable, mAcpiCpuData.NumberOfCpus); mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1; @@ -660,7 +624,7 @@ SmmRestoreCpu ( // // First time microcode load and restore MTRRs // - EarlyInitializeCpu (); + InitializeCpuBeforeRebase (); } // @@ -675,7 +639,7 @@ SmmRestoreCpu ( // // Restore MSRs for BSP and all APs // - InitializeCpu (); + InitializeCpuAfterRebase (); } // -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Patch v2 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to avoid duplicated code. 2017-09-29 0:26 ` [Patch v2 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to avoid duplicated code Eric Dong @ 2017-09-29 0:55 ` Ni, Ruiyu 0 siblings, 0 replies; 5+ messages in thread From: Ni, Ruiyu @ 2017-09-29 0:55 UTC (permalink / raw) To: Dong, Eric, edk2-devel@lists.01.org; +Cc: Yao, Jiewen Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> -----Original Message----- From: Dong, Eric Sent: Friday, September 29, 2017 8:27 AM To: edk2-devel@lists.01.org Cc: Yao, Jiewen <jiewen.yao@intel.com>; Ni, Ruiyu <ruiyu.ni@intel.com> Subject: [Patch v2 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to avoid duplicated code. V2: Change function parameter to avoid touch global info in function. Enhance function name, make it more user friendly V1: Refine code to avoid duplicate code to set processor register. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 84 +++++++++++---------------------------- 1 file changed, 24 insertions(+), 60 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index ae4b516..ef72b9b 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -208,18 +208,30 @@ Returns: This function programs registers for the calling processor. - @param RegisterTable Pointer to register table of the running processor. + @param RegisterTables Pointer to register table of the running processor. + @param RegisterTableCount Register table count. **/ VOID SetProcessorRegister ( - IN CPU_REGISTER_TABLE *RegisterTable + IN CPU_REGISTER_TABLE *RegisterTables, + IN UINTN RegisterTableCount ) { CPU_REGISTER_TABLE_ENTRY *RegisterTableEntry; UINTN Index; UINTN Value; SPIN_LOCK *MsrSpinLock; + UINT32 InitApicId; + CPU_REGISTER_TABLE *RegisterTable; + + InitApicId = GetInitialApicId (); + for (Index = 0; Index < RegisterTableCount; Index++) { + if (RegisterTables[Index].InitialApicId == InitApicId) { + RegisterTable = &RegisterTables[Index]; + break; + } + } // // Traverse Register Table of this logical processor @@ -347,36 +359,20 @@ SetProcessorRegister ( } } - - /** AP initialization before then after SMBASE relocation in the S3 boot path. **/ VOID -MPRendezvousProcedure ( +InitializeAp ( VOID ) { - CPU_REGISTER_TABLE *RegisterTableList; - UINT32 InitApicId; - UINTN Index; UINTN TopOfStack; UINT8 Stack[128]; LoadMtrrData (mAcpiCpuData.MtrrTable); - // - // Find processor number for this CPU. - // - RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable; - InitApicId = GetInitialApicId (); - for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { - if (RegisterTableList[Index].InitialApicId == InitApicId) { - SetProcessorRegister (&RegisterTableList[Index]); - break; - } - } - + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) + mAcpiCpuData.PreSmmInitRegisterTable, mAcpiCpuData.NumberOfCpus); // // Count down the number with lock mechanism. @@ -393,14 +389,7 @@ MPRendezvousProcedure ( ProgramVirtualWireMode (); DisableLvtInterrupts (); - RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable; - InitApicId = GetInitialApicId (); - for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { - if (RegisterTableList[Index].InitialApicId == InitApicId) { - SetProcessorRegister (&RegisterTableList[Index]); - break; - } - } + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) + mAcpiCpuData.RegisterTable, mAcpiCpuData.NumberOfCpus); // // Place AP into the safe code, count down the number with lock mechanism in the safe code. @@ -475,34 +464,20 @@ PrepareApStartupVector ( **/ VOID -EarlyInitializeCpu ( +InitializeCpuBeforeRebase ( VOID ) { - CPU_REGISTER_TABLE *RegisterTableList; - UINT32 InitApicId; - UINTN Index; - LoadMtrrData (mAcpiCpuData.MtrrTable); - // - // Find processor number for this CPU. - // - RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable; - InitApicId = GetInitialApicId (); - for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { - if (RegisterTableList[Index].InitialApicId == InitApicId) { - SetProcessorRegister (&RegisterTableList[Index]); - break; - } - } + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) + mAcpiCpuData.PreSmmInitRegisterTable, mAcpiCpuData.NumberOfCpus); ProgramVirtualWireMode (); PrepareApStartupVector (mAcpiCpuData.StartupVector); mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1; - mExchangeInfo->ApFunction = (VOID *) (UINTN) MPRendezvousProcedure; + mExchangeInfo->ApFunction = (VOID *) (UINTN) InitializeAp; // // Execute code for before SmmBaseReloc. Note: This flag is maintained across S3 boots. @@ -527,22 +502,11 @@ EarlyInitializeCpu ( **/ VOID -InitializeCpu ( +InitializeCpuAfterRebase ( VOID ) { - CPU_REGISTER_TABLE *RegisterTableList; - UINT32 InitApicId; - UINTN Index; - - RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable; - InitApicId = GetInitialApicId (); - for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) { - if (RegisterTableList[Index].InitialApicId == InitApicId) { - SetProcessorRegister (&RegisterTableList[Index]); - break; - } - } + SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) + mAcpiCpuData.RegisterTable, mAcpiCpuData.NumberOfCpus); mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1; @@ -660,7 +624,7 @@ SmmRestoreCpu ( // // First time microcode load and restore MTRRs // - EarlyInitializeCpu (); + InitializeCpuBeforeRebase (); } // @@ -675,7 +639,7 @@ SmmRestoreCpu ( // // Restore MSRs for BSP and all APs // - InitializeCpu (); + InitializeCpuAfterRebase (); } // -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-09-29 0:52 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-09-29 0:26 [Patch v2 0/2] UefiCpuPkg/PiSmmCpuDxeSmm: Enhance S3 code Eric Dong 2017-09-29 0:26 ` [Patch v2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Combine INIT-SIPI-SIPI Eric Dong 2017-09-29 0:55 ` Ni, Ruiyu 2017-09-29 0:26 ` [Patch v2 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to avoid duplicated code Eric Dong 2017-09-29 0:55 ` Ni, Ruiyu
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