From: Heyi Guo <heyi.guo@linaro.org>
To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org,
edk2-devel@lists.01.org, graeme.gregory@linaro.org
Cc: ard.biesheuvel@linaro.org, guoheyi@huawei.com,
wanghuiqiang@huawei.com, huangming23@huawei.com,
zhangjinsong2@huawei.com, mengfanrong@huawei.com, waip23@126.com,
Yan Zhang <zhangyan81@huawei.com>, Heyi Guo <heyi.guo@linaro.org>
Subject: [PATCH edk2-platforms fix bug] Hisilicon/D03/D05: Add AddressTranslationOffset support
Date: Fri, 29 Sep 2017 11:20:48 +0800 [thread overview]
Message-ID: <1506655248-56286-1-git-send-email-heyi.guo@linaro.org> (raw)
From: Yan Zhang <zhangyan81@huawei.com>
Assign valid value to AddressTranslationOffset to support
address translation between domains of CPU and PCIe, which
is need by GOP to enable frame buffer.
This patch fix the bug:
Kernel (4.12, without the vga driver) boot hang with kernel panic
while kernel accesses UEFI GOP frame buffer.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yan Zhang <zhangyan81@huawei.com>
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
---
Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
index b57bd51..55b80aa 100644
--- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
+++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
@@ -2316,6 +2316,7 @@ RootBridgeIoConfiguration (
}
Configuration.SpaceDesp[Index].AddrRangeMax = Configuration.SpaceDesp[Index].AddrRangeMin + PrivateData->ResAllocNode[Index].Length - 1;
Configuration.SpaceDesp[Index].AddrLen = PrivateData->ResAllocNode[Index].Length;
+ Configuration.SpaceDesp[Index].AddrTranslationOffset = PrivateData->MemBase - PrivateData->PciRegionBase;
}
}
--
1.9.1
reply other threads:[~2017-09-29 3:24 UTC|newest]
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