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The new PCDs will allow SMM support on AMD-based x86 systems. 1) PcdCpuSmmSmramSaveStateMapOffset - SMRAM Save State Map Offset. 2) PcdCpuSmmPSDOffset - Processor SMM Descriptor Offset in SMRAM. Cc: Jiewen Yao Cc: Ruiyu Ni Cc: Michael D Kinney Cc: Jordan Justen Cc: Liming Gao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leo Duran --- UefiCpuPkg/UefiCpuPkg.dec | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 3bd8740..c92c56e 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -2,6 +2,7 @@ # This Package provides UEFI compatible CPU modules and libraries. # # Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# # This program and the accompanying materials are licensed and made available under # the terms and conditions of the BSD License which accompanies this distribution. @@ -204,6 +205,14 @@ # @Prompt If CPU features will be initialized during S3 resume. gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitOnS3Resume|FALSE|BOOLEAN|0x0000001D + ## Specifies the Offset of SMRAM Save State Map from SMBASE. + # @Prompt SMRAM Save State Map Offset. + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSmramSaveStateMapOffset|0xFC00|UINT16|0x32132113 + + ## Specifies the PROCESSOR SMM DESCRIPTOR Offset in SMRAM. + # @Prompt SMRAM PSD Offset. + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmPSDOffset|0xFB00|UINT16|0x32132114 + [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] ## Specifies max supported number of Logical Processors. # @Prompt Configure max supported number of Logical Processors -- 2.7.4