From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::232; helo=mail-lf0-x232.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf0-x232.google.com (mail-lf0-x232.google.com [IPv6:2a00:1450:4010:c07::232]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BB0B721F7D4F4 for ; Wed, 11 Oct 2017 08:37:55 -0700 (PDT) Received: by mail-lf0-x232.google.com with SMTP id d10so2560788lfg.11 for ; Wed, 11 Oct 2017 08:41:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LTimKYWTUq+stlmO2jUWw5uumx/gilGp4pE/BMHK9I4=; b=QvYEUJRFoMJOrjmpBFd8NkBLMQU/C/16fxO7T0Tm0Djhwf+99W+zUizThob7MEFhR9 +4835SMtmw+rjBIzVP5ndvuSG++WSm6LLHQnLGw6edi/0N1Pmzv7m3rYvNwrEBnDI76D QJ8CCTJ/HnPYQvx8OPfDUy4q+LRlpYvm/CUYWd/iHpZ9uUBEtj/9PmB6yYnf2Fqth0eK SO7/D/ipAk+/3Ta6HK0CvmguYTUFpFAFaTdX7T5/OonFGPz/5r4a/0BiZ/liyUgAeIiA wzhzHjkrw+V4UhLpjP1ubMtvzD89SN4APpPF8TxgZcdzkFpjD6fqW/Qo/melSqKgFSiK LhaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LTimKYWTUq+stlmO2jUWw5uumx/gilGp4pE/BMHK9I4=; b=ZKYlNMnO04CSpfSSNVQdWgFZjqS9OpH0004o7y/WU6b6NHSnTBIcyva4TrmVwAfwJT VTvXmL5+kDsA9kFm7fXpQQkB0FKbY4NHad3XaCNjerajd1/MsejeQqviJstyTIqgv3KZ OxDKNAWO9OwSWqBH5NGmjPHks2Cqa94nPE48Ru9ly3PBjrhltkAHNAdRMP1M3nIG7UXg /wmhTd/kkUBm4fYHIei8KnI/VrhsKDbkCbsf1JeXTxcK3QtPfnjaDtQZEksABbN5Zwom gX6QwOjl9UiXYgGG82I8DZHLNbwXkwgKxPpoNymuKcVA4wyiAx+ghKuTQGYRlEVnza/o uU0A== X-Gm-Message-State: AMCzsaXH7g1ZwMdZ/Oi/T29G0uhXPapRI6CVXlG+Bc2pBWMsM/RTVjHu ru3zgi7tKrIoEZyGdlJALGv1fP9Z3YI= X-Google-Smtp-Source: AOwi7QBwGf9KMLQmbAxrV5P1S+7WRnsgJMTFAvODh1SBcxfFSqs9Xx7uzty8Odm7myHsAdrISkk8pg== X-Received: by 10.46.68.155 with SMTP id b27mr26046ljf.86.1507736483376; Wed, 11 Oct 2017 08:41:23 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id p15sm160610lje.24.2017.10.11.08.41.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 11 Oct 2017 08:41:22 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com Date: Wed, 11 Oct 2017 17:40:49 +0200 Message-Id: <1507736449-6073-9-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507736449-6073-1-git-send-email-mw@semihalf.com> References: <1507736449-6073-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH 8/8] Marvell/Armada: Add 32-bit ARM support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 11 Oct 2017 15:37:56 -0000 From: Ard Biesheuvel Update the included components and library classes to make this platform build for 32-bit ARM. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Signed-off-by: Marcin Wojtas --- Platform/Marvell/Armada/Armada.dsc.inc | 3 +-- Platform/Marvell/Armada/Armada70x0.dsc | 4 ++-- Platform/Marvell/Armada/Armada70x0.fdf | 2 +- 3 files changed, 4 insertions(+), 5 deletions(-) diff --git a/Platform/Marvell/Armada/Armada.dsc.inc b/Platform/Marvell/Armada/Armada.dsc.inc index b0a8240..b9fc384 100644 --- a/Platform/Marvell/Armada/Armada.dsc.inc +++ b/Platform/Marvell/Armada/Armada.dsc.inc @@ -132,7 +132,6 @@ CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf -[LibraryClasses.AARCH64] ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf @@ -362,7 +361,7 @@ # ARM Pcds gArmTokenSpaceGuid.PcdSystemMemoryBase|0 gArmTokenSpaceGuid.PcdSystemMemorySize|0x40000000 - gArmTokenSpaceGuid.PcdArmScr|0x531 + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|36 # Secure region reservation gMarvellTokenSpaceGuid.PcdSecureRegionBase|0x4000000 diff --git a/Platform/Marvell/Armada/Armada70x0.dsc b/Platform/Marvell/Armada/Armada70x0.dsc index 946c93e..0396e8e 100644 --- a/Platform/Marvell/Armada/Armada70x0.dsc +++ b/Platform/Marvell/Armada/Armada70x0.dsc @@ -39,8 +39,8 @@ PLATFORM_GUID = f837e231-cfc7-4f56-9a0f-5b218d746ae3 PLATFORM_VERSION = 0.1 DSC_SPECIFICATION = 0x00010005 - OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) - SUPPORTED_ARCHITECTURES = AARCH64 + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)-$(ARCH) + SUPPORTED_ARCHITECTURES = AARCH64|ARM BUILD_TARGETS = DEBUG|RELEASE SKUID_IDENTIFIER = DEFAULT FLASH_DEFINITION = Platform/Marvell/Armada/Armada70x0.fdf diff --git a/Platform/Marvell/Armada/Armada70x0.fdf b/Platform/Marvell/Armada/Armada70x0.fdf index a94a9ff..ec2c368 100644 --- a/Platform/Marvell/Armada/Armada70x0.fdf +++ b/Platform/Marvell/Armada/Armada70x0.fdf @@ -237,7 +237,7 @@ READ_LOCK_STATUS = TRUE # ############################################################################ -[Rule.AARCH64.SEC] +[Rule.Common.SEC] FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED { TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi } -- 2.7.4