From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.65; helo=mga03.intel.com; envelope-from=eric.dong@intel.com; receiver=edk2-devel@lists.01.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 636E821E7821E for ; Wed, 18 Oct 2017 19:38:42 -0700 (PDT) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Oct 2017 19:42:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.43,399,1503385200"; d="scan'208";a="162179288" Received: from ydong10-win10.ccr.corp.intel.com ([10.239.158.60]) by orsmga005.jf.intel.com with ESMTP; 18 Oct 2017 19:42:18 -0700 From: Eric Dong To: edk2-devel@lists.01.org Cc: Crystal Lee , Ruiyu Ni Date: Thu, 19 Oct 2017 10:42:16 +0800 Message-Id: <1508380936-8608-1-git-send-email-eric.dong@intel.com> X-Mailer: git-send-email 2.7.0.windows.1 Subject: [Patch] UefiCpuPkg/MpInitLib: Avoid call PcdGe* in Ap & Bsp. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 19 Oct 2017 02:38:43 -0000 MicrocodeDetect function will run by every threads, and it will use PcdGet to get PcdCpuMicrocodePatchAddress and PcdCpuMicrocodePatchRegionSize, if change both PCD default to dynamic, system will in non-deterministic behavior. By design, UEFI/PI services are single threaded and not re-entrant so Multi processor code should not use UEFI/PI services. Here, Pcd protocol/PPI is used to access dynamic PCDs so it would result in non-deterministic behavior. This code get PCD value in BSP and save them in CPU_MP_DATA for Ap. https://bugzilla.tianocore.org/show_bug.cgi?id=726 Cc: Crystal Lee Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong --- UefiCpuPkg/Library/MpInitLib/Microcode.c | 10 +++------- UefiCpuPkg/Library/MpInitLib/MpLib.c | 2 ++ UefiCpuPkg/Library/MpInitLib/MpLib.h | 2 ++ 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c b/UefiCpuPkg/Library/MpInitLib/Microcode.c index 982995b..35f66f7 100644 --- a/UefiCpuPkg/Library/MpInitLib/Microcode.c +++ b/UefiCpuPkg/Library/MpInitLib/Microcode.c @@ -42,8 +42,6 @@ MicrocodeDetect ( IN CPU_MP_DATA *CpuMpData ) { - UINT64 MicrocodePatchAddress; - UINT64 MicrocodePatchRegionSize; UINT32 ExtendedTableLength; UINT32 ExtendedTableCount; CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable; @@ -61,9 +59,7 @@ MicrocodeDetect ( VOID *MicrocodeData; MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr; - MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress); - MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize); - if (MicrocodePatchRegionSize == 0) { + if (CpuMpData->MicrocodePatchRegionSize == 0) { // // There is no microcode patches // @@ -93,8 +89,8 @@ MicrocodeDetect ( LatestRevision = 0; MicrocodeData = NULL; - MicrocodeEnd = (UINTN) (MicrocodePatchAddress + MicrocodePatchRegionSize); - MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) MicrocodePatchAddress; + MicrocodeEnd = (UINTN) (CpuMpData->MicrocodePatchAddress + CpuMpData->MicrocodePatchRegionSize); + MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) CpuMpData->MicrocodePatchAddress; do { // // Check if the microcode is for the Cpu and the version is newer diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c index 924b909..f3ee6d4 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -1458,6 +1458,8 @@ MpInitLibInitialize ( CpuMpData->SwitchBspFlag = FALSE; CpuMpData->CpuData = (CPU_AP_DATA *) (CpuMpData + 1); CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber); + CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress); + CpuMpData->MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize); InitializeSpinLock(&CpuMpData->MpLock); // // Save BSP's Control registers to APs diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h index 19defda..84ae24f 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -233,6 +233,8 @@ struct _CPU_MP_DATA { UINT8 Vector; BOOLEAN PeriodicMode; BOOLEAN TimerInterruptState; + UINT64 MicrocodePatchAddress; + UINT64 MicrocodePatchRegionSize; }; extern EFI_GUID mCpuInitMpLibHobGuid; -- 2.7.0.windows.1