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From: Jiewen Yao <jiewen.yao@intel.com>
To: edk2-devel@lists.01.org
Cc: Zeng Star <zeng.star@intel.com>
Subject: [PATCH] IntelSiliconPkg/VtdInfoSample: Fix IGD RMRR memory.
Date: Fri, 20 Oct 2017 16:51:17 +0800	[thread overview]
Message-ID: <1508489477-27580-1-git-send-email-jiewen.yao@intel.com> (raw)

Fix a calculation problem in IGD RMRR memory.

Cc: Zeng Star <zeng.star@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
---
 IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePei.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePei.c b/IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePei.c
index 08a4db3..6267da7 100644
--- a/IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePei.c
+++ b/IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePei.c
@@ -159,7 +159,7 @@ PatchDmar (
   /// Calculate GTT mem size
   ///
   GttMemSize = 0;
-  GttMode = PciRead16 (PCI_LIB_ADDRESS(0, 0, 0, R_SA_GGC) & B_SKL_SA_GGC_GGMS_MASK) >> N_SKL_SA_GGC_GGMS_OFFSET;
+  GttMode = (PciRead16 (PCI_LIB_ADDRESS(0, 0, 0, R_SA_GGC)) & B_SKL_SA_GGC_GGMS_MASK) >> N_SKL_SA_GGC_GGMS_OFFSET;
   if (GttMode <= V_SKL_SA_GGC_GGMS_8MB) {
     GttMemSize = (1 << GttMode) * (1024) * (1024);
   }
-- 
2.7.4.windows.1



             reply	other threads:[~2017-10-20  8:47 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-20  8:51 Jiewen Yao [this message]
2017-10-20  9:06 ` [PATCH] IntelSiliconPkg/VtdInfoSample: Fix IGD RMRR memory Yao, Jiewen
2017-10-24  2:22   ` Zeng, Star

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