From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::242; helo=mail-lf0-x242.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf0-x242.google.com (mail-lf0-x242.google.com [IPv6:2a00:1450:4010:c07::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6577020347156 for ; Tue, 24 Oct 2017 23:43:00 -0700 (PDT) Received: by mail-lf0-x242.google.com with SMTP id a132so26583161lfa.7 for ; Tue, 24 Oct 2017 23:46:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=vsfU8SF1e50cmtXQFwbgr0JRv06moviFmyFEBkSBR80=; b=LFWtFoXl44lafBZlj3WIr00aybf30m+gt8AtR4yzXXNMkUILrOLFU/FrWaRkhTuO55 KC4rySn83TNI5h4W2SSkAcRfyVurAcYiPzq+VdafPPBA/fRdUQPbOg3Foz9exuPFAZ+O fCEJC2Kx6pCJ4R+EArKwPhGDFv85lRLPva03yJ4uTVMPPfW6aDZPwlNpDaLQCq62fsfB A7l3mVL/G3OMHN9pB7yu1ESVfoq/kEpLKndMTGPL7HAwK9pt/GfNn0PWBOi2tWyJjTxZ G+nCQRMOxs+XVVuVMnkIgjMwDbmXpHjLjnuj16T3FI1kNEgDR4Eb4D7dxgplz1KUfGRq aQXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=vsfU8SF1e50cmtXQFwbgr0JRv06moviFmyFEBkSBR80=; b=qF1BSxSGWIsg3Wvs7To7jlFVghbfKPS1KMvzq4/VJzhRytTE3dW+9f9n8Yr8DuA+6t ipjzSVQZ2LfzUz4XNOxHdn1AgLamJhBMqMkqql3vAmVDCgC1DnHTLVxo5Q7DRE0O10qg 3FvrHA4HAddP/ktGfsa6R3lvHdrSL0Wcm9LKshsvZ9qI6GZOmI3GTyOh/WynbqY8FXQe Nucu+O7p4zG5SXfsnAbwyEoYHbF+DBH2weG/Y0RC2ojzJyi3ZNmB8lpGUfeelP2WyOe4 gbTzjI/+MPDZxxJUqWgiuJtR3hzUHF075t7077w+i2F3GRuhglUPdX64teXT0UkYEnbo mDdA== X-Gm-Message-State: AMCzsaWVSVYJ5b/vdj5z0aAaGqoa+RsnE301NNXuD/qoXgl2O4a3DL0z 6w1IKH7S/Gu9HuZU0g2Bh63PuCNtL50= X-Google-Smtp-Source: ABhQp+RjvLnRlkUcyv3gVlSCmKKb4S6RzR7WJsXNMJXKqMT2SEwCU1lgq4W+uttmSlJrMmCAP4MopA== X-Received: by 10.46.32.141 with SMTP id g13mr8276832lji.21.1508914003047; Tue, 24 Oct 2017 23:46:43 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id r22sm513129ljr.16.2017.10.24.23.46.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Oct 2017 23:46:42 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com Date: Wed, 25 Oct 2017 08:45:22 +0200 Message-Id: <1508913930-30886-1-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 Subject: [platforms: PATCH v2 0/8] Armada 7k/8k - memory improvements X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Oct 2017 06:43:00 -0000 Hi, This is a second version of DRAM handling and other general improvements. Two patches were significantly reworked and as a result we support now not only overall size detection, but also remap parameters. This way we are immune to future remap changes done in the early firmware. All above with better readability. The patches are available in the github: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/mem-upstream-r20171025 I'm looking forward to your comments or remarks. Best regards, Marcin Changelog: 1/8 - Add comment for calling Stall 4/8 - s/VirtualMemoryTable/mVirtualMemoryTable/ - restore ASSERT for table elements - correct commit log (s/ATF/ARM-TF/) - add dynamic remap enable/parameters detection - move config space base address to PCD - use macros 6/8 - s/DramSizeGet/GetDramSize/ - add 'IN OUT' to GetDramSize argument - s/AreaLengthMap/RegionCode/ - use macros to hide arithmetics and increase readability - replace humongous switch/case with small if/else 2/8, 3/8, 5/8, 7/8, 8/8 - Add RBs Ard Biesheuvel (5): Marvell/Armada: Implement EFI_RNG_PROTOCOL driver for EIP76 TRNG Marvell/Armada: Increase preallocated memory region size Marvell/Armada: Add MemoryInitPeiLib that reserves secure region Marvell/Armada: Armada70x0Lib: Add support for 32-bit ARM Marvell/Armada: Add 32-bit ARM support Marcin Wojtas (3): Marvell/Armada: Remove custom reset library residues Marvell/Armada: Add support from DRAM remapping Marvell/Armada: Enable dynamic DRAM size detection Platform/Marvell/Armada/Armada.dsc.inc | 21 +- Platform/Marvell/Armada/Armada70x0.dsc | 8 +- Platform/Marvell/Armada/Armada70x0.fdf | 3 +- Platform/Marvell/Armada/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.c | 255 ++++++++++++++++++++ Platform/Marvell/Armada/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.inf | 47 ++++ Platform/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S | 77 ++++++ Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0Lib.inf | 5 + Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.c | 150 ++++++++++-- Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.h | 73 ++++++ Platform/Marvell/Armada/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.c | 158 ++++++++++++ Platform/Marvell/Armada/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.inf | 46 ++++ Platform/Marvell/Marvell.dec | 18 +- Silicon/Marvell/Documentation/PortingGuide.txt | 9 - 13 files changed, 824 insertions(+), 46 deletions(-) create mode 100644 Platform/Marvell/Armada/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.c create mode 100644 Platform/Marvell/Armada/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.inf create mode 100644 Platform/Marvell/Armada/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S create mode 100644 Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0LibMem.h create mode 100644 Platform/Marvell/Armada/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.c create mode 100644 Platform/Marvell/Armada/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.inf -- 2.7.4