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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id r22sm513129ljr.16.2017.10.24.23.46.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Oct 2017 23:46:46 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com Date: Wed, 25 Oct 2017 08:45:25 +0200 Message-Id: <1508913930-30886-4-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508913930-30886-1-git-send-email-mw@semihalf.com> References: <1508913930-30886-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH v2 3/8] Marvell/Armada: Remove custom reset library residues X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Oct 2017 06:43:04 -0000 When switching to generic PSCI reset library, obsolete parts of previous custom reset library (PCDs, documentation) remained. Remove them. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- Platform/Marvell/Armada/Armada70x0.dsc | 4 ---- Platform/Marvell/Marvell.dec | 4 ---- Silicon/Marvell/Documentation/PortingGuide.txt | 9 --------- 3 files changed, 17 deletions(-) diff --git a/Platform/Marvell/Armada/Armada70x0.dsc b/Platform/Marvell/Armada/Armada70x0.dsc index 430803c..946c93e 100644 --- a/Platform/Marvell/Armada/Armada70x0.dsc +++ b/Platform/Marvell/Armada/Armada70x0.dsc @@ -138,9 +138,5 @@ gMarvellTokenSpaceGuid.PcdPciEAhci|{ 0x1, 0x0 } gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1, 0x1 } - #ResetLib - gMarvellTokenSpaceGuid.PcdResetRegAddress|0xf06f0084 - gMarvellTokenSpaceGuid.PcdResetRegMask|0x1 - #RTC gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x1 } diff --git a/Platform/Marvell/Marvell.dec b/Platform/Marvell/Marvell.dec index 78f5e53..434d6cb 100644 --- a/Platform/Marvell/Marvell.dec +++ b/Platform/Marvell/Marvell.dec @@ -188,10 +188,6 @@ gMarvellTokenSpaceGuid.PcdPciEAhci|{ 0x0 }|VOID*|0x3000034 gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x0 }|VOID*|0x3000035 -#ResetLib - gMarvellTokenSpaceGuid.PcdResetRegAddress|0|UINT64|0x40000050 - gMarvellTokenSpaceGuid.PcdResetRegMask|0|UINT32|0x4000051 - #RTC gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x0 }|VOID*|0x40000052 diff --git a/Silicon/Marvell/Documentation/PortingGuide.txt b/Silicon/Marvell/Documentation/PortingGuide.txt index 66ec918..cbe3bed 100644 --- a/Silicon/Marvell/Documentation/PortingGuide.txt +++ b/Silicon/Marvell/Documentation/PortingGuide.txt @@ -383,15 +383,6 @@ Set pin 6 and 7 to 0xa function: gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xa, 0xa, 0x0, 0x0 } -MarvellResetSystemLib configuration -=================================== -This simple library allows to mask given bits in given reg at UEFI 'reset' -command call. These variables are configurable through PCDs: - - - gMarvellTokenSpaceGuid.PcdResetRegAddress - - gMarvellTokenSpaceGuid.PcdResetRegMask - - Ramdisk configuration ===================== There is one PCD available for Ramdisk configuration -- 2.7.4