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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id h26sm1053428lja.69.2017.10.25.18.20.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 25 Oct 2017 18:20:05 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com Date: Thu, 26 Oct 2017 03:19:34 +0200 Message-Id: <1508980777-29006-8-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508980777-29006-1-git-send-email-mw@semihalf.com> References: <1508980777-29006-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH 07/10] Marvell/Drivers: Pp2Dxe: Change settings for the always-up link X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 Oct 2017 01:16:22 -0000 Currently initial forcing link status happened for all ports, not only marked as 'always-up'. Although this didn't actually matter for the MAC settings, because MAC is automatically updated with PHY HW polling feature of the controller, perform mv_gop110_fl_cfg only when the appropriate flag is true. Also in such case, force the link as up, using a new library routine. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2Lib.c | 31 ++++++++++++++++++++ Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2Lib.h | 7 +++++ Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 6 +++- 3 files changed, 43 insertions(+), 1 deletion(-) diff --git a/Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2Lib.c b/Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2Lib.c index 53154db..e3ddc58 100644 --- a/Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2Lib.c +++ b/Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2Lib.c @@ -4804,6 +4804,37 @@ MvGop110PortEventsMask ( return 0; } +/* + * Sets "Force Link Pass" and "Do Not Force Link Fail" bits. + * This function should only be called when the port is disabled. + */ +VOID +MvGop110GmacForceLinkModeSet( + IN PP2DXE_PORT *Port, + IN BOOLEAN ForceLinkUp, + IN BOOLEAN ForceLinkDown) +{ + UINT32 RegVal; + + /* Can't force link pass and link fail at the same time */ + if ((ForceLinkUp) && (ForceLinkDown)) + return; + + RegVal = MvGop110GmacRead (Port, MVPP2_PORT_AUTO_NEG_CFG_REG); + + if (ForceLinkUp) + RegVal |= MVPP2_PORT_AUTO_NEG_CFG_FORCE_LINK_UP_MASK; + else + RegVal &= ~MVPP2_PORT_AUTO_NEG_CFG_FORCE_LINK_UP_MASK; + + if (ForceLinkDown) + RegVal |= MVPP2_PORT_AUTO_NEG_CFG_FORCE_LINK_DOWN_MASK; + else + RegVal &= ~MVPP2_PORT_AUTO_NEG_CFG_FORCE_LINK_DOWN_MASK; + + MvGop110GmacWrite (Port, MVPP2_PORT_AUTO_NEG_CFG_REG, RegVal); +} + INT32 MvGop110FlCfg ( IN PP2DXE_PORT *Port diff --git a/Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2Lib.h b/Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2Lib.h index a7011f7..2938777 100644 --- a/Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2Lib.h +++ b/Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2Lib.h @@ -504,6 +504,13 @@ MvGop110XlgPortLinkEventMask ( IN PP2DXE_PORT *Port ); +VOID +MvGop110GmacForceLinkModeSet ( + IN PP2DXE_PORT *Port, + IN BOOLEAN ForceLinkUp, + IN BOOLEAN ForceLinkDown + ); + INT32 MvGop110FlCfg ( IN PP2DXE_PORT *Port diff --git a/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c b/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c index 2827976..94a2988 100644 --- a/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c +++ b/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c @@ -1310,7 +1310,11 @@ Pp2DxeInitialiseController ( NetCompConfig |= MvpPp2xGop110NetcCfgCreate(&Pp2Context->Port); MvGop110PortInit(&Pp2Context->Port); - MvGop110FlCfg(&Pp2Context->Port); + + if (Pp2Context->Port.AlwaysUp == TRUE) { + MvGop110GmacForceLinkModeSet (&Pp2Context->Port, TRUE, FALSE); + MvGop110FlCfg (&Pp2Context->Port); + } Status = gBS->CreateEvent ( EVT_SIGNAL_EXIT_BOOT_SERVICES, -- 2.7.4