From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::242; helo=mail-lf0-x242.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf0-x242.google.com (mail-lf0-x242.google.com [IPv6:2a00:1450:4010:c07::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 94B7A2034A7B8 for ; Wed, 25 Oct 2017 18:16:23 -0700 (PDT) Received: by mail-lf0-x242.google.com with SMTP id a132so1935559lfa.7 for ; Wed, 25 Oct 2017 18:20:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3DHn9wfHWWniH2mHxORiQBkDFflX+kf7T1qL+mNO/Fk=; b=mhDP3r7UIz7JSRnd+bvFaOOPS84eZ9D//fXZbnyxz9/YAbSPSg2me0m8zmf4GosUjB GEe3iqi1S6Ej0DE8ufXlMEhIyEKygkfQNYwsZKz/bXUD5ecNEFbft//XpiFOvlAzw1hm JsFXb7mqFMT3m8x4ooABtcdZOrigKiZn5uswo/nXqikO0N9t1oO/L5nZ1D0qROE7glTj uRXn5SRoGatKiH71hJ4bCuvlkuW9bhNGGGuDQaHT/ZktAe90z0NDiq4p9OJHH4inmkeT aw3MWeEljORMq8f9V5ltmNJuKQ4A6S/3MIk5it/GFAta1QHrGAJA2hzNANg2DrIeh92C WIjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3DHn9wfHWWniH2mHxORiQBkDFflX+kf7T1qL+mNO/Fk=; b=cZiRqZfYfs7uFmY2bef8NgK4rL738BC42i4eMvTlCVGylc35AHhf4wpx6uUFREoRF2 4y5B+vnLzUVSvTCoMv/wKRdsnxVd1FQTf9ADyQk5TlRy51APBLRfIiCZHZwFUMc1OZP6 qbWl/b/f2ncd8bWBf+eOkM3nYNzVl5w7qK073I0YnIlLUQFqkbZzJmbzvdwZnOBmpLWO 0iP6RYHAMr3pRMW4AOPXpmXI22BWdJdi2WL2i9HbmR7NpsqMzdZpcXVH2V9jp4maq9eW LYUIZ1q3YqcmCXeS4Sk+kmb0gLenEnzVaaZDgX+Ojzq1hZaEqaibMbjspPVwWjmzNe2U pYsg== X-Gm-Message-State: AMCzsaXCfToeD5Ey38c35eQhegJYrU/eD23deq4t/4Ec6bAyDzI6wohy +z8nBHVVM8WQyR2w3to6UXlZZg/kQ6c= X-Google-Smtp-Source: ABhQp+TMJBpgMQwLslCQuF8bi12EwUCEVgYlBqmJeos03T2heI8H6ISeaVprXqrYtl4bx3Mo62LW6w== X-Received: by 10.25.225.144 with SMTP id l16mr7862585lfk.53.1508980807344; Wed, 25 Oct 2017 18:20:07 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id h26sm1053428lja.69.2017.10.25.18.20.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 25 Oct 2017 18:20:06 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com Date: Thu, 26 Oct 2017 03:19:35 +0200 Message-Id: <1508980777-29006-9-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1508980777-29006-1-git-send-email-mw@semihalf.com> References: <1508980777-29006-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH 08/10] Marvell/Drivers: XenonDxe: Fix UHS signalling mode setting X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 Oct 2017 01:16:24 -0000 This patch fixes incorrect settings for UHS mode in SD_MMC_HC_HOST_CTRL2 register. This field should be set to 0x4 for DDR52 0x2 for SDR50 0x1 for SDR25 0x0 for others. This way EmmcSwitchToHighSpeed function is on par with Linux set_uhs_signaling routine in the Xenon driver. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Platform/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Platform/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c b/Platform/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c index 3f73194..4d4833f 100755 --- a/Platform/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c +++ b/Platform/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c @@ -772,6 +772,8 @@ EmmcSwitchToHighSpeed ( if (IsDdr) { HostCtrl2 = BIT2; } else if (ClockFreq == 52) { + HostCtrl2 = BIT1; + } else if (ClockFreq == 26) { HostCtrl2 = BIT0; } else { HostCtrl2 = 0; -- 2.7.4