From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::244; helo=mail-lf0-x244.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf0-x244.google.com (mail-lf0-x244.google.com [IPv6:2a00:1450:4010:c07::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 48B652034A888 for ; Thu, 26 Oct 2017 18:10:53 -0700 (PDT) Received: by mail-lf0-x244.google.com with SMTP id a2so5653215lfh.11 for ; Thu, 26 Oct 2017 18:14:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Ziz/sbppFLzAIoc98FDxG9GdhC99rNuYyqabjsRh7Mg=; b=M59lg0eifnSR90Iyfr+NWqvxZT9qmSTp0osJy6jkZelHj3eenRJxugQdlAz9y3rX9y mtXzOcMWUj+7GlmTtPgHtT0xCBlQXgvppqX4yH2yuslhYa8nM0OHpq7do/d0D0Pjmp3Z t4R4v+wtOOLB0hEk2MYvJZF2fM/Go8Zv9LiAMOIKJfCcI2Zq+axniyfKuUTfetJevKIZ +n5cvxAl74XcjLxjNKE0KhtuU7aBVMSne4k0YL5WHkfjbeyZdpXcwAGh+lasYfHwED0T BV5Ze+gbSced8ijUCmTJni7ikFrErXctrRvQ2IrWhlk6lzL/b0SeAX/cyOZPSoYLn4gi LUag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Ziz/sbppFLzAIoc98FDxG9GdhC99rNuYyqabjsRh7Mg=; b=nU+Dcs2ssSj0SXnIU2zltsJ2drY5CRoK0c4yh2OODfNVFGHAKQbLitjlK8jUmlx2Jj AYfnzmWHxvlQ5dk+lD/0hbTEMN8hfHmdvCgjRjA122S0LSa1bTUAud1ZqFuNEyf9qgkI Xa//TXNWGjmpWXCaoJwXGemaWOJ/K75nMoy4VInwlseoIXbEkmsJoKuEFDdxM6qvn2y0 brVbI2VGm7GweWhlTYG78teNJPDSEj65So0LK7zC4qsaEt3OubZqku/43yWQpq1gHRgi qm7laInGXjxXHthv+tvS/Pzm4U9rdhcWxNGu7fi55iO3t1xxJNDTJN2zZNDYQQLx57Su 7M4g== X-Gm-Message-State: AMCzsaVJqRmayWG5NacfQ1tupROsDjcEAfn+Vzf8+RSgl96OBBA6MQ1/ WefMrPB5TJ6KmXt0Y8fnZfT3dgGnwPk= X-Google-Smtp-Source: ABhQp+Q06RELqJ2GiTiQj2nNIaoC20LrXbELemy9eVkxY+FcHlNZYTVVeLWSOj+7Kft9n2dmpZ+g3w== X-Received: by 10.46.93.137 with SMTP id v9mr10151257lje.39.1509066878159; Thu, 26 Oct 2017 18:14:38 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id m9sm1675702ljb.61.2017.10.26.18.14.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 26 Oct 2017 18:14:37 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com Date: Fri, 27 Oct 2017 03:13:50 +0200 Message-Id: <1509066832-5285-9-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1509066832-5285-1-git-send-email-mw@semihalf.com> References: <1509066832-5285-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH v2 08/10] Marvell/Drivers: XenonDxe: Fix UHS signalling mode setting X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 27 Oct 2017 01:10:53 -0000 This patch fixes incorrect settings for UHS mode in SD_MMC_HC_HOST_CTRL2 register for SDR50 and SDR25, of which the latter was missing. This field should be set to: 0x4 for DDR52 0x2 for SDR50 0x1 for SDR25 0x0 for others. This way EmmcSwitchToHighSpeed function is on par with Linux set_uhs_signaling routine in the Xenon driver. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Platform/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Platform/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c b/Platform/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c index 3f73194..4d4833f 100755 --- a/Platform/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c +++ b/Platform/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c @@ -772,6 +772,8 @@ EmmcSwitchToHighSpeed ( if (IsDdr) { HostCtrl2 = BIT2; } else if (ClockFreq == 52) { + HostCtrl2 = BIT1; + } else if (ClockFreq == 26) { HostCtrl2 = BIT0; } else { HostCtrl2 = 0; -- 2.7.4