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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id h3sm1569222lfj.26.2017.10.27.09.32.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 27 Oct 2017 09:32:32 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com Date: Fri, 27 Oct 2017 18:31:43 +0200 Message-Id: <1509121913-12937-1-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 Subject: [platforms: PATCH v3 00/10] Armada 7k/8k - misc improvements pt.2 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 27 Oct 2017 16:28:49 -0000 Hi, I send v3 with minor fixes, requested in latest review. Details can be found in the changelog below. The patches are available in the github: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/misc-upstream-r20171027-2 I'm looking forward to your comments or remarks. Best regards, Marcin Changelog: v2 -> v3: 7/10 - simplify code by supporting the only real usecase (forcing link up) 9/10 - print actual clock value in DumpCapabilityReg and inform about its mismatch with original register contents. - fix typo in functions' declarations 1/10, 2/10, 6/10, 8/10 - add RBs v1 -> v2: 1/10 - remove unrelated style fix - fix style around modified functions calls 2/10 - leave original EFI_SUCCESS assignment 6/10 - use descriptively named temporary variable for pin index in a loop 7/10 - use single flag for link up/down - simplify logic - correct style 8/10 - mention missing SDR25 in a commit message 9/10 - use new member of SD_MMC_HC_PRIVATE_DATA to set actual input clock speed and use it for the output clock configuration - rewrite commit message 3/10, 4/10, 5/10, 10/10 - add RB's Ard Biesheuvel (2): Marvell/Library: MppLib: Disable the stack protector Marvell/Library: MppLib: Take 0xFF placeholders into account David Greeson (2): Marvell/Drivers: MvI2cDxe: Abort transaction immediately upon fail Marvell/Drivers: MvI2cDxe: Reduce bus occupation time Joe Zhou (1): Marvell/Library: MppLib: Prevent overwriting PCD values Marcin Wojtas (5): Marvell/Drivers: MvI2cDxe: Fix returning status in MvI2cStartRequest Marvell/Drivers: Pp2Dxe: Change settings for the always-up link Marvell/Drivers: XenonDxe: Fix UHS signalling mode setting Marvell/Drivers: XenonDxe: Allow overriding base clock frequency Marvell/Drivers: XenonDxe: Do not modify FIFO default values Platform/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 70 ++++++++++++-------- Platform/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.h | 2 +- Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2Lib.c | 19 ++++++ Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2Lib.h | 5 ++ Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 6 +- Platform/Marvell/Drivers/SdMmc/XenonDxe/EmmcDevice.c | 6 +- Platform/Marvell/Drivers/SdMmc/XenonDxe/SdDevice.c | 4 +- Platform/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.c | 15 +++-- Platform/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHcDxe.h | 6 ++ Platform/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.c | 31 +++++---- Platform/Marvell/Drivers/SdMmc/XenonDxe/SdMmcPciHci.h | 16 +++-- Platform/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c | 16 ----- Platform/Marvell/Library/MppLib/MppLib.c | 35 +++++----- Platform/Marvell/Library/MppLib/MppLib.inf | 3 + 14 files changed, 144 insertions(+), 90 deletions(-) -- 2.7.4