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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id h3sm1569222lfj.26.2017.10.27.09.32.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 27 Oct 2017 09:32:39 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com, Joe Zhou Date: Fri, 27 Oct 2017 18:31:47 +0200 Message-Id: <1509121913-12937-5-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1509121913-12937-1-git-send-email-mw@semihalf.com> References: <1509121913-12937-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH v3 04/10] Marvell/Library: MppLib: Prevent overwriting PCD values X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 27 Oct 2017 16:28:54 -0000 From: Joe Zhou After enabling dynamic PCDs, it is possible to reconfigure MPP during platform initialization. It occurred that due to a faulty way of passing temporary values, information obtained from PCDs was overwritten. This patch fixes the issue, which on the occasion simplifies PcdToMppRegs function. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Joe Zhou Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- Platform/Marvell/Library/MppLib/MppLib.c | 21 ++++++++------------ 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/Platform/Marvell/Library/MppLib/MppLib.c b/Platform/Marvell/Library/MppLib/MppLib.c index c09acf9..383c820 100644 --- a/Platform/Marvell/Library/MppLib/MppLib.c +++ b/Platform/Marvell/Library/MppLib/MppLib.c @@ -74,7 +74,7 @@ STATIC VOID SetRegisterValue ( UINT8 RegCount, - UINT8 **MppRegPcd, + UINT8 MppRegPcd[][MPP_PINS_PER_REG], UINTN BaseAddr, BOOLEAN ReverseFlag ) @@ -99,10 +99,10 @@ STATIC UINT8 PcdToMppRegs ( UINTN PinCount, - UINT8 **MppRegPcd + UINT8 **MppRegPcd, + UINT8 MppRegPcdTmp[][MPP_PINS_PER_REG] ) { - UINT8 MppRegPcdTmp[MPP_MAX_REGS][MPP_PINS_PER_REG]; UINT8 PcdGroupCount, MppRegCount; UINTN i, j, k, l; @@ -125,14 +125,7 @@ PcdToMppRegs ( for (j = 0; j < PCD_PINS_PER_GROUP; j++) { k = (PCD_PINS_PER_GROUP * i + j) / MPP_PINS_PER_REG; l = (PCD_PINS_PER_GROUP * i + j) % MPP_PINS_PER_REG; - MppRegPcdTmp[k][l] = MppRegPcd[i][j]; - } - } - - /* Update input table */ - for (i = 0; i < MppRegCount; i++) { - for (j = 0; j < MPP_PINS_PER_REG; j++) { - MppRegPcd[i][j] = MppRegPcdTmp[i][j]; + MppRegPcdTmp[k][l] = (UINT8)MppRegPcd[i][j]; } } @@ -191,6 +184,7 @@ MppInitialize ( BOOLEAN ReverseFlag[MAX_CHIPS]; UINT8 *MppRegPcd[MAX_CHIPS][MPP_MAX_REGS]; UINT32 i, ChipCount; + UINT8 TmpMppValue[MPP_MAX_REGS][MPP_PINS_PER_REG]; ChipCount = PcdGet32 (PcdMppChipCount); @@ -203,8 +197,9 @@ MppInitialize ( for (i = 0; i < MAX_CHIPS; i++) { if (i == ChipCount) break; - RegCount = PcdToMppRegs (PinCount[i], MppRegPcd[i]); - SetRegisterValue (RegCount, MppRegPcd[i], BaseAddr[i], ReverseFlag[i]); + + RegCount = PcdToMppRegs (PinCount[i], MppRegPcd[i], TmpMppValue); + SetRegisterValue (RegCount, TmpMppValue, BaseAddr[i], ReverseFlag[i]); /* * eMMC PHY IP has its own MPP configuration. -- 2.7.4