From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::241; helo=mail-lf0-x241.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf0-x241.google.com (mail-lf0-x241.google.com [IPv6:2a00:1450:4010:c07::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7C0A721CEB130 for ; Mon, 30 Oct 2017 20:56:11 -0700 (PDT) Received: by mail-lf0-x241.google.com with SMTP id a16so17420432lfk.0 for ; Mon, 30 Oct 2017 21:00:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YZRVkq0NbS33JIyXXwDcOEzxIcpZ4mCgqXpmT3EH+ig=; b=w3+yEmM0a0CPzX/jL0fbGbX2k8hC1Ex0PQ0w6CAA2IxbZnXiCAdBSHotahDGN7H0Z6 4PPo8WISiIqTuS5QmURh4jGV/atIiR3N3ct5xh6fZ81718SGgVpVyYqt+DhTDNEspu4/ nIyM0FB6dvgM+GuYllc/DA5kZiqw/DMnNCvD1G6fXg7xDLMM2qpe7lKMV/M0guHOrNTS uWsc5HXj5KTQ4UKNLEWLpezKzTzYpiACsY0IZ8Q3N5/7jf3ZGPyZmUiUXXL/hP8Hgu2/ I1tg37n3gVeVpRcOUgVF6X3LT5nBtG/TrC1hoN3jTTHP+VTeuqm27HT52kncaNjuW1LJ LTMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YZRVkq0NbS33JIyXXwDcOEzxIcpZ4mCgqXpmT3EH+ig=; b=ARYlZ4STwBBfEqe194NrtCo0LScCzvo5F12txrUaHvHBNGTQsj1f71ahwaSwV53OCp ATzZZihpFBOZ5XA+0m+RF8lU8Cp4DvlCswOHHXB/9ImkewAB33R6Y33Y0NwNZZq/oU+u sMESbVBV0NBRzFz5YeMZlSkhHejStvCy0dDdNCu3P6+dlL3lWB+r98jn8l8jiJimLvOE lwBQiMOcrMGJ4eh4wS6iMiiP7yQZeias2G1tIj416AQzD0GEYat6Y6crnnsmLJCVJl31 D8OHI6rUw/XGz4fBdI0U5US6VopO9NnsnrChIXTu+DlWApbjaF0FkNh90P0EfEOluVC2 9xmA== X-Gm-Message-State: AMCzsaV4iEULzKOsR+ONWofRMEcjaqf1X9/3pa4yDHfGsEeP/HGeAxtw EcRErx6/Y17eqfPMlYtEwDiwNIpMIOg= X-Google-Smtp-Source: ABhQp+Rj2aaxb4REb9nX3fnz5heBwhbEhG84rrnmovQwFy6ttjeM9yCcxXVoUrQbETJKvjTJ8INBGg== X-Received: by 10.46.80.88 with SMTP id v24mr236142ljd.93.1509422400852; Mon, 30 Oct 2017 21:00:00 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id f21sm107393lja.25.2017.10.30.20.59.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 30 Oct 2017 21:00:00 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com Date: Tue, 31 Oct 2017 04:59:34 +0100 Message-Id: <1509422375-20198-6-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1509422375-20198-1-git-send-email-mw@semihalf.com> References: <1509422375-20198-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH 5/6] Marvell/Drivers: MvSpiFlash: Fix bank selection for Spansion X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 31 Oct 2017 03:56:11 -0000 Spansion SPI flash devices use different command for bank selection. Update it, basing on the first byte of flash ID. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c | 5 +++++ Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h | 4 ++++ 2 files changed, 9 insertions(+) diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c index 703994c..a00fc305 100755 --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c @@ -150,6 +150,11 @@ SpiFlashCmdBankaddrWrite ( { UINT8 Cmd = CMD_BANK_WRITE; + /* Update bank selection command for Spansion */ + if (Slave->Info->Id[0] == SPI_FLASH_MFR_SPANSION) { + Cmd = CMD_BANKADDR_BRWR; + } + MvSpiFlashWriteCommon (Slave, &Cmd, 1, &BankSel, 1); } diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h index 2583484..00af188 100755 --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h @@ -57,6 +57,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #define CMD_READ_ARRAY_FAST 0x0b #define CMD_PAGE_PROGRAM 0x02 #define CMD_BANK_WRITE 0xc5 +#define CMD_BANKADDR_BRWR 0x17 #define CMD_ERASE_4K 0x20 #define CMD_ERASE_32K 0x52 #define CMD_ERASE_64K 0xd8 @@ -72,6 +73,9 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #define SPI_FLASH_16MB_BOUN 0x1000000 +/* Manufacturer ID's */ +#define SPI_FLASH_MFR_SPANSION 0x01 + typedef enum { SPI_FLASH_READ_ID, SPI_FLASH_READ, // Read from SPI flash with address -- 2.7.4