From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::243; helo=mail-lf0-x243.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf0-x243.google.com (mail-lf0-x243.google.com [IPv6:2a00:1450:4010:c07::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C296A2034EE1B for ; Sun, 5 Nov 2017 02:52:00 -0800 (PST) Received: by mail-lf0-x243.google.com with SMTP id a2so7518201lfh.11 for ; Sun, 05 Nov 2017 02:55:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=3XaFULW5lHQ7s/XAq9L8iuJ4Dx79tVuAll1pX/mvsPo=; b=KYqP64MZ0EHQF6Bw0BFFK0z5TzGNbWWGrggnk2W2x7JxQWCvfxYnlayyL4TWn9nYl5 bmkFBkIhEJPEWDim9u70MSXA4vtJYVL/QIrLhydaCrwbANXZVLrUwu0UanHCcc+nQ2sQ so7iDHjw8vGMx3TC40T0sw74unp6LPLdRlHgZBlcteIeveY+DlbzJ5eqB5gH7apR7CDx UPGNfTXFoPDujfbpRBBCjHCxDIH5RTZx7Wj3BtN0okR2EEblFmrtoDsqa5/3XtzmAhgI fhePXxqoNEVmziyezkt7QZLOiW1vlBjkf/E065JoEDb+aiFSNpTZZ4LNqXYfCfzd5z8C OZGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=3XaFULW5lHQ7s/XAq9L8iuJ4Dx79tVuAll1pX/mvsPo=; b=C7+jotIjINvG2d/YSeFwntvbl5I5KZie5ex+T68Ug35YohuqgWHuqsagLH7pN2P/Nt L9jIQnzatBs1ua4RrRkeGcSdGfpPEH17W/aDoFw2ZMxdQJWrB1ees9AxxjDPAp5Q2g/b LIhQ7P8XqUB6s6WX1SZbN9wfGzT8tosXXAuA5BkD+ss33b+XT0d+cYlOfwafJmYGQW0u kR5/eH6MiEnd6j2QEGXdCGbx3weOXBhnPPQA6EC5M8W7+dnX+DVLqDaJC/ejv8cohIJe YwTg1af6BmeEGnGitPWTP1TIq9GqpVBF1P6YMTF48RCwN4aaCRhGrvM6RCKypbkATZ8X y6iA== X-Gm-Message-State: AJaThX5L7quFF0p65e80seaejUALBi8tSRuTXO64owXWHsLiJEZ2KBrP 8ERTTNrmSgkeWpU1hV7vTCJ8kYjXpk4= X-Google-Smtp-Source: ABhQp+RrEN1UgxUvYyJCptEILILwOCnGSVterRoyB6r/A7vo39SavqOzgvH7fo1C3eGbUtd9nzpQzw== X-Received: by 10.25.234.195 with SMTP id y64mr4192872lfi.36.1509879355614; Sun, 05 Nov 2017 02:55:55 -0800 (PST) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id a198sm1853649lfb.79.2017.11.05.02.55.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 05 Nov 2017 02:55:54 -0800 (PST) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com Date: Sun, 5 Nov 2017 11:55:35 +0100 Message-Id: <1509879339-10516-1-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 Subject: [platforms: PATCH 0/4] Armada 7k/8k variable support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Nov 2017 10:52:01 -0000 Hi, Basing on the latest SPI improvements, I submit the variable support for the Marvell platforms. It relies on a memory mapped SPI read access, configured in ARM-TF. The new driver (MvFvbDxe) uses the Marvell SPI protocols, thanks to which it is ready to work with different host controllers and flash devices combinations. Patches are available in the github: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/var-upstream-r20171105 I'm looking forward to the comments or remarks. Best regards, Marcin Marcin Wojtas (4): Marvell/Drivers: MvSpiFlash: Enable using driver in RT Marvell/Drivers: MvSpiDxe: Enable using driver in RT Platform/Marvell: Introduce MvFvbDxe variable support driver Marvell/Armada: Enable variables support Platform/Marvell/Armada/Armada.dsc.inc | 25 +- Platform/Marvell/Armada/Armada70x0.fdf | 6 +- Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c | 58 +- Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h | 1 + Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf | 11 +- Platform/Marvell/Drivers/Spi/MvSpiDxe.c | 50 +- Platform/Marvell/Drivers/Spi/MvSpiDxe.h | 2 + Platform/Marvell/Drivers/Spi/MvSpiDxe.inf | 9 +- Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.c | 1049 ++++++++++++++++++++ Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.h | 114 +++ Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.inf | 91 ++ Platform/Marvell/Include/Protocol/Spi.h | 7 + Platform/Marvell/Marvell.dec | 4 + 13 files changed, 1413 insertions(+), 14 deletions(-) create mode 100644 Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.c create mode 100644 Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.h create mode 100644 Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.inf -- 2.7.4