From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.20; helo=mga02.intel.com; envelope-from=jordan.l.justen@intel.com; receiver=edk2-devel@lists.01.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 79DE3220757E0 for ; Mon, 13 Nov 2017 10:21:15 -0800 (PST) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Nov 2017 10:25:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,389,1505804400"; d="scan'208";a="173052565" Received: from sacolema-mobl2.amr.corp.intel.com (HELO localhost) ([10.254.117.1]) by orsmga005.jf.intel.com with ESMTP; 13 Nov 2017 10:25:21 -0800 MIME-Version: 1.0 To: Laszlo Ersek , edk2-devel-01 Message-ID: <151059752091.21010.2353399254871736446@jljusten-skl> From: Jordan Justen In-Reply-To: <20171110154908.306-3-lersek@redhat.com> Cc: Ard Biesheuvel , Ruiyu Ni References: <20171110154908.306-1-lersek@redhat.com> <20171110154908.306-3-lersek@redhat.com> User-Agent: alot/0.6 Date: Mon, 13 Nov 2017 10:25:21 -0800 Subject: Re: [PATCH 2/4] OvmfPkg/Sec/Ia32: seed the temporary RAM with PcdInitValueInTempStack X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 13 Nov 2017 18:21:15 -0000 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On 2017-11-10 07:49:06, Laszlo Ersek wrote: > diff --git a/OvmfPkg/Sec/Ia32/SecEntry.nasm b/OvmfPkg/Sec/Ia32/SecEntry.n= asm > index 54d074e621f6..1d426fafa888 100644 > --- a/OvmfPkg/Sec/Ia32/SecEntry.nasm > +++ b/OvmfPkg/Sec/Ia32/SecEntry.nasm > @@ -29,6 +29,7 @@ extern ASM_PFX(SecCoreStartupWithStack) > ; @param[in] EAX Initial value of the EAX register (BIST: Built-in Se= lf Test) > ; @param[in] DI 'BP': boot-strap processor, or 'AP': application pro= cessor > ; @param[in] EBP Pointer to the start of the Boot Firmware Volume > +; @param[in] ES Set to LINEAR_SEL in TransitionFromReal16To32BitFlat Can you document all the segment registers, and also document them in UefiCpuPkg/ResetVector/Vtf0/Main.asm? > ; > ; @return None This routine does not return > ; > @@ -44,6 +45,18 @@ ASM_PFX(_ModuleEntryPoint): > mov esp, ebx > nop > = > + ; > + ; Fill the temporary RAM with the initial stack value. > + ; The loop below will seed the heap as well, but that's harmless. > + ; > + mov eax, FixedPcdGet32 (PcdInitValueInTempStack) ; dword to sto= re > + mov edi, FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) ; base address, > + ; relative t= o ES > + mov ecx, FixedPcdGet32 (PcdOvmfSecPeiTempRamSize) ; byte count > + shr ecx, 2 ; dword count I'm not sure, but I think NASM might let you do something like: mov ecx, FixedPcdGet32 (PcdOvmfSecPeiTempRamSize) / 4 > + cld ; store from b= ase up > + rep stosd I think if you move this above the code in patch 1, then patch 1 is not needed. I also think it would be reasonable to merge 2 & 3, but separate is fine too. -Jordan