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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id e72sm1115119lji.63.2017.12.07.08.32.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 07 Dec 2017 08:32:46 -0800 (PST) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com Date: Thu, 7 Dec 2017 17:31:49 +0100 Message-Id: <1512664312-23574-3-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1512664312-23574-1-git-send-email-mw@semihalf.com> References: <1512664312-23574-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH 2/5] Marvell/Armada7k8k: Use '7k8k' prefix in the SoC drivers/libraries X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Dec 2017 16:28:19 -0000 As a part of files reorganization, switch to using '7k8k' in all SoC-specific driver/library code instead of '70x0'/'7040', so that to ensure consistent naming for entire SoC family. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 2 +- Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 6 +- Silicon/Marvell/Armada7k8k/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.c | 255 -------------------- Silicon/Marvell/Armada7k8k/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.inf | 47 ---- Silicon/Marvell/Armada7k8k/Drivers/Armada7k8kRngDxe/Armada7k8kRngDxe.c | 255 ++++++++++++++++++++ Silicon/Marvell/Armada7k8k/Drivers/Armada7k8kRngDxe/Armada7k8kRngDxe.inf | 47 ++++ Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S | 51 ---- Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S | 77 ------ Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0Lib.c | 132 ---------- Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0Lib.inf | 76 ------ Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0LibMem.c | 204 ---------------- Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0LibMem.h | 73 ------ Silicon/Marvell/Armada7k8k/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.c | 158 ------------ Silicon/Marvell/Armada7k8k/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.inf | 46 ---- Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/AArch64/ArmPlatformHelper.S | 51 ++++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/ARM/ArmPlatformHelper.S | 77 ++++++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.c | 132 ++++++++++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 76 ++++++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c | 204 ++++++++++++++++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.h | 73 ++++++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInitPeiLib/Armada7k8kMemoryInitPeiLib.c | 158 ++++++++++++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInitPeiLib/Armada7k8kMemoryInitPeiLib.inf | 46 ++++ 22 files changed, 1123 insertions(+), 1123 deletions(-) diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf index f63f42d..bba449a 100644 --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf @@ -112,7 +112,7 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c INF Silicon/Marvell/Drivers/I2c/Devices/MvEeprom/MvEeprom.inf INF Silicon/Marvell/Drivers/Spi/MvSpiDxe.inf INF Silicon/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf - INF Silicon/Marvell/Armada7k8k/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.inf + INF Silicon/Marvell/Armada7k8k/Drivers/Armada7k8kRngDxe/Armada7k8kRngDxe.inf # Variable services INF Silicon/Marvell/Drivers/Spi/Variables/MvFvbDxe.inf diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc index 75717e9..7d87766 100644 --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc @@ -32,7 +32,7 @@ #SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # [LibraryClasses.common] - ArmPlatformLib|Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0Lib.inf + ArmPlatformLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf ComPhyLib|Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf MppLib|Silicon/Marvell/Library/MppLib/MppLib.inf NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf @@ -149,7 +149,7 @@ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf [LibraryClasses.common.SEC, LibraryClasses.common.PEIM] - MemoryInitPeiLib|Silicon/Marvell/Armada7k8k/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.inf + MemoryInitPeiLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInitPeiLib/Armada7k8kMemoryInitPeiLib.inf BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf [LibraryClasses.common.DXE_CORE] @@ -413,7 +413,7 @@ Silicon/Marvell/Drivers/I2c/Devices/MvEeprom/MvEeprom.inf Silicon/Marvell/Drivers/Spi/MvSpiDxe.inf Silicon/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf - Silicon/Marvell/Armada7k8k/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.inf + Silicon/Marvell/Armada7k8k/Drivers/Armada7k8kRngDxe/Armada7k8kRngDxe.inf # Network support MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf diff --git a/Silicon/Marvell/Armada7k8k/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.c b/Silicon/Marvell/Armada7k8k/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.c deleted file mode 100644 index 014443d..0000000 --- a/Silicon/Marvell/Armada7k8k/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.c +++ /dev/null @@ -1,255 +0,0 @@ -/** @file - - This driver produces an EFI_RNG_PROTOCOL instance for the Armada 70x0 TRNG - - Copyright (C) 2017, Linaro Ltd. All rights reserved.
- - This program and the accompanying materials are licensed and made available - under the terms and conditions of the BSD License which accompanies this - distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT - WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include -#include -#include -#include - -#include - -#define TRNG_OUTPUT_REG mTrngBaseAddress -#define TRNG_OUTPUT_SIZE 0x10 - -#define TRNG_STATUS_REG (mTrngBaseAddress + 0x10) -#define TRNG_STATUS_READY BIT0 - -#define TRNG_INTACK_REG (mTrngBaseAddress + 0x10) -#define TRNG_INTACK_READY BIT0 - -#define TRNG_CONTROL_REG (mTrngBaseAddress + 0x14) -#define TRNG_CONTROL_REG_ENABLE BIT10 - -#define TRNG_CONFIG_REG (mTrngBaseAddress + 0x18) -#define __MIN_REFILL_SHIFT 0 -#define __MAX_REFILL_SHIFT 16 -#define TRNG_CONFIG_MIN_REFILL_CYCLES (0x05 << __MIN_REFILL_SHIFT) -#define TRNG_CONFIG_MAX_REFILL_CYCLES (0x22 << __MAX_REFILL_SHIFT) - -#define TRNG_FRODETUNE_REG (mTrngBaseAddress + 0x24) -#define TRNG_FRODETUNE_MASK 0x0 - -#define TRNG_FROENABLE_REG (mTrngBaseAddress + 0x20) -#define TRNG_FROENABLE_MASK 0xffffff - -#define TRNG_MAX_RETRIES 20 - -STATIC EFI_PHYSICAL_ADDRESS mTrngBaseAddress; - -/** - Returns information about the random number generation implementation. - - @param[in] This A pointer to the EFI_RNG_PROTOCOL - instance. - @param[in,out] RNGAlgorithmListSize On input, the size in bytes of - RNGAlgorithmList. - On output with a return code of - EFI_SUCCESS, the size in bytes of the - data returned in RNGAlgorithmList. On - output with a return code of - EFI_BUFFER_TOO_SMALL, the size of - RNGAlgorithmList required to obtain the - list. - @param[out] RNGAlgorithmList A caller-allocated memory buffer filled - by the driver with one EFI_RNG_ALGORITHM - element for each supported RNG algorithm. - The list must not change across multiple - calls to the same driver. The first - algorithm in the list is the default - algorithm for the driver. - - @retval EFI_SUCCESS The RNG algorithm list was returned - successfully. - @retval EFI_UNSUPPORTED The services is not supported by this - driver. - @retval EFI_DEVICE_ERROR The list of algorithms could not be - retrieved due to a hardware or firmware - error. - @retval EFI_INVALID_PARAMETER One or more of the parameters are - incorrect. - @retval EFI_BUFFER_TOO_SMALL The buffer RNGAlgorithmList is too small - to hold the result. - -**/ -STATIC -EFI_STATUS -EFIAPI -Armada70x0RngGetInfo ( - IN EFI_RNG_PROTOCOL *This, - IN OUT UINTN *RNGAlgorithmListSize, - OUT EFI_RNG_ALGORITHM *RNGAlgorithmList - ) -{ - if (This == NULL || RNGAlgorithmListSize == NULL) { - return EFI_INVALID_PARAMETER; - } - - if (*RNGAlgorithmListSize < sizeof (EFI_RNG_ALGORITHM)) { - *RNGAlgorithmListSize = sizeof (EFI_RNG_ALGORITHM); - return EFI_BUFFER_TOO_SMALL; - } - - if (RNGAlgorithmList == NULL) { - return EFI_INVALID_PARAMETER; - } - - *RNGAlgorithmListSize = sizeof (EFI_RNG_ALGORITHM); - CopyGuid (RNGAlgorithmList, &gEfiRngAlgorithmRaw); - - return EFI_SUCCESS; -} - -STATIC -EFI_STATUS -GetTrngData ( - IN UINTN Length, - OUT UINT8 *Bits - ) -{ - UINTN Tries; - UINT32 Buf[TRNG_OUTPUT_SIZE / sizeof (UINT32)]; - UINTN Index; - - for (Tries = 0; Tries < TRNG_MAX_RETRIES; Tries++) { - if (MmioRead32 (TRNG_STATUS_REG) & TRNG_STATUS_READY) { - for (Index = 0; Index < ARRAY_SIZE (Buf); Index++) { - Buf[Index] = MmioRead32 (TRNG_OUTPUT_REG + Index * sizeof (UINT32)); - } - CopyMem (Bits, Buf, Length); - MmioWrite32 (TRNG_INTACK_REG, TRNG_INTACK_READY); - - return EFI_SUCCESS; - } - // Wait for more TRNG data to arrive - gBS->Stall (10); - } - return EFI_DEVICE_ERROR; -} - -/** - Produces and returns an RNG value using either the default or specified RNG - algorithm. - - @param[in] This A pointer to the EFI_RNG_PROTOCOL - instance. - @param[in] RNGAlgorithm A pointer to the EFI_RNG_ALGORITHM that - identifies the RNG algorithm to use. May - be NULL in which case the function will - use its default RNG algorithm. - @param[in] RNGValueLength The length in bytes of the memory buffer - pointed to by RNGValue. The driver shall - return exactly this numbers of bytes. - @param[out] RNGValue A caller-allocated memory buffer filled - by the driver with the resulting RNG - value. - - @retval EFI_SUCCESS The RNG value was returned successfully. - @retval EFI_UNSUPPORTED The algorithm specified by RNGAlgorithm - is not supported by this driver. - @retval EFI_DEVICE_ERROR An RNG value could not be retrieved due - to a hardware or firmware error. - @retval EFI_NOT_READY There is not enough random data available - to satisfy the length requested by - RNGValueLength. - @retval EFI_INVALID_PARAMETER RNGValue is NULL or RNGValueLength is - zero. - -**/ -STATIC -EFI_STATUS -EFIAPI -Armada70x0RngGetRNG ( - IN EFI_RNG_PROTOCOL *This, - IN EFI_RNG_ALGORITHM *RNGAlgorithm, OPTIONAL - IN UINTN RNGValueLength, - OUT UINT8 *RNGValue - ) -{ - UINTN Length; - EFI_STATUS Status; - - if (This == NULL || RNGValueLength == 0 || RNGValue == NULL) { - return EFI_INVALID_PARAMETER; - } - - // - // We only support the raw algorithm, so reject requests for anything else - // - if (RNGAlgorithm != NULL && - !CompareGuid (RNGAlgorithm, &gEfiRngAlgorithmRaw)) { - return EFI_UNSUPPORTED; - } - - do { - Length = MIN (RNGValueLength, TRNG_OUTPUT_SIZE); - Status = GetTrngData (Length, RNGValue); - if (EFI_ERROR (Status)) { - return Status; - } - - RNGValue += Length; - RNGValueLength -= Length; - } while (RNGValueLength > 0); - - return EFI_SUCCESS; -} - -STATIC EFI_RNG_PROTOCOL mArmada70x0RngProtocol = { - Armada70x0RngGetInfo, - Armada70x0RngGetRNG -}; - -// -// Entry point of this driver. -// -EFI_STATUS -EFIAPI -Armada70x0RngDxeEntryPoint ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - mTrngBaseAddress = PcdGet64 (PcdEip76TrngBaseAddress); - - // - // Disable the TRNG before updating its configuration - // - MmioAnd32 (TRNG_CONTROL_REG, ~TRNG_CONTROL_REG_ENABLE); - - // - // Configure the internal conditioning parameters of the TRNG - // - MmioWrite32 (TRNG_CONFIG_REG, TRNG_CONFIG_MIN_REFILL_CYCLES | - TRNG_CONFIG_MAX_REFILL_CYCLES); - - // - // Configure the FROs - // - MmioWrite32 (TRNG_FRODETUNE_REG, TRNG_FRODETUNE_MASK); - MmioWrite32 (TRNG_FROENABLE_REG, TRNG_FROENABLE_MASK); - - // - // Enable the TRNG - // - MmioOr32 (TRNG_CONTROL_REG, TRNG_CONTROL_REG_ENABLE); - - return SystemTable->BootServices->InstallMultipleProtocolInterfaces ( - &ImageHandle, - &gEfiRngProtocolGuid, - &mArmada70x0RngProtocol, - NULL - ); -} diff --git a/Silicon/Marvell/Armada7k8k/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.inf b/Silicon/Marvell/Armada7k8k/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.inf deleted file mode 100644 index 3d74c8e..0000000 --- a/Silicon/Marvell/Armada7k8k/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.inf +++ /dev/null @@ -1,47 +0,0 @@ -## @file -# This driver produces an EFI_RNG_PROTOCOL instance for the Armada 70x0 TRNG -# -# Copyright (C) 2017, Linaro Ltd. All rights reserved.
-# -# This program and the accompanying materials are licensed and made available -# under the terms and conditions of the BSD License which accompanies this -# distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT -# WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -## - -[Defines] - INF_VERSION = 0x00010019 - BASE_NAME = Armada70x0RngDxe - FILE_GUID = dd87096a-cae5-4328-bec1-2ddb755f2e08 - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - ENTRY_POINT = Armada70x0RngDxeEntryPoint - -[Sources] - Armada70x0RngDxe.c - -[Packages] - MdePkg/MdePkg.dec - Silicon/Marvell/Marvell.dec - -[LibraryClasses] - BaseMemoryLib - IoLib - PcdLib - UefiDriverEntryPoint - -[Pcd] - gMarvellTokenSpaceGuid.PcdEip76TrngBaseAddress - -[Protocols] - gEfiRngProtocolGuid ## PRODUCES - -[Guids] - gEfiRngAlgorithmRaw - -[Depex] - TRUE diff --git a/Silicon/Marvell/Armada7k8k/Drivers/Armada7k8kRngDxe/Armada7k8kRngDxe.c b/Silicon/Marvell/Armada7k8k/Drivers/Armada7k8kRngDxe/Armada7k8kRngDxe.c new file mode 100644 index 0000000..2cbc3e4 --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Drivers/Armada7k8kRngDxe/Armada7k8kRngDxe.c @@ -0,0 +1,255 @@ +/** @file + + This driver produces an EFI_RNG_PROTOCOL instance for the Armada 70x0 TRNG + + Copyright (C) 2017, Linaro Ltd. All rights reserved.
+ + This program and the accompanying materials are licensed and made available + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include + +#include + +#define TRNG_OUTPUT_REG mTrngBaseAddress +#define TRNG_OUTPUT_SIZE 0x10 + +#define TRNG_STATUS_REG (mTrngBaseAddress + 0x10) +#define TRNG_STATUS_READY BIT0 + +#define TRNG_INTACK_REG (mTrngBaseAddress + 0x10) +#define TRNG_INTACK_READY BIT0 + +#define TRNG_CONTROL_REG (mTrngBaseAddress + 0x14) +#define TRNG_CONTROL_REG_ENABLE BIT10 + +#define TRNG_CONFIG_REG (mTrngBaseAddress + 0x18) +#define __MIN_REFILL_SHIFT 0 +#define __MAX_REFILL_SHIFT 16 +#define TRNG_CONFIG_MIN_REFILL_CYCLES (0x05 << __MIN_REFILL_SHIFT) +#define TRNG_CONFIG_MAX_REFILL_CYCLES (0x22 << __MAX_REFILL_SHIFT) + +#define TRNG_FRODETUNE_REG (mTrngBaseAddress + 0x24) +#define TRNG_FRODETUNE_MASK 0x0 + +#define TRNG_FROENABLE_REG (mTrngBaseAddress + 0x20) +#define TRNG_FROENABLE_MASK 0xffffff + +#define TRNG_MAX_RETRIES 20 + +STATIC EFI_PHYSICAL_ADDRESS mTrngBaseAddress; + +/** + Returns information about the random number generation implementation. + + @param[in] This A pointer to the EFI_RNG_PROTOCOL + instance. + @param[in,out] RNGAlgorithmListSize On input, the size in bytes of + RNGAlgorithmList. + On output with a return code of + EFI_SUCCESS, the size in bytes of the + data returned in RNGAlgorithmList. On + output with a return code of + EFI_BUFFER_TOO_SMALL, the size of + RNGAlgorithmList required to obtain the + list. + @param[out] RNGAlgorithmList A caller-allocated memory buffer filled + by the driver with one EFI_RNG_ALGORITHM + element for each supported RNG algorithm. + The list must not change across multiple + calls to the same driver. The first + algorithm in the list is the default + algorithm for the driver. + + @retval EFI_SUCCESS The RNG algorithm list was returned + successfully. + @retval EFI_UNSUPPORTED The services is not supported by this + driver. + @retval EFI_DEVICE_ERROR The list of algorithms could not be + retrieved due to a hardware or firmware + error. + @retval EFI_INVALID_PARAMETER One or more of the parameters are + incorrect. + @retval EFI_BUFFER_TOO_SMALL The buffer RNGAlgorithmList is too small + to hold the result. + +**/ +STATIC +EFI_STATUS +EFIAPI +Armada7k8kRngGetInfo ( + IN EFI_RNG_PROTOCOL *This, + IN OUT UINTN *RNGAlgorithmListSize, + OUT EFI_RNG_ALGORITHM *RNGAlgorithmList + ) +{ + if (This == NULL || RNGAlgorithmListSize == NULL) { + return EFI_INVALID_PARAMETER; + } + + if (*RNGAlgorithmListSize < sizeof (EFI_RNG_ALGORITHM)) { + *RNGAlgorithmListSize = sizeof (EFI_RNG_ALGORITHM); + return EFI_BUFFER_TOO_SMALL; + } + + if (RNGAlgorithmList == NULL) { + return EFI_INVALID_PARAMETER; + } + + *RNGAlgorithmListSize = sizeof (EFI_RNG_ALGORITHM); + CopyGuid (RNGAlgorithmList, &gEfiRngAlgorithmRaw); + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +GetTrngData ( + IN UINTN Length, + OUT UINT8 *Bits + ) +{ + UINTN Tries; + UINT32 Buf[TRNG_OUTPUT_SIZE / sizeof (UINT32)]; + UINTN Index; + + for (Tries = 0; Tries < TRNG_MAX_RETRIES; Tries++) { + if (MmioRead32 (TRNG_STATUS_REG) & TRNG_STATUS_READY) { + for (Index = 0; Index < ARRAY_SIZE (Buf); Index++) { + Buf[Index] = MmioRead32 (TRNG_OUTPUT_REG + Index * sizeof (UINT32)); + } + CopyMem (Bits, Buf, Length); + MmioWrite32 (TRNG_INTACK_REG, TRNG_INTACK_READY); + + return EFI_SUCCESS; + } + // Wait for more TRNG data to arrive + gBS->Stall (10); + } + return EFI_DEVICE_ERROR; +} + +/** + Produces and returns an RNG value using either the default or specified RNG + algorithm. + + @param[in] This A pointer to the EFI_RNG_PROTOCOL + instance. + @param[in] RNGAlgorithm A pointer to the EFI_RNG_ALGORITHM that + identifies the RNG algorithm to use. May + be NULL in which case the function will + use its default RNG algorithm. + @param[in] RNGValueLength The length in bytes of the memory buffer + pointed to by RNGValue. The driver shall + return exactly this numbers of bytes. + @param[out] RNGValue A caller-allocated memory buffer filled + by the driver with the resulting RNG + value. + + @retval EFI_SUCCESS The RNG value was returned successfully. + @retval EFI_UNSUPPORTED The algorithm specified by RNGAlgorithm + is not supported by this driver. + @retval EFI_DEVICE_ERROR An RNG value could not be retrieved due + to a hardware or firmware error. + @retval EFI_NOT_READY There is not enough random data available + to satisfy the length requested by + RNGValueLength. + @retval EFI_INVALID_PARAMETER RNGValue is NULL or RNGValueLength is + zero. + +**/ +STATIC +EFI_STATUS +EFIAPI +Armada7k8kRngGetRNG ( + IN EFI_RNG_PROTOCOL *This, + IN EFI_RNG_ALGORITHM *RNGAlgorithm, OPTIONAL + IN UINTN RNGValueLength, + OUT UINT8 *RNGValue + ) +{ + UINTN Length; + EFI_STATUS Status; + + if (This == NULL || RNGValueLength == 0 || RNGValue == NULL) { + return EFI_INVALID_PARAMETER; + } + + // + // We only support the raw algorithm, so reject requests for anything else + // + if (RNGAlgorithm != NULL && + !CompareGuid (RNGAlgorithm, &gEfiRngAlgorithmRaw)) { + return EFI_UNSUPPORTED; + } + + do { + Length = MIN (RNGValueLength, TRNG_OUTPUT_SIZE); + Status = GetTrngData (Length, RNGValue); + if (EFI_ERROR (Status)) { + return Status; + } + + RNGValue += Length; + RNGValueLength -= Length; + } while (RNGValueLength > 0); + + return EFI_SUCCESS; +} + +STATIC EFI_RNG_PROTOCOL mArmada7k8kRngProtocol = { + Armada7k8kRngGetInfo, + Armada7k8kRngGetRNG +}; + +// +// Entry point of this driver. +// +EFI_STATUS +EFIAPI +Armada7k8kRngDxeEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + mTrngBaseAddress = PcdGet64 (PcdEip76TrngBaseAddress); + + // + // Disable the TRNG before updating its configuration + // + MmioAnd32 (TRNG_CONTROL_REG, ~TRNG_CONTROL_REG_ENABLE); + + // + // Configure the internal conditioning parameters of the TRNG + // + MmioWrite32 (TRNG_CONFIG_REG, TRNG_CONFIG_MIN_REFILL_CYCLES | + TRNG_CONFIG_MAX_REFILL_CYCLES); + + // + // Configure the FROs + // + MmioWrite32 (TRNG_FRODETUNE_REG, TRNG_FRODETUNE_MASK); + MmioWrite32 (TRNG_FROENABLE_REG, TRNG_FROENABLE_MASK); + + // + // Enable the TRNG + // + MmioOr32 (TRNG_CONTROL_REG, TRNG_CONTROL_REG_ENABLE); + + return SystemTable->BootServices->InstallMultipleProtocolInterfaces ( + &ImageHandle, + &gEfiRngProtocolGuid, + &mArmada7k8kRngProtocol, + NULL + ); +} diff --git a/Silicon/Marvell/Armada7k8k/Drivers/Armada7k8kRngDxe/Armada7k8kRngDxe.inf b/Silicon/Marvell/Armada7k8k/Drivers/Armada7k8kRngDxe/Armada7k8kRngDxe.inf new file mode 100644 index 0000000..e6561f3 --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Drivers/Armada7k8kRngDxe/Armada7k8kRngDxe.inf @@ -0,0 +1,47 @@ +## @file +# This driver produces an EFI_RNG_PROTOCOL instance for the Armada 70x0 TRNG +# +# Copyright (C) 2017, Linaro Ltd. All rights reserved.
+# +# This program and the accompanying materials are licensed and made available +# under the terms and conditions of the BSD License which accompanies this +# distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT +# WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = Armada7k8kRngDxe + FILE_GUID = dd87096a-cae5-4328-bec1-2ddb755f2e08 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = Armada7k8kRngDxeEntryPoint + +[Sources] + Armada7k8kRngDxe.c + +[Packages] + MdePkg/MdePkg.dec + Silicon/Marvell/Marvell.dec + +[LibraryClasses] + BaseMemoryLib + IoLib + PcdLib + UefiDriverEntryPoint + +[Pcd] + gMarvellTokenSpaceGuid.PcdEip76TrngBaseAddress + +[Protocols] + gEfiRngProtocolGuid ## PRODUCES + +[Guids] + gEfiRngAlgorithmRaw + +[Depex] + TRUE diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S b/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S deleted file mode 100644 index 72f8cfc..0000000 --- a/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/AArch64/ArmPlatformHelper.S +++ /dev/null @@ -1,51 +0,0 @@ -//Based on ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S -// -// Copyright (c) 2012-2013, ARM Limited. All rights reserved. -// Copyright (c) 2016, Marvell. All rights reserved. -// -// This program and the accompanying materials are licensed and made available -// under the terms and conditions of the BSD License which accompanies this -// distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED -// - -#include -#include - -ASM_FUNC(ArmPlatformPeiBootAction) - mov x29, xzr - ret - -//UINTN -//ArmPlatformGetCorePosition ( -// IN UINTN MpId -// ); -// With this function: CorePos = (ClusterId * 4) + CoreId -ASM_FUNC(ArmPlatformGetCorePosition) - and x1, x0, #ARM_CORE_MASK - and x0, x0, #ARM_CLUSTER_MASK - add x0, x1, x0, LSR #6 - ret - -//UINTN -//ArmPlatformGetPrimaryCoreMpId ( -// VOID -// ); -ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) - MOV32 (w0, FixedPcdGet32(PcdArmPrimaryCore)) - ret - -//UINTN -//ArmPlatformIsPrimaryCore ( -// IN UINTN MpId -// ); -ASM_FUNC(ArmPlatformIsPrimaryCore) - MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCoreMask)) - and x0, x0, x1 - MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCore)) - cmp w0, w1 - cset x0, eq - ret diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S b/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S deleted file mode 100644 index 21459e5..0000000 --- a/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/ARM/ArmPlatformHelper.S +++ /dev/null @@ -1,77 +0,0 @@ -//Based on ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S -// -// Copyright (c) 2012-2013, ARM Limited. All rights reserved. -// Copyright (c) 2016, Marvell. All rights reserved. -// Copyright (c) 2017, Linaro Limited. All rights reserved. -// -// This program and the accompanying materials are licensed and made available -// under the terms and conditions of the BSD License which accompanies this -// distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED -// - -#include -#include - -#define CCU_MC_BASE 0xF0001700 -#define CCU_MC_RCR_OFFSET 0x0 -#define CCU_MC_RCR_REMAP_EN BIT0 -#define CCU_MC_RCR_REMAP_SIZE(Size) (((Size) - 1) ^ (SIZE_1MB - 1)) - -#define CCU_MC_RSBR_OFFSET 0x4 -#define CCU_MC_RSBR_SOURCE_BASE(Base) (((Base) >> 20) << 10) -#define CCU_MC_RTBR_OFFSET 0x8 -#define CCU_MC_RTBR_TARGET_BASE(Base) (((Base) >> 20) << 10) - -ASM_FUNC(ArmPlatformPeiBootAction) - .if FixedPcdGet64 (PcdSystemMemoryBase) != 0 - .err PcdSystemMemoryBase should be 0x0 on this platform! - .endif - - .if FixedPcdGet64 (PcdSystemMemorySize) > FixedPcdGet32 (PcdDramRemapTarget) - // - // Use the low range for UEFI itself. The remaining memory will be mapped - // and added to the GCD map later. - // - ADRL (r0, mSystemMemoryEnd) - MOV32 (r2, FixedPcdGet32 (PcdDramRemapTarget) - 1) - mov r3, #0 - strd r2, r3, [r0] - .endif - - bx lr - -//UINTN -//ArmPlatformGetCorePosition ( -// IN UINTN MpId -// ); -// With this function: CorePos = (ClusterId * 2) + CoreId -ASM_FUNC(ArmPlatformGetCorePosition) - and r1, r0, #ARM_CORE_MASK - and r0, r0, #ARM_CLUSTER_MASK - add r0, r1, r0, LSR #7 - bx lr - -//UINTN -//ArmPlatformGetPrimaryCoreMpId ( -// VOID -// ); -ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) - MOV32 (r0, FixedPcdGet32(PcdArmPrimaryCore)) - bx lr - -//UINTN -//ArmPlatformIsPrimaryCore ( -// IN UINTN MpId -// ); -ASM_FUNC(ArmPlatformIsPrimaryCore) - MOV32 (r1, FixedPcdGet32(PcdArmPrimaryCoreMask)) - and r0, r0, r1 - MOV32 (r1, FixedPcdGet32(PcdArmPrimaryCore)) - cmp r0, r1 - moveq r0, #1 - movne r0, #0 - bx lr diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0Lib.c b/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0Lib.c deleted file mode 100644 index b2b4155..0000000 --- a/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0Lib.c +++ /dev/null @@ -1,132 +0,0 @@ -/**Based on ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.c -* -* Copyright (c) 2011-2012, ARM Limited. All rights reserved. -* Copyright (c) 2016, Marvell International Ltd. All rights reserved. -* -* This program and the accompanying materials are licensed and made available -* under the terms and conditions of the BSD License which accompanies this -* distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include -#include -#include - -ARM_CORE_INFO mArmada7040MpCoreInfoTable[] = { - { - // Cluster 0, Core 0 - 0x0, 0x0, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)0, - (EFI_PHYSICAL_ADDRESS)0, - (EFI_PHYSICAL_ADDRESS)0, - (UINT64)0xFFFFFFFF - }, - { - // Cluster 0, Core 1 - 0x0, 0x1, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)0, - (EFI_PHYSICAL_ADDRESS)0, - (EFI_PHYSICAL_ADDRESS)0, - (UINT64)0xFFFFFFFF - }, - { - // Cluster 0, Core 2 - 0x0, 0x2, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)0, - (EFI_PHYSICAL_ADDRESS)0, - (EFI_PHYSICAL_ADDRESS)0, - (UINT64)0xFFFFFFFF - }, - { - // Cluster 0, Core 3 - 0x0, 0x3, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)0, - (EFI_PHYSICAL_ADDRESS)0, - (EFI_PHYSICAL_ADDRESS)0, - (UINT64)0xFFFFFFFF - } -}; - -/** - Return the current Boot Mode - - This function returns the boot reason on the platform - -**/ -EFI_BOOT_MODE -ArmPlatformGetBootMode ( - VOID - ) -{ - return BOOT_WITH_FULL_CONFIGURATION; -} - -/** - Initialize controllers that must setup in the normal world - - This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei - in the PEI phase. - -**/ -RETURN_STATUS -ArmPlatformInitialize ( - IN UINTN MpId - ) -{ - return RETURN_SUCCESS; -} - -EFI_STATUS -PrePeiCoreGetMpCoreInfo ( - OUT UINTN *CoreCount, - OUT ARM_CORE_INFO **ArmCoreTable - ) -{ - if (ArmIsMpCore()) { - *CoreCount = sizeof(mArmada7040MpCoreInfoTable) / sizeof(ARM_CORE_INFO); - *ArmCoreTable = mArmada7040MpCoreInfoTable; - return EFI_SUCCESS; - } else { - return EFI_UNSUPPORTED; - } -} - -ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; - -EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { - { - EFI_PEI_PPI_DESCRIPTOR_PPI, - &gArmMpCoreInfoPpiGuid, - &mMpCoreInfoPpi - } -}; - -VOID -ArmPlatformGetPlatformPpiList ( - OUT UINTN *PpiListSize, - OUT EFI_PEI_PPI_DESCRIPTOR **PpiList - ) -{ - if (ArmIsMpCore()) { - *PpiListSize = sizeof(gPlatformPpiTable); - *PpiList = gPlatformPpiTable; - } else { - *PpiListSize = 0; - *PpiList = NULL; - } -} - - diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0Lib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0Lib.inf deleted file mode 100644 index 4d4edc8..0000000 --- a/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0Lib.inf +++ /dev/null @@ -1,76 +0,0 @@ -# Copyright (C) 2016 Marvell International Ltd. -# -# Marvell BSD License Option -# -# If you received this File from Marvell, you may opt to use, redistribute -# and/or modify this File under the following licensing terms. -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: -# -# * Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# * Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# * Neither the name of Marvell nor the names of its contributors may be -# used to endorse or promote products derived from this software without -# specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, -# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = Armada7040Lib - FILE_GUID = 3f29b642-4a49-4dfd-8f4a-205dd38432bb - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = ArmPlatformLib - -[Packages] - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - Silicon/Marvell/Marvell.dec - -[LibraryClasses] - ArmLib - ComPhyLib - DebugLib - MemoryAllocationLib - MppLib - UtmiPhyLib - -[Sources.common] - Armada70x0Lib.c - Armada70x0LibMem.c - -[Sources.AArch64] - AArch64/ArmPlatformHelper.S - -[Sources.ARM] - ARM/ArmPlatformHelper.S - -[FixedPcd] - gArmTokenSpaceGuid.PcdSystemMemoryBase - gArmTokenSpaceGuid.PcdSystemMemorySize - - gArmTokenSpaceGuid.PcdArmPrimaryCoreMask - gArmTokenSpaceGuid.PcdArmPrimaryCore - - gMarvellTokenSpaceGuid.PcdConfigSpaceBaseAddress - -[Ppis] - gArmMpCoreInfoPpiGuid diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0LibMem.c b/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0LibMem.c deleted file mode 100644 index f384415..0000000 --- a/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0LibMem.c +++ /dev/null @@ -1,204 +0,0 @@ -/******************************************************************************* -Copyright (C) 2016 Marvell International Ltd. - -Marvell BSD License Option - -If you received this File from Marvell, you may opt to use, redistribute and/or -modify this File under the following licensing terms. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - -* Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - -* Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - -* Neither the name of Marvell nor the names of its contributors may be - used to endorse or promote products derived from this software without - specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -*******************************************************************************/ - -#include -#include -#include -#include -#include -#include - -#include "Armada70x0LibMem.h" - -// The total number of descriptors, including the final "end-of-table" descriptor. -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16 - -// DDR attributes -#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK -#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED - -STATIC ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS]; - -// Obtain DRAM size basing on register values filled by early firmware. -STATIC -UINT64 -GetDramSize ( - IN OUT UINT64 *MemSize - ) -{ - UINT64 BaseAddr; - UINT8 RegionCode; - UINT8 Cs; - - *MemSize = 0; - - for (Cs = 0; Cs < DRAM_MAX_CS_NUM; Cs++) { - - /* Exit loop on first disabled DRAM CS */ - if (!DRAM_CS_ENABLED (Cs)) { - break; - } - - /* - * Sanity check for base address of next DRAM block. - * Only continuous space will be used. - */ - BaseAddr = GET_DRAM_REGION_BASE (Cs); - if (BaseAddr != *MemSize) { - DEBUG ((DEBUG_ERROR, - "%a: DRAM blocks are not contiguous, limit size to 0x%llx\n", - __FUNCTION__, - *MemSize)); - return EFI_SUCCESS; - } - - /* Decode area length for current CS from register value */ - RegionCode = GET_DRAM_REGION_SIZE_CODE (Cs); - - if (DRAM_REGION_SIZE_EVEN (RegionCode)) { - *MemSize += GET_DRAM_REGION_SIZE_EVEN (RegionCode); - } else if (DRAM_REGION_SIZE_ODD (RegionCode)) { - *MemSize += GET_DRAM_REGION_SIZE_ODD (RegionCode); - } else { - DEBUG ((DEBUG_ERROR, - "%a: Invalid memory region code (0x%x) for CS#%d\n", - __FUNCTION__, - RegionCode, - Cs)); - return EFI_INVALID_PARAMETER; - } - } - - return EFI_SUCCESS; -} - -/** - Return the Virtual Memory Map of your platform - - This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform. - - @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to- - Virtual Memory mapping. This array must be ended by a zero-filled - entry - -**/ -VOID -ArmPlatformGetVirtualMemoryMap ( - IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap - ) -{ - UINTN Index = 0; - UINT64 MemSize; - UINT64 MemLowSize; - UINT64 MemHighStart; - UINT64 MemHighSize; - UINT64 ConfigSpaceBaseAddr; - EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; - EFI_STATUS Status; - - ASSERT (VirtualMemoryMap != NULL); - - ConfigSpaceBaseAddr = FixedPcdGet64 (PcdConfigSpaceBaseAddress); - - // Obtain total memory size from the hardware. - Status = GetDramSize (&MemSize); - if (EFI_ERROR (Status)) { - MemSize = FixedPcdGet64 (PcdSystemMemorySize); - DEBUG ((DEBUG_ERROR, "Limit total memory size to %d MB\n", MemSize / 1024 / 1024)); - } - - if (DRAM_REMAP_ENABLED) { - MemLowSize = MIN (DRAM_REMAP_TARGET, MemSize); - MemHighStart = (UINT64)DRAM_REMAP_TARGET + DRAM_REMAP_SIZE; - MemHighSize = MemSize - MemLowSize; - } else { - MemLowSize = MIN (ConfigSpaceBaseAddr, MemSize); - } - - ResourceAttributes = ( - EFI_RESOURCE_ATTRIBUTE_PRESENT | - EFI_RESOURCE_ATTRIBUTE_INITIALIZED | - EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | - EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | - EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | - EFI_RESOURCE_ATTRIBUTE_TESTED - ); - - BuildResourceDescriptorHob ( - EFI_RESOURCE_SYSTEM_MEMORY, - ResourceAttributes, - FixedPcdGet64 (PcdSystemMemoryBase), - MemLowSize - ); - - // DDR - mVirtualMemoryTable[Index].PhysicalBase = FixedPcdGet64 (PcdSystemMemoryBase); - mVirtualMemoryTable[Index].VirtualBase = FixedPcdGet64 (PcdSystemMemoryBase); - mVirtualMemoryTable[Index].Length = MemLowSize; - mVirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_CACHED; - - // Configuration space - mVirtualMemoryTable[++Index].PhysicalBase = ConfigSpaceBaseAddr; - mVirtualMemoryTable[Index].VirtualBase = ConfigSpaceBaseAddr; - mVirtualMemoryTable[Index].Length = SIZE_4GB - ConfigSpaceBaseAddr; - mVirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; - - if (MemSize > MemLowSize) { - // - // If we have more than MemLowSize worth of DRAM, the remainder will be - // mapped at the top of the remapped window. - // - mVirtualMemoryTable[++Index].PhysicalBase = MemHighStart; - mVirtualMemoryTable[Index].VirtualBase = MemHighStart; - mVirtualMemoryTable[Index].Length = MemHighSize; - mVirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_CACHED; - - BuildResourceDescriptorHob ( - EFI_RESOURCE_SYSTEM_MEMORY, - ResourceAttributes, - MemHighStart, - MemHighSize - ); - } - - // End of Table - mVirtualMemoryTable[++Index].PhysicalBase = 0; - mVirtualMemoryTable[Index].VirtualBase = 0; - mVirtualMemoryTable[Index].Length = 0; - mVirtualMemoryTable[Index].Attributes = 0; - - ASSERT((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); - - *VirtualMemoryMap = mVirtualMemoryTable; -} diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0LibMem.h b/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0LibMem.h deleted file mode 100644 index cc30e4a..0000000 --- a/Silicon/Marvell/Armada7k8k/Library/Armada70x0Lib/Armada70x0LibMem.h +++ /dev/null @@ -1,73 +0,0 @@ -/******************************************************************************* -Copyright (C) 2017 Marvell International Ltd. - -Marvell BSD License Option - -If you received this File from Marvell, you may opt to use, redistribute and/or -modify this File under the following licensing terms. -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - -* Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - -* Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - -* Neither the name of Marvell nor the names of its contributors may be - used to endorse or promote products derived from this software without - specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -*******************************************************************************/ - -#define CCU_MC_RCR_REG 0xf0001700 -#define REMAP_EN_MASK 0x1 -#define REMAP_SIZE_OFFS 20 -#define REMAP_SIZE_MASK (0xfff << REMAP_SIZE_OFFS) -#define CCU_MC_RTBR_REG 0xf0001708 -#define TARGET_BASE_OFFS 10 -#define TARGET_BASE_MASK (0xfffff << TARGET_BASE_OFFS) - -#define DRAM_REMAP_ENABLED \ - (MmioRead32 (CCU_MC_RCR_REG) & REMAP_EN_MASK) -#define DRAM_REMAP_SIZE \ - (MmioRead32 (CCU_MC_RCR_REG) & REMAP_SIZE_MASK) + SIZE_1MB -#define DRAM_REMAP_TARGET \ - (MmioRead32 (CCU_MC_RTBR_REG) << TARGET_BASE_OFFS) - -#define DRAM_CH0_MMAP_LOW_REG(cs) (0xf0020200 + (cs) * 0x8) -#define DRAM_CS_VALID_ENABLED_MASK 0x1 -#define DRAM_AREA_LENGTH_OFFS 16 -#define DRAM_AREA_LENGTH_MASK (0x1f << DRAM_AREA_LENGTH_OFFS) -#define DRAM_START_ADDRESS_L_OFFS 23 -#define DRAM_START_ADDRESS_L_MASK (0x1ff << DRAM_START_ADDRESS_L_OFFS) -#define DRAM_CH0_MMAP_HIGH_REG(cs) (0xf0020204 + (cs) * 0x8) -#define DRAM_START_ADDR_HTOL_OFFS 32 - -#define DRAM_MAX_CS_NUM 8 - -#define DRAM_CS_ENABLED(Cs) \ - (MmioRead32 (DRAM_CH0_MMAP_LOW_REG (Cs)) & DRAM_CS_VALID_ENABLED_MASK) -#define GET_DRAM_REGION_BASE(Cs) \ - ((UINT64)MmioRead32 (DRAM_CH0_MMAP_HIGH_REG ((Cs))) << \ - DRAM_START_ADDR_HTOL_OFFS) | \ - (MmioRead32 (DRAM_CH0_MMAP_LOW_REG (Cs)) & DRAM_START_ADDRESS_L_MASK); -#define GET_DRAM_REGION_SIZE_CODE(Cs) \ - (MmioRead32 (DRAM_CH0_MMAP_LOW_REG ((Cs))) & \ - DRAM_AREA_LENGTH_MASK) >> DRAM_AREA_LENGTH_OFFS -#define DRAM_REGION_SIZE_EVEN(C) (((C) >= 7) && ((C) <= 26)) -#define GET_DRAM_REGION_SIZE_EVEN(C) ((UINT64)1 << ((C) + 16)) -#define DRAM_REGION_SIZE_ODD(C) ((C) <= 4) -#define GET_DRAM_REGION_SIZE_ODD(C) ((UINT64)0x18000000 << (C)) diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.c deleted file mode 100644 index 53119f4..0000000 --- a/Silicon/Marvell/Armada7k8k/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.c +++ /dev/null @@ -1,158 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2015, ARM Limited. All rights reserved. -* Copyright (c) 2017, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include - -#include -#include -#include -#include -#include - -VOID -BuildMemoryTypeInformationHob ( - VOID - ); - -STATIC -VOID -InitMmu ( - IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable - ) -{ - - VOID *TranslationTableBase; - UINTN TranslationTableSize; - RETURN_STATUS Status; - - Status = ArmConfigureMmu (MemoryTable, - &TranslationTableBase, - &TranslationTableSize); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Error: Failed to enable MMU\n")); - } -} - -/*++ - -Routine Description: - - - -Arguments: - - FileHandle - Handle of the file being invoked. - PeiServices - Describes the list of possible PEI Services. - -Returns: - - Status - EFI_SUCCESS if the boot mode could be set - ---*/ -EFI_STATUS -EFIAPI -MemoryPeim ( - IN EFI_PHYSICAL_ADDRESS UefiMemoryBase, - IN UINT64 UefiMemorySize - ) -{ - ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable; - EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; - UINT64 ResourceLength; - EFI_PEI_HOB_POINTERS NextHob; - EFI_PHYSICAL_ADDRESS SecureTop; - EFI_PHYSICAL_ADDRESS ResourceTop; - - // Get Virtual Memory Map from the Platform Library - ArmPlatformGetVirtualMemoryMap (&MemoryTable); - - SecureTop = (EFI_PHYSICAL_ADDRESS)FixedPcdGet64 (PcdSecureRegionBase) + - FixedPcdGet32 (PcdSecureRegionSize); - - // - // Search for System Memory Hob that covers the secure firmware, - // and punch a hole in it - // - for (NextHob.Raw = GetHobList (); - NextHob.Raw != NULL; - NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, - NextHob.Raw)) { - - if ((NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) && - (FixedPcdGet64 (PcdSecureRegionBase) >= NextHob.ResourceDescriptor->PhysicalStart) && - (SecureTop <= NextHob.ResourceDescriptor->PhysicalStart + - NextHob.ResourceDescriptor->ResourceLength)) - { - ResourceAttributes = NextHob.ResourceDescriptor->ResourceAttribute; - ResourceLength = NextHob.ResourceDescriptor->ResourceLength; - ResourceTop = NextHob.ResourceDescriptor->PhysicalStart + ResourceLength; - - if (FixedPcdGet64 (PcdSecureRegionBase) == NextHob.ResourceDescriptor->PhysicalStart) { - // - // This region starts right at the start of the reserved region, so we - // can simply move its start pointer and reduce its length by the same - // value - // - NextHob.ResourceDescriptor->PhysicalStart += FixedPcdGet32 (PcdSecureRegionSize); - NextHob.ResourceDescriptor->ResourceLength -= FixedPcdGet32 (PcdSecureRegionSize); - - } else if ((NextHob.ResourceDescriptor->PhysicalStart + - NextHob.ResourceDescriptor->ResourceLength) == SecureTop) { - - // - // This region ends right at the end of the reserved region, so we - // can simply reduce its length by the size of the region. - // - NextHob.ResourceDescriptor->ResourceLength -= FixedPcdGet32 (PcdSecureRegionSize); - - } else { - // - // This region covers the reserved region. So split it into two regions, - // each one touching the reserved region at either end, but not covering - // it. - // - NextHob.ResourceDescriptor->ResourceLength = FixedPcdGet64 (PcdSecureRegionBase) - - NextHob.ResourceDescriptor->PhysicalStart; - - // Create the System Memory HOB for the remaining region (top of the FD) - BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY, - ResourceAttributes, - SecureTop, - ResourceTop - SecureTop); - } - - // - // Reserve the memory space occupied by the secure firmware - // - BuildResourceDescriptorHob (EFI_RESOURCE_MEMORY_RESERVED, - 0, - FixedPcdGet64 (PcdSecureRegionBase), - FixedPcdGet32 (PcdSecureRegionSize)); - - break; - } - NextHob.Raw = GET_NEXT_HOB (NextHob); - } - - // Build Memory Allocation Hob - InitMmu (MemoryTable); - - if (FeaturePcdGet (PcdPrePiProduceMemoryTypeInformationHob)) { - // Optional feature that helps prevent EFI memory map fragmentation. - BuildMemoryTypeInformationHob (); - } - - return EFI_SUCCESS; -} diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.inf deleted file mode 100644 index adc5b9a..0000000 --- a/Silicon/Marvell/Armada7k8k/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.inf +++ /dev/null @@ -1,46 +0,0 @@ -#/** @file -# -# Copyright (c) 2011-2014, ARM Ltd. All rights reserved.
-# Copyright (c) 2017, Linaro Ltd. All rights reserved.
-# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010019 - BASE_NAME = Armada70x0MemoryInitPeiLib - FILE_GUID = abc4e8a7-89a7-4aea-92bc-0e9421c4a473 - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = MemoryInitPeiLib|SEC PEIM - -[Sources] - Armada70x0MemoryInitPeiLib.c - -[Packages] - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - EmbeddedPkg/EmbeddedPkg.dec - MdeModulePkg/MdeModulePkg.dec - MdePkg/MdePkg.dec - Silicon/Marvell/Marvell.dec - -[LibraryClasses] - ArmPlatformLib - DebugLib - HobLib - ArmMmuLib - -[FeaturePcd] - gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob - -[FixedPcd] - gMarvellTokenSpaceGuid.PcdSecureRegionBase - gMarvellTokenSpaceGuid.PcdSecureRegionSize diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/AArch64/ArmPlatformHelper.S b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/AArch64/ArmPlatformHelper.S new file mode 100644 index 0000000..72f8cfc --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/AArch64/ArmPlatformHelper.S @@ -0,0 +1,51 @@ +//Based on ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S +// +// Copyright (c) 2012-2013, ARM Limited. All rights reserved. +// Copyright (c) 2016, Marvell. All rights reserved. +// +// This program and the accompanying materials are licensed and made available +// under the terms and conditions of the BSD License which accompanies this +// distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED +// + +#include +#include + +ASM_FUNC(ArmPlatformPeiBootAction) + mov x29, xzr + ret + +//UINTN +//ArmPlatformGetCorePosition ( +// IN UINTN MpId +// ); +// With this function: CorePos = (ClusterId * 4) + CoreId +ASM_FUNC(ArmPlatformGetCorePosition) + and x1, x0, #ARM_CORE_MASK + and x0, x0, #ARM_CLUSTER_MASK + add x0, x1, x0, LSR #6 + ret + +//UINTN +//ArmPlatformGetPrimaryCoreMpId ( +// VOID +// ); +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) + MOV32 (w0, FixedPcdGet32(PcdArmPrimaryCore)) + ret + +//UINTN +//ArmPlatformIsPrimaryCore ( +// IN UINTN MpId +// ); +ASM_FUNC(ArmPlatformIsPrimaryCore) + MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCoreMask)) + and x0, x0, x1 + MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCore)) + cmp w0, w1 + cset x0, eq + ret diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/ARM/ArmPlatformHelper.S b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/ARM/ArmPlatformHelper.S new file mode 100644 index 0000000..21459e5 --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/ARM/ArmPlatformHelper.S @@ -0,0 +1,77 @@ +//Based on ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S +// +// Copyright (c) 2012-2013, ARM Limited. All rights reserved. +// Copyright (c) 2016, Marvell. All rights reserved. +// Copyright (c) 2017, Linaro Limited. All rights reserved. +// +// This program and the accompanying materials are licensed and made available +// under the terms and conditions of the BSD License which accompanies this +// distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED +// + +#include +#include + +#define CCU_MC_BASE 0xF0001700 +#define CCU_MC_RCR_OFFSET 0x0 +#define CCU_MC_RCR_REMAP_EN BIT0 +#define CCU_MC_RCR_REMAP_SIZE(Size) (((Size) - 1) ^ (SIZE_1MB - 1)) + +#define CCU_MC_RSBR_OFFSET 0x4 +#define CCU_MC_RSBR_SOURCE_BASE(Base) (((Base) >> 20) << 10) +#define CCU_MC_RTBR_OFFSET 0x8 +#define CCU_MC_RTBR_TARGET_BASE(Base) (((Base) >> 20) << 10) + +ASM_FUNC(ArmPlatformPeiBootAction) + .if FixedPcdGet64 (PcdSystemMemoryBase) != 0 + .err PcdSystemMemoryBase should be 0x0 on this platform! + .endif + + .if FixedPcdGet64 (PcdSystemMemorySize) > FixedPcdGet32 (PcdDramRemapTarget) + // + // Use the low range for UEFI itself. The remaining memory will be mapped + // and added to the GCD map later. + // + ADRL (r0, mSystemMemoryEnd) + MOV32 (r2, FixedPcdGet32 (PcdDramRemapTarget) - 1) + mov r3, #0 + strd r2, r3, [r0] + .endif + + bx lr + +//UINTN +//ArmPlatformGetCorePosition ( +// IN UINTN MpId +// ); +// With this function: CorePos = (ClusterId * 2) + CoreId +ASM_FUNC(ArmPlatformGetCorePosition) + and r1, r0, #ARM_CORE_MASK + and r0, r0, #ARM_CLUSTER_MASK + add r0, r1, r0, LSR #7 + bx lr + +//UINTN +//ArmPlatformGetPrimaryCoreMpId ( +// VOID +// ); +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) + MOV32 (r0, FixedPcdGet32(PcdArmPrimaryCore)) + bx lr + +//UINTN +//ArmPlatformIsPrimaryCore ( +// IN UINTN MpId +// ); +ASM_FUNC(ArmPlatformIsPrimaryCore) + MOV32 (r1, FixedPcdGet32(PcdArmPrimaryCoreMask)) + and r0, r0, r1 + MOV32 (r1, FixedPcdGet32(PcdArmPrimaryCore)) + cmp r0, r1 + moveq r0, #1 + movne r0, #0 + bx lr diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.c new file mode 100644 index 0000000..233f7b1 --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.c @@ -0,0 +1,132 @@ +/**Based on ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.c +* +* Copyright (c) 2011-2012, ARM Limited. All rights reserved. +* Copyright (c) 2016, Marvell International Ltd. All rights reserved. +* +* This program and the accompanying materials are licensed and made available +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include +#include +#include + +ARM_CORE_INFO mArmada7k8kMpCoreInfoTable[] = { + { + // Cluster 0, Core 0 + 0x0, 0x0, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (EFI_PHYSICAL_ADDRESS)0, + (EFI_PHYSICAL_ADDRESS)0, + (EFI_PHYSICAL_ADDRESS)0, + (UINT64)0xFFFFFFFF + }, + { + // Cluster 0, Core 1 + 0x0, 0x1, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (EFI_PHYSICAL_ADDRESS)0, + (EFI_PHYSICAL_ADDRESS)0, + (EFI_PHYSICAL_ADDRESS)0, + (UINT64)0xFFFFFFFF + }, + { + // Cluster 0, Core 2 + 0x0, 0x2, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (EFI_PHYSICAL_ADDRESS)0, + (EFI_PHYSICAL_ADDRESS)0, + (EFI_PHYSICAL_ADDRESS)0, + (UINT64)0xFFFFFFFF + }, + { + // Cluster 0, Core 3 + 0x0, 0x3, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (EFI_PHYSICAL_ADDRESS)0, + (EFI_PHYSICAL_ADDRESS)0, + (EFI_PHYSICAL_ADDRESS)0, + (UINT64)0xFFFFFFFF + } +}; + +/** + Return the current Boot Mode + + This function returns the boot reason on the platform + +**/ +EFI_BOOT_MODE +ArmPlatformGetBootMode ( + VOID + ) +{ + return BOOT_WITH_FULL_CONFIGURATION; +} + +/** + Initialize controllers that must setup in the normal world + + This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei + in the PEI phase. + +**/ +RETURN_STATUS +ArmPlatformInitialize ( + IN UINTN MpId + ) +{ + return RETURN_SUCCESS; +} + +EFI_STATUS +PrePeiCoreGetMpCoreInfo ( + OUT UINTN *CoreCount, + OUT ARM_CORE_INFO **ArmCoreTable + ) +{ + if (ArmIsMpCore()) { + *CoreCount = sizeof(mArmada7k8kMpCoreInfoTable) / sizeof(ARM_CORE_INFO); + *ArmCoreTable = mArmada7k8kMpCoreInfoTable; + return EFI_SUCCESS; + } else { + return EFI_UNSUPPORTED; + } +} + +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; + +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { + { + EFI_PEI_PPI_DESCRIPTOR_PPI, + &gArmMpCoreInfoPpiGuid, + &mMpCoreInfoPpi + } +}; + +VOID +ArmPlatformGetPlatformPpiList ( + OUT UINTN *PpiListSize, + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList + ) +{ + if (ArmIsMpCore()) { + *PpiListSize = sizeof(gPlatformPpiTable); + *PpiList = gPlatformPpiTable; + } else { + *PpiListSize = 0; + *PpiList = NULL; + } +} + + diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf new file mode 100644 index 0000000..d38b467 --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf @@ -0,0 +1,76 @@ +# Copyright (C) 2016 Marvell International Ltd. +# +# Marvell BSD License Option +# +# If you received this File from Marvell, you may opt to use, redistribute +# and/or modify this File under the following licensing terms. +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# * Neither the name of Marvell nor the names of its contributors may be +# used to endorse or promote products derived from this software without +# specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = Armada7k8kLib + FILE_GUID = 3f29b642-4a49-4dfd-8f4a-205dd38432bb + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmPlatformLib + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/Marvell/Marvell.dec + +[LibraryClasses] + ArmLib + ComPhyLib + DebugLib + MemoryAllocationLib + MppLib + UtmiPhyLib + +[Sources.common] + Armada7k8kLib.c + Armada7k8kLibMem.c + +[Sources.AArch64] + AArch64/ArmPlatformHelper.S + +[Sources.ARM] + ARM/ArmPlatformHelper.S + +[FixedPcd] + gArmTokenSpaceGuid.PcdSystemMemoryBase + gArmTokenSpaceGuid.PcdSystemMemorySize + + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask + gArmTokenSpaceGuid.PcdArmPrimaryCore + + gMarvellTokenSpaceGuid.PcdConfigSpaceBaseAddress + +[Ppis] + gArmMpCoreInfoPpiGuid diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c new file mode 100644 index 0000000..2a4f5ad --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.c @@ -0,0 +1,204 @@ +/******************************************************************************* +Copyright (C) 2016 Marvell International Ltd. + +Marvell BSD License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +* Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + +* Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + +* Neither the name of Marvell nor the names of its contributors may be + used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +#include +#include +#include +#include +#include +#include + +#include "Armada7k8kLibMem.h" + +// The total number of descriptors, including the final "end-of-table" descriptor. +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16 + +// DDR attributes +#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK +#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED + +STATIC ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS]; + +// Obtain DRAM size basing on register values filled by early firmware. +STATIC +UINT64 +GetDramSize ( + IN OUT UINT64 *MemSize + ) +{ + UINT64 BaseAddr; + UINT8 RegionCode; + UINT8 Cs; + + *MemSize = 0; + + for (Cs = 0; Cs < DRAM_MAX_CS_NUM; Cs++) { + + /* Exit loop on first disabled DRAM CS */ + if (!DRAM_CS_ENABLED (Cs)) { + break; + } + + /* + * Sanity check for base address of next DRAM block. + * Only continuous space will be used. + */ + BaseAddr = GET_DRAM_REGION_BASE (Cs); + if (BaseAddr != *MemSize) { + DEBUG ((DEBUG_ERROR, + "%a: DRAM blocks are not contiguous, limit size to 0x%llx\n", + __FUNCTION__, + *MemSize)); + return EFI_SUCCESS; + } + + /* Decode area length for current CS from register value */ + RegionCode = GET_DRAM_REGION_SIZE_CODE (Cs); + + if (DRAM_REGION_SIZE_EVEN (RegionCode)) { + *MemSize += GET_DRAM_REGION_SIZE_EVEN (RegionCode); + } else if (DRAM_REGION_SIZE_ODD (RegionCode)) { + *MemSize += GET_DRAM_REGION_SIZE_ODD (RegionCode); + } else { + DEBUG ((DEBUG_ERROR, + "%a: Invalid memory region code (0x%x) for CS#%d\n", + __FUNCTION__, + RegionCode, + Cs)); + return EFI_INVALID_PARAMETER; + } + } + + return EFI_SUCCESS; +} + +/** + Return the Virtual Memory Map of your platform + + This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform. + + @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to- + Virtual Memory mapping. This array must be ended by a zero-filled + entry + +**/ +VOID +ArmPlatformGetVirtualMemoryMap ( + IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap + ) +{ + UINTN Index = 0; + UINT64 MemSize; + UINT64 MemLowSize; + UINT64 MemHighStart; + UINT64 MemHighSize; + UINT64 ConfigSpaceBaseAddr; + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; + EFI_STATUS Status; + + ASSERT (VirtualMemoryMap != NULL); + + ConfigSpaceBaseAddr = FixedPcdGet64 (PcdConfigSpaceBaseAddress); + + // Obtain total memory size from the hardware. + Status = GetDramSize (&MemSize); + if (EFI_ERROR (Status)) { + MemSize = FixedPcdGet64 (PcdSystemMemorySize); + DEBUG ((DEBUG_ERROR, "Limit total memory size to %d MB\n", MemSize / 1024 / 1024)); + } + + if (DRAM_REMAP_ENABLED) { + MemLowSize = MIN (DRAM_REMAP_TARGET, MemSize); + MemHighStart = (UINT64)DRAM_REMAP_TARGET + DRAM_REMAP_SIZE; + MemHighSize = MemSize - MemLowSize; + } else { + MemLowSize = MIN (ConfigSpaceBaseAddr, MemSize); + } + + ResourceAttributes = ( + EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_TESTED + ); + + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + FixedPcdGet64 (PcdSystemMemoryBase), + MemLowSize + ); + + // DDR + mVirtualMemoryTable[Index].PhysicalBase = FixedPcdGet64 (PcdSystemMemoryBase); + mVirtualMemoryTable[Index].VirtualBase = FixedPcdGet64 (PcdSystemMemoryBase); + mVirtualMemoryTable[Index].Length = MemLowSize; + mVirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_CACHED; + + // Configuration space + mVirtualMemoryTable[++Index].PhysicalBase = ConfigSpaceBaseAddr; + mVirtualMemoryTable[Index].VirtualBase = ConfigSpaceBaseAddr; + mVirtualMemoryTable[Index].Length = SIZE_4GB - ConfigSpaceBaseAddr; + mVirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; + + if (MemSize > MemLowSize) { + // + // If we have more than MemLowSize worth of DRAM, the remainder will be + // mapped at the top of the remapped window. + // + mVirtualMemoryTable[++Index].PhysicalBase = MemHighStart; + mVirtualMemoryTable[Index].VirtualBase = MemHighStart; + mVirtualMemoryTable[Index].Length = MemHighSize; + mVirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_CACHED; + + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + MemHighStart, + MemHighSize + ); + } + + // End of Table + mVirtualMemoryTable[++Index].PhysicalBase = 0; + mVirtualMemoryTable[Index].VirtualBase = 0; + mVirtualMemoryTable[Index].Length = 0; + mVirtualMemoryTable[Index].Attributes = 0; + + ASSERT((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); + + *VirtualMemoryMap = mVirtualMemoryTable; +} diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.h new file mode 100644 index 0000000..cc30e4a --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLibMem.h @@ -0,0 +1,73 @@ +/******************************************************************************* +Copyright (C) 2017 Marvell International Ltd. + +Marvell BSD License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +* Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + +* Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + +* Neither the name of Marvell nor the names of its contributors may be + used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +#define CCU_MC_RCR_REG 0xf0001700 +#define REMAP_EN_MASK 0x1 +#define REMAP_SIZE_OFFS 20 +#define REMAP_SIZE_MASK (0xfff << REMAP_SIZE_OFFS) +#define CCU_MC_RTBR_REG 0xf0001708 +#define TARGET_BASE_OFFS 10 +#define TARGET_BASE_MASK (0xfffff << TARGET_BASE_OFFS) + +#define DRAM_REMAP_ENABLED \ + (MmioRead32 (CCU_MC_RCR_REG) & REMAP_EN_MASK) +#define DRAM_REMAP_SIZE \ + (MmioRead32 (CCU_MC_RCR_REG) & REMAP_SIZE_MASK) + SIZE_1MB +#define DRAM_REMAP_TARGET \ + (MmioRead32 (CCU_MC_RTBR_REG) << TARGET_BASE_OFFS) + +#define DRAM_CH0_MMAP_LOW_REG(cs) (0xf0020200 + (cs) * 0x8) +#define DRAM_CS_VALID_ENABLED_MASK 0x1 +#define DRAM_AREA_LENGTH_OFFS 16 +#define DRAM_AREA_LENGTH_MASK (0x1f << DRAM_AREA_LENGTH_OFFS) +#define DRAM_START_ADDRESS_L_OFFS 23 +#define DRAM_START_ADDRESS_L_MASK (0x1ff << DRAM_START_ADDRESS_L_OFFS) +#define DRAM_CH0_MMAP_HIGH_REG(cs) (0xf0020204 + (cs) * 0x8) +#define DRAM_START_ADDR_HTOL_OFFS 32 + +#define DRAM_MAX_CS_NUM 8 + +#define DRAM_CS_ENABLED(Cs) \ + (MmioRead32 (DRAM_CH0_MMAP_LOW_REG (Cs)) & DRAM_CS_VALID_ENABLED_MASK) +#define GET_DRAM_REGION_BASE(Cs) \ + ((UINT64)MmioRead32 (DRAM_CH0_MMAP_HIGH_REG ((Cs))) << \ + DRAM_START_ADDR_HTOL_OFFS) | \ + (MmioRead32 (DRAM_CH0_MMAP_LOW_REG (Cs)) & DRAM_START_ADDRESS_L_MASK); +#define GET_DRAM_REGION_SIZE_CODE(Cs) \ + (MmioRead32 (DRAM_CH0_MMAP_LOW_REG ((Cs))) & \ + DRAM_AREA_LENGTH_MASK) >> DRAM_AREA_LENGTH_OFFS +#define DRAM_REGION_SIZE_EVEN(C) (((C) >= 7) && ((C) <= 26)) +#define GET_DRAM_REGION_SIZE_EVEN(C) ((UINT64)1 << ((C) + 16)) +#define DRAM_REGION_SIZE_ODD(C) ((C) <= 4) +#define GET_DRAM_REGION_SIZE_ODD(C) ((UINT64)0x18000000 << (C)) diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInitPeiLib/Armada7k8kMemoryInitPeiLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInitPeiLib/Armada7k8kMemoryInitPeiLib.c new file mode 100644 index 0000000..53119f4 --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInitPeiLib/Armada7k8kMemoryInitPeiLib.c @@ -0,0 +1,158 @@ +/** @file +* +* Copyright (c) 2011-2015, ARM Limited. All rights reserved. +* Copyright (c) 2017, ARM Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include + +#include +#include +#include +#include +#include + +VOID +BuildMemoryTypeInformationHob ( + VOID + ); + +STATIC +VOID +InitMmu ( + IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable + ) +{ + + VOID *TranslationTableBase; + UINTN TranslationTableSize; + RETURN_STATUS Status; + + Status = ArmConfigureMmu (MemoryTable, + &TranslationTableBase, + &TranslationTableSize); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Error: Failed to enable MMU\n")); + } +} + +/*++ + +Routine Description: + + + +Arguments: + + FileHandle - Handle of the file being invoked. + PeiServices - Describes the list of possible PEI Services. + +Returns: + + Status - EFI_SUCCESS if the boot mode could be set + +--*/ +EFI_STATUS +EFIAPI +MemoryPeim ( + IN EFI_PHYSICAL_ADDRESS UefiMemoryBase, + IN UINT64 UefiMemorySize + ) +{ + ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable; + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; + UINT64 ResourceLength; + EFI_PEI_HOB_POINTERS NextHob; + EFI_PHYSICAL_ADDRESS SecureTop; + EFI_PHYSICAL_ADDRESS ResourceTop; + + // Get Virtual Memory Map from the Platform Library + ArmPlatformGetVirtualMemoryMap (&MemoryTable); + + SecureTop = (EFI_PHYSICAL_ADDRESS)FixedPcdGet64 (PcdSecureRegionBase) + + FixedPcdGet32 (PcdSecureRegionSize); + + // + // Search for System Memory Hob that covers the secure firmware, + // and punch a hole in it + // + for (NextHob.Raw = GetHobList (); + NextHob.Raw != NULL; + NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, + NextHob.Raw)) { + + if ((NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) && + (FixedPcdGet64 (PcdSecureRegionBase) >= NextHob.ResourceDescriptor->PhysicalStart) && + (SecureTop <= NextHob.ResourceDescriptor->PhysicalStart + + NextHob.ResourceDescriptor->ResourceLength)) + { + ResourceAttributes = NextHob.ResourceDescriptor->ResourceAttribute; + ResourceLength = NextHob.ResourceDescriptor->ResourceLength; + ResourceTop = NextHob.ResourceDescriptor->PhysicalStart + ResourceLength; + + if (FixedPcdGet64 (PcdSecureRegionBase) == NextHob.ResourceDescriptor->PhysicalStart) { + // + // This region starts right at the start of the reserved region, so we + // can simply move its start pointer and reduce its length by the same + // value + // + NextHob.ResourceDescriptor->PhysicalStart += FixedPcdGet32 (PcdSecureRegionSize); + NextHob.ResourceDescriptor->ResourceLength -= FixedPcdGet32 (PcdSecureRegionSize); + + } else if ((NextHob.ResourceDescriptor->PhysicalStart + + NextHob.ResourceDescriptor->ResourceLength) == SecureTop) { + + // + // This region ends right at the end of the reserved region, so we + // can simply reduce its length by the size of the region. + // + NextHob.ResourceDescriptor->ResourceLength -= FixedPcdGet32 (PcdSecureRegionSize); + + } else { + // + // This region covers the reserved region. So split it into two regions, + // each one touching the reserved region at either end, but not covering + // it. + // + NextHob.ResourceDescriptor->ResourceLength = FixedPcdGet64 (PcdSecureRegionBase) - + NextHob.ResourceDescriptor->PhysicalStart; + + // Create the System Memory HOB for the remaining region (top of the FD) + BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + SecureTop, + ResourceTop - SecureTop); + } + + // + // Reserve the memory space occupied by the secure firmware + // + BuildResourceDescriptorHob (EFI_RESOURCE_MEMORY_RESERVED, + 0, + FixedPcdGet64 (PcdSecureRegionBase), + FixedPcdGet32 (PcdSecureRegionSize)); + + break; + } + NextHob.Raw = GET_NEXT_HOB (NextHob); + } + + // Build Memory Allocation Hob + InitMmu (MemoryTable); + + if (FeaturePcdGet (PcdPrePiProduceMemoryTypeInformationHob)) { + // Optional feature that helps prevent EFI memory map fragmentation. + BuildMemoryTypeInformationHob (); + } + + return EFI_SUCCESS; +} diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInitPeiLib/Armada7k8kMemoryInitPeiLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInitPeiLib/Armada7k8kMemoryInitPeiLib.inf new file mode 100644 index 0000000..096495d --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInitPeiLib/Armada7k8kMemoryInitPeiLib.inf @@ -0,0 +1,46 @@ +#/** @file +# +# Copyright (c) 2011-2014, ARM Ltd. All rights reserved.
+# Copyright (c) 2017, Linaro Ltd. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = Armada7k8kMemoryInitPeiLib + FILE_GUID = abc4e8a7-89a7-4aea-92bc-0e9421c4a473 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = MemoryInitPeiLib|SEC PEIM + +[Sources] + Armada7k8kMemoryInitPeiLib.c + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/Marvell/Marvell.dec + +[LibraryClasses] + ArmPlatformLib + DebugLib + HobLib + ArmMmuLib + +[FeaturePcd] + gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob + +[FixedPcd] + gMarvellTokenSpaceGuid.PcdSecureRegionBase + gMarvellTokenSpaceGuid.PcdSecureRegionSize -- 2.7.4