[PATCH edk2-platforms 3/3] SATA : Added SATA controller initialization driver.

[Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>]

Add driver to initialize SATA controller and apply
any platform specific errata.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
---
 Platform/NXP/Drivers/SataInitDxe/SataInit.c      | 122 +++++++++++++++++++++++
 Platform/NXP/Drivers/SataInitDxe/SataInit.h      |  32 ++++++
 Platform/NXP/Drivers/SataInitDxe/SataInitDxe.inf |  43 ++++++++
 Platform/NXP/NxpQoriqLs.dec                      |   5 +
 Platform/NXP/NxpQoriqLs.dsc                      |   6 ++
 5 files changed, 208 insertions(+)
 create mode 100644 Platform/NXP/Drivers/SataInitDxe/SataInit.c
 create mode 100644 Platform/NXP/Drivers/SataInitDxe/SataInit.h
 create mode 100644 Platform/NXP/Drivers/SataInitDxe/SataInitDxe.inf

diff --git a/Platform/NXP/Drivers/SataInitDxe/SataInit.c b/Platform/NXP/Drivers/SataInitDxe/SataInit.c
new file mode 100644
index 0000000..4bda242
--- /dev/null
+++ b/Platform/NXP/Drivers/SataInitDxe/SataInit.c
@@ -0,0 +1,122 @@
+/** @file
+  This driver module performs initialization of SATA controller
+
+  Copyright 2017 NXP
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution. The full text of the license may be found
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ **/
+
+#include <Library/BeIoLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Protocol/PciIo.h>
+
+#include "SataInit.h"
+
+/**
+  Write AHCI Operation register.
+
+  @param PciIo             The PCI IO protocol instance.
+  @param Offset            The operation register offset.
+  @param Data              The data used to write down.
+
+**/
+VOID
+EFIAPI
+AhciWriteReg (
+  IN EFI_PCI_IO_PROTOCOL   *PciIo,
+  IN UINT32                Offset,
+  IN UINT32                Data
+  )
+{
+  ASSERT (PciIo != NULL);
+
+  PciIo->Mem.Write (
+                   PciIo,
+                   EfiPciIoWidthUint32,
+                   AHCI_BAR_INDEX,
+                   (UINT64) Offset,
+                   1,
+                   &Data
+                   );
+
+  return;
+}
+
+/**
+  The Entry Point of module. It follows the standard UEFI driver model.
+
+  @param[in] ImageHandle   The firmware allocated handle for the EFI image.
+  @param[in] SystemTable   A pointer to the EFI System Table.
+
+  @retval EFI_SUCCESS      The entry point is executed successfully.
+  @retval other            Some error occurs when executing this entry point.
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeSataController (
+  IN EFI_HANDLE            ImageHandle,
+  IN EFI_SYSTEM_TABLE      *SystemTable
+  )
+{
+  EFI_STATUS               Status;
+  EFI_PCI_IO_PROTOCOL      *PciIo;
+
+  //
+  // Impact : The SATA controller does not detect some hard drives reliably with
+  // the default SerDes register setting.
+  // Workaround : write value 0x80104e20 to 0x1eb1300 (serdes 2)
+  //
+  if (PcdGetBool (PcdSataErratumA010554)) {
+    BeMmioWrite32 ((UINTN)SERDES2_SATA_ERRATA, 0x80104e20);
+  }
+
+  //
+  // Impact : Device may see false CRC errors causing unreliable SATA operation.
+  // Workaround : write 0x80000000 to the address 0x20140520 (dcsr).
+  //
+  if (PcdGetBool (PcdSataErratumA010635)) {
+    BeMmioWrite32 ((UINTN)DCSR_SATA_ERRATA, 0x80000000);
+  }
+
+  //
+  // Locate PCI I/O Protocol
+  //
+  Status = gBS->LocateProtocol (&gEfiPciIoProtocolGuid, NULL, (VOID **)&PciIo);
+
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR, "Sata controller is not able to find PCI Emulation 0x%x\n",
+                Status));
+    return Status;
+  }
+
+  //
+  // configuring Physical Control Layer parameters for Port 0
+  //
+  AhciWriteReg (PciIo, SATA_PPCFG, PORT_PHYSICAL);
+
+  //
+  // This register controls the configuration of the
+  // Transport Layer for  Port 0
+  // Errata Description : The default Rx watermark value may be insufficient for some
+  // hard drives and result in a false CRC or internal errors.
+  // Workaround: Change PTC[RXWM] field at offset 0xC8 to 0x29. Do not change
+  // the other reserved fields of the register.
+  //
+
+  if (PcdGetBool (PcdSataErratumA009185)) {
+    AhciWriteReg (PciIo, SATA_PTC, PORT_RXWM);
+  } else {
+    AhciWriteReg (PciIo, SATA_PTC, PORT_TRANSPORT);
+  }
+
+  return Status;
+}
diff --git a/Platform/NXP/Drivers/SataInitDxe/SataInit.h b/Platform/NXP/Drivers/SataInitDxe/SataInit.h
new file mode 100644
index 0000000..401173d
--- /dev/null
+++ b/Platform/NXP/Drivers/SataInitDxe/SataInit.h
@@ -0,0 +1,32 @@
+/** @file
+  Header file for Sata Controller initialization driver.
+
+  Copyright 2017 NXP
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution. The full text of the license may be found
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ **/
+
+#ifndef _SATA_INIT_H_
+#define _SATA_INIT_H_
+
+
+#define AHCI_BAR_INDEX       0x05
+
+#define SATA_PPCFG           0xA8
+#define SATA_PTC             0xC8
+
+#define PORT_PHYSICAL        0xA003FFFE
+#define PORT_TRANSPORT       0x08000025
+#define PORT_RXWM            0x08000029
+
+#define DCSR_SATA_ERRATA     0x20140520
+#define SERDES2_SATA_ERRATA  0x01eb1300
+
+#endif
diff --git a/Platform/NXP/Drivers/SataInitDxe/SataInitDxe.inf b/Platform/NXP/Drivers/SataInitDxe/SataInitDxe.inf
new file mode 100644
index 0000000..d06480f
--- /dev/null
+++ b/Platform/NXP/Drivers/SataInitDxe/SataInitDxe.inf
@@ -0,0 +1,43 @@
+## @file
+#  Component description file for the Sata Controller initialization driver
+#
+#  Copyright 2017 NXP
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution. The full text of the license may be found
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001000A
+  BASE_NAME                      = SataInit
+  FILE_GUID                      = 021722D8-522B-4079-852A-FE44C2C13F49
+  MODULE_TYPE                    = UEFI_DRIVER
+  VERSION_STRING                 = 1.0
+  ENTRY_POINT                    = InitializeSataController
+
+[Sources]
+  SataInit.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  Platform/NXP/NxpQoriqLs.dec
+
+[LibraryClasses]
+  BeIoLib
+  DebugLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+
+[FixedPcd]
+  gNxpQoriqLsTokenSpaceGuid.PcdSataErratumA009185
+  gNxpQoriqLsTokenSpaceGuid.PcdSataErratumA010554
+  gNxpQoriqLsTokenSpaceGuid.PcdSataErratumA010635
+
+[Protocols]
+  gEfiPciIoProtocolGuid
diff --git a/Platform/NXP/NxpQoriqLs.dec b/Platform/NXP/NxpQoriqLs.dec
index f43ccf0..bf4a086 100644
--- a/Platform/NXP/NxpQoriqLs.dec
+++ b/Platform/NXP/NxpQoriqLs.dec
@@ -82,6 +82,8 @@
   gNxpQoriqLsTokenSpaceGuid.PcdCcsrBaseAddr|0x01000000|UINT64|0x0000012D
   gNxpQoriqLsTokenSpaceGuid.PcdCcsrSize|0x0F000000|UINT64|0x0000012E
   gNxpQoriqLsTokenSpaceGuid.PcdDramMemSize|0x0|UINT64|0x0000012F
+  gNxpQoriqLsTokenSpaceGuid.PcdDcsrBaseAddr|0x0|UINT64|0x00000130
+  gNxpQoriqLsTokenSpaceGuid.PcdDcsrSize|0x0|UINT64|0x00000131
 
   #
   # DSPI Pcds
@@ -155,6 +157,9 @@
   gNxpQoriqLsTokenSpaceGuid.PcdErratumA008514|FALSE|BOOLEAN|0x00000275
   gNxpQoriqLsTokenSpaceGuid.PcdErratumA008336|FALSE|BOOLEAN|0x00000276
   gNxpQoriqLsTokenSpaceGuid.PcdSataErratumA009185|FALSE|BOOLEAN|0x00000277
+  gNxpQoriqLsTokenSpaceGuid.PcdSataErratumA010554|FALSE|BOOLEAN|0x00000278
+  gNxpQoriqLsTokenSpaceGuid.PcdSataErratumA010635|FALSE|BOOLEAN|0x00000279
+  gNxpQoriqLsTokenSpaceGuid.PcdSataErratumA008402|FALSE|BOOLEAN|0x0000027A
 
   #
   # Test PCDs
diff --git a/Platform/NXP/NxpQoriqLs.dsc b/Platform/NXP/NxpQoriqLs.dsc
index 9b450fa..6efa2a4 100644
--- a/Platform/NXP/NxpQoriqLs.dsc
+++ b/Platform/NXP/NxpQoriqLs.dsc
@@ -334,6 +334,12 @@
   }
 
   #
+  # ATA Driver
+  #
+  MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+  MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+
+  #
   # Architectural Protocols
   #
   ArmPkg/Drivers/CpuDxe/CpuDxe.inf
-- 
1.9.1