[PATCH v2 5/7] UefiCpuPkg: Update SmmCpuFeatureLib pass XCODE5 tool chain

[Liming Gao <liming.gao@intel.com>]

In V2, use "mov rax, strict qword 0" to replace the hard code db.

1. Use lea instruction to get the address instead of mov instruction.
2. Use the dummy address as jmp destination, and add the logic to fix up
the address to the absolute address at boot time.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
---
 .../Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm   |  6 +++-
 UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c      |  8 +++--
 UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h      | 11 +++++-
 .../Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm    | 39 ++++++++++++++--------
 .../SmmCpuFeaturesLib/X64/SmiException.nasm        | 10 +++---
 5 files changed, 52 insertions(+), 22 deletions(-)

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm
index 00c0f067..057ec6d 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;
-; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -273,3 +273,7 @@ _StmSmiHandler:
 
 ASM_PFX(gcStmSmiHandlerSize)   : DW        $ - _StmSmiEntryPoint
 ASM_PFX(gcStmSmiHandlerOffset) : DW        _StmSmiHandler - _StmSmiEntryPoint
+
+global ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress)
+ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress):
+    ret
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
index 45015b8..8dc2d70 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
@@ -1,7 +1,7 @@
 /** @file
   SMM STM support functions
 
-  Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -116,7 +116,6 @@ UINTN  mMsegSize = 0;
 
 BOOLEAN  mStmConfigurationTableInitialized = FALSE;
 
-
 /**
   The constructor function
 
@@ -139,6 +138,11 @@ SmmCpuFeaturesLibStmConstructor (
   EFI_SMRAM_DESCRIPTOR    *SmramDescriptor;
 
   //
+  // Initialize address fixup
+  //
+  SmmCpuFeaturesLibStmSmiEntryFixupAddress ();
+
+  //
   // Call the common constructor function
   //
   Status = SmmCpuFeaturesLibConstructor (ImageHandle, SystemTable);
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h
index 92a4dc0..c98b660 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h
@@ -1,7 +1,7 @@
 /** @file
   SMM STM support
 
-  Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -173,4 +173,13 @@ GetStmResource (
   VOID
   );
 
+/**
+  This function fixes up the address of the global variable or function
+  referred in SmiEntry assembly files to be the absoute address.
+**/
+VOID
+EFIAPI
+SmmCpuFeaturesLibStmSmiEntryFixupAddress (
+ );
+
 #endif
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
index ea2d297..90a9fd4 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;
-; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -164,7 +164,8 @@ Base:
     mov     cr0, rbx
     retf
 @LongMode:                              ; long mode (64-bit code) starts here
-    mov     rax, ASM_PFX(gStmSmiHandlerIdtr)
+    mov     rax, strict qword 0         ;  mov     rax, ASM_PFX(gStmSmiHandlerIdtr)
+StmSmiEntrySmiHandlerIdtrAbsAddr:
     lidt    [rax]
     lea     ebx, [rdi + DSC_OFFSET]
     mov     ax, [rbx + DSC_DS]
@@ -175,7 +176,9 @@ Base:
     mov     gs, eax
     mov     ax, [rbx + DSC_SS]
     mov     ss, eax
-
+    mov     rax, strict qword 0           ;   mov     rax, CommonHandler
+StmSmiEntryCommonHandlerAbsAddr:
+    jmp     rax
 CommonHandler:
     mov     rbx, [rsp + 0x08]             ; rbx <- CpuIndex
 
@@ -188,16 +191,13 @@ CommonHandler:
     add     rsp, -0x20
 
     mov     rcx, rbx
-    mov     rax, ASM_PFX(CpuSmmDebugEntry)
-    call    rax
+    call    ASM_PFX(CpuSmmDebugEntry)
 
     mov     rcx, rbx
-    mov     rax, ASM_PFX(SmiRendezvous)          ; rax <- absolute addr of SmiRedezvous
-    call    rax
+    call    ASM_PFX(SmiRendezvous)
 
     mov     rcx, rbx
-    mov     rax, ASM_PFX(CpuSmmDebugExit)
-    call    rax
+    call    ASM_PFX(CpuSmmDebugExit)
 
     add     rsp, 0x20
 
@@ -208,7 +208,7 @@ CommonHandler:
 
     add     rsp, 0x200
 
-    mov     rax, ASM_PFX(gStmXdSupported)
+    lea     rax, [ASM_PFX(gStmXdSupported)]
     mov     al, [rax]
     cmp     al, 0
     jz      .1
@@ -228,7 +228,7 @@ _StmSmiHandler:
 ; Check XD disable bit
 ;
     xor     r8, r8
-    mov     rax, ASM_PFX(gStmXdSupported)
+    lea     rax, [ASM_PFX(gStmXdSupported)]
     mov     al, [rax]
     cmp     al, 0
     jz      @StmXdDone
@@ -249,8 +249,8 @@ _StmSmiHandler:
 
     ; below step is needed, because STM does not run above code.
     ; we have to run below code to set IDT/CR0/CR4
-
-    mov     rax, ASM_PFX(gStmSmiHandlerIdtr)
+    mov     rax, strict qword 0        ;  mov     rax, ASM_PFX(gStmSmiHandlerIdtr)
+StmSmiHandlerIdtrAbsAddr:
     lidt    [rax]
 
     mov     rax, cr0
@@ -264,3 +264,16 @@ _StmSmiHandler:
 
 ASM_PFX(gcStmSmiHandlerSize)   : DW      $ - _StmSmiEntryPoint
 ASM_PFX(gcStmSmiHandlerOffset) : DW      _StmSmiHandler - _StmSmiEntryPoint
+
+global ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress)
+ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress):
+    lea    rax, [ASM_PFX(gStmSmiHandlerIdtr)]
+    lea    rcx, [StmSmiEntrySmiHandlerIdtrAbsAddr]
+    mov    qword [rcx - 8], rax
+    lea    rcx, [StmSmiHandlerIdtrAbsAddr]
+    mov    qword [rcx - 8], rax
+
+    lea    rax, [CommonHandler]
+    lea    rcx, [StmSmiEntryCommonHandlerAbsAddr]
+    mov    qword [rcx - 8], rax
+    ret
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm
index ce9d7c2..b0ab87b 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;
-; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -95,7 +95,7 @@ ASM_PFX(OnStmSetup):
 ; Check XD disable bit
 ;
     xor     r8, r8
-    mov     rax, ASM_PFX(gStmXdSupported)
+    lea     rax, [ASM_PFX(gStmXdSupported)]
     mov     al, [rax]
     cmp     al, 0
     jz      @StmXdDone1
@@ -118,7 +118,7 @@ ASM_PFX(OnStmSetup):
   call ASM_PFX(SmmStmSetup)
   add  rsp, 0x20
 
-    mov     rax, ASM_PFX(gStmXdSupported)
+    lea     rax, [ASM_PFX(gStmXdSupported)]
     mov     al, [rax]
     cmp     al, 0
     jz      .11
@@ -139,7 +139,7 @@ ASM_PFX(OnStmTeardown):
 ; Check XD disable bit
 ;
     xor     r8, r8
-    mov     rax, ASM_PFX(gStmXdSupported)
+    lea     rax, [ASM_PFX(gStmXdSupported)]
     mov     al, [rax]
     cmp     al, 0
     jz      @StmXdDone2
@@ -162,7 +162,7 @@ ASM_PFX(OnStmTeardown):
   call ASM_PFX(SmmStmTeardown)
   add  rsp, 0x20
 
-    mov     rax, ASM_PFX(gStmXdSupported)
+    lea     rax, [ASM_PFX(gStmXdSupported)]
     mov     al, [rax]
     cmp     al, 0
     jz      .12
-- 
2.8.0.windows.1