From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::22c; helo=mail-pf0-x22c.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x22c.google.com (mail-pf0-x22c.google.com [IPv6:2607:f8b0:400e:c00::22c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8D32F222DDC12 for ; Thu, 18 Jan 2018 06:56:32 -0800 (PST) Received: by mail-pf0-x22c.google.com with SMTP id b25so8496260pfd.9 for ; Thu, 18 Jan 2018 07:01:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:branch:mime-version :content-transfer-encoding; bh=AuX7lMrdLXPDaHmK9Z0Uf8W5W0p0vYOCpsqEoFf22Iw=; b=N9C5TtXUiludqT3+hZ9B4fMOfza7yz3g8PISnt2gw1aaXseC0lklP89+D7EpXbOifN cX4x4SiHfZvfkR6Zc7V3/yq5mBl/6wNYCQXbjdU6Rvn8TFGBZy+pb2uvBjinbZ55H82D lKPWPhO8CU/SmGFAZfCp4AfotwZcW7pbnqR+A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:branch :mime-version:content-transfer-encoding; bh=AuX7lMrdLXPDaHmK9Z0Uf8W5W0p0vYOCpsqEoFf22Iw=; b=X57e7FlaEYy/rTe3b8YkWKvtBVYmVvX3ljzaepMEZlNubcAzfAxxnwTnyOn+nhLD7c bd5325E8GeQj8/4PUgNOo3/IG0RjVPGkzvJ1r7Cev5oNWHXbepocCgXk0uB+LyQL1HiJ g4MwNR6idhrvbjQ/2408BW632HebA0/FlL5y4e1VkW8f8ZPIMw1C0KuG3f5hxMLW818E mv6BdHCQ99lzbFKzrXXYgnY23fEKB82QputM5KF+kwEz2p2J9h4ylbLbV/kPwpHfFXM6 cTAQQio3j97gMfo97Hbe1MqA4PhTRdGJYU8+pToYSfVRsVVA2TFN1kcYVmIO1jKrzQgI GsNw== X-Gm-Message-State: AKwxyte9XW/rLB0kuCbcFh8POdSOeOPEF4yXn3rIUBolyf91Om2dowzU vQjbPpePPGBXD3KkLiaCb1hXLA== X-Google-Smtp-Source: ACJfBov6X+Dhj8e3WxtKauWapRx88NeaO/qr5tMgc9ENTbpPa346SzPNdcv6jEt0pitcjvn2C9rUhA== X-Received: by 10.99.135.195 with SMTP id i186mr896942pge.418.1516287713388; Thu, 18 Jan 2018 07:01:53 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j14sm13621815pfh.94.2018.01.18.07.01.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Jan 2018 07:01:52 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, mengfanrong@huawei.com, waip23@126.com Date: Thu, 18 Jan 2018 23:01:29 +0800 Message-Id: <1516287703-35516-1-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 branch: rp-1802-platforms-v1 MIME-Version: 1.0 Subject: [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Jan 2018 14:56:32 -0000 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit *** BLURB HERE *** Jason Zhang (4): Hisilicon/D05: Add PPTT support Hisilicon D03/D05: Add capsule upgrade support Hisilicon D03/D05: Open SasPlatform source code Hisilicon D03/D05: Open SnpPlatform source code Ming Huang (9): Hisilicon D03/D05：Switch to Generic BDS driver Hisilicon D03/D05: Optimize the feature of BMC set boot option Hisilicon/Smbios: modify type 4 Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver. Hisilicon/D03: Replace SP805Watchdog by WatchdogTimer driver. Hisilicon/D05/ACPI: Add ITS PXM Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM Hisilicon/Library: Add OsBootLib Hisilicon D03/D05: Update firmware version to 18.02 Yan Zhang (1): Hisilicon/PCIe: Disable PCIe ASPM Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 ++ Platform/Hisilicon/D03/D03.dsc | 51 +- Platform/Hisilicon/D03/D03.fdf | 84 ++- Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 ++ Platform/Hisilicon/D05/D05.dsc | 56 +- Platform/Hisilicon/D05/D05.fdf | 85 ++- Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c | 89 +++ Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h | 49 ++ Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf | 61 ++ Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 4 +- Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c | 99 +++ Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h | 43 ++ Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf | 60 ++ Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 81 +++ Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 50 ++ Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 70 ++ Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 71 ++ Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h | 2 + Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc | 10 + Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl | 9 + Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 34 +- Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 19 +- Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 + Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +- Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 +++++++++++++ Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 ++++ Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 ++ Silicon/Hisilicon/HisiPkg.dec | 3 + Silicon/Hisilicon/Hisilicon.dsc.inc | 12 +- Silicon/Hisilicon/Hisilicon.fdf.inc | 9 + Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 10 +- Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h | 31 + Silicon/Hisilicon/Include/Library/OemDevicePath.h | 54 ++ Silicon/Hisilicon/Include/Library/OsBootLib.h | 47 ++ Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h | 11 + Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h | 32 + Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h | 2 + Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c | 454 +++++++++++++ Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf | 51 ++ Silicon/Hisilicon/Library/OsBootLib/OsBoot.h | 124 ++++ Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c | 217 +++++++ Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf | 59 ++ Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c | 514 +++++++++++++++ Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 601 +++++++++++++++++ Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h | 59 ++ Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 91 +++ Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c | 681 ++++++++++++++++++++ Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c | 106 +++ Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf | 51 ++ Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c | 434 +------------ Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf | 4 +- 51 files changed, 4987 insertions(+), 489 deletions(-) create mode 100644 Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini create mode 100644 Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf create mode 100644 Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc create mode 100644 Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf create mode 100644 Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.c create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.h create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf create mode 100644 Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h create mode 100644 Silicon/Hisilicon/Include/Library/OemDevicePath.h create mode 100644 Silicon/Hisilicon/Include/Library/OsBootLib.h create mode 100644 Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h create mode 100644 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c create mode 100644 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBoot.h create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c create mode 100644 Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c create mode 100644 Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf -- 1.9.1