From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.100; helo=mga07.intel.com; envelope-from=dandan.bi@intel.com; receiver=edk2-devel@lists.01.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 44D73222A3340 for ; Tue, 23 Jan 2018 23:54:26 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Jan 2018 23:59:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,406,1511856000"; d="scan'208";a="13050161" Received: from shwdeopenpsi114.ccr.corp.intel.com ([10.239.157.135]) by orsmga006.jf.intel.com with ESMTP; 23 Jan 2018 23:59:52 -0800 From: Dandan Bi To: edk2-devel@lists.01.org Cc: Eric Dong , Laszlo Ersek , Liming Gao Date: Wed, 24 Jan 2018 15:59:31 +0800 Message-Id: <1516780771-6560-1-git-send-email-dandan.bi@intel.com> X-Mailer: git-send-email 1.9.5.msysgit.1 Subject: [patch] UefiCpuPkg/S3Resume: Add more perf enrty for S3 phase X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Jan 2018 07:54:26 -0000 Add more perf entry to hook BootScriptDonePpi/EndOfPeiPpi/ EndOfS3Resume. Notes: This patch depends on the new performance infrastructure. Cc: Eric Dong Cc: Laszlo Ersek Cc: Liming Gao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi --- UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c index b597ac7..d7d2a4d 100644 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c +++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c @@ -2,11 +2,11 @@ This module produces the EFI_PEI_S3_RESUME2_PPI. This module works with StandAloneBootScriptExecutor to S3 resume to OS. This module will execute the boot script saved during last boot and after that, control is passed to OS waking up handler. - Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
Copyright (c) 2017, AMD Incorporated. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The @@ -21,10 +21,11 @@ #include #include #include #include +#include #include #include #include #include #include @@ -551,13 +552,17 @@ S3ResumeBootOs ( PERF_END (NULL, "ScriptExec", NULL, 0); // // Install BootScriptDonePpi // + PERF_START_EX (NULL, "BootScriptDonePpi", NULL, 0, PERF_INMODULE_START_ID); + Status = PeiServicesInstallPpi (&mPpiListPostScriptTable); ASSERT_EFI_ERROR (Status); + PERF_END_EX (NULL, "BootScriptDonePpi", NULL, 0, PERF_INMODULE_END_ID); + // // Get ACPI Table Address // Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable)); @@ -576,18 +581,26 @@ S3ResumeBootOs ( } // // Install EndOfPeiPpi // + PERF_START_EX (NULL, "EndOfPeiPpi", NULL, 0, PERF_INMODULE_START_ID); + Status = PeiServicesInstallPpi (&mPpiListEndOfPeiTable); ASSERT_EFI_ERROR (Status); + PERF_END_EX (NULL, "EndOfPeiPpi", NULL, 0, PERF_INMODULE_END_ID); + // // Signal EndOfS3Resume event. // + PERF_START_EX (NULL, "EndOfS3Resume", NULL, 0, PERF_INMODULE_START_ID); + SignalEndOfS3Resume (); + PERF_END_EX (NULL, "EndOfS3Resume", NULL, 0, PERF_INMODULE_END_ID); + // // report status code on S3 resume // REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_OS_WAKE); -- 1.9.5.msysgit.1