From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::241; helo=mail-pf0-x241.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x241.google.com (mail-pf0-x241.google.com [IPv6:2607:f8b0:400e:c00::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DA65D2222C22F for ; Thu, 25 Jan 2018 23:57:53 -0800 (PST) Received: by mail-pf0-x241.google.com with SMTP id t5so7795180pfi.0 for ; Fri, 26 Jan 2018 00:03:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kDN/PSWeRPjuXjc+8yoOJjSBMx+vIJDb8t8CMAMFV5E=; b=gfWE71B36gUxkSOxDqaduGb4y159X8agv8f4sGzaNy4j2qbALyWiHzytSblSU/NsLL ojNLHO5lPLzGxoeqqb5MOz69AKWVN7oz/kjJoOYQ/1Q3TPxnfbkt+LgSsY4AhnHvZHFx h4MnephyYRzTwLlhf3J3TnSoRX5UDvzhjD+Gw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kDN/PSWeRPjuXjc+8yoOJjSBMx+vIJDb8t8CMAMFV5E=; b=A3cZ+Mqi6ddfGMMLXZ1VQTHxW/QNk1b3h5S2Bt4HR9n6Ki2/eV9JzhV6paYDHnC1Jl MTOlvXFwBL8B1BrGkmAKJc/kReQIbvoynA649lYFWOGqO/PYzrjdYu4kf1nujcCxvD0S IWnlAarl3WZkLNeKuFJWpUMxKEjxjN7l48V2S+WajcplLpxqLwqgk2/oqrIiRtjd1yZH x97UytNYB6tD6gNr1pkvOQqb76gQ5MhJv1ib8QAOuTzHadeUrQ9jMLS2RhXWe7aT5eZP kut1HxvbSw7rlpsWHfw1MzaSCJSzj6N/WFkR6sD83EythfaRBMJ5p3dqJ34Ouy+TUG0b y/yA== X-Gm-Message-State: AKwxyteJerSAgxtNJNl3ePEAlKq6pLDpIvB8ciBCa7EFX8DDj7RJa9ZQ eVUOtI+T58B/AnFdvd5DRZw8dA== X-Google-Smtp-Source: AH8x227u/njwPOO9M55HK40jMpSeNAEDtoOLSQ2qAo57Okm+9gQhNMZ22C9eV1OQWzDjPaHj/04pow== X-Received: by 10.98.224.205 with SMTP id d74mr18809187pfm.56.1516953803916; Fri, 26 Jan 2018 00:03:23 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id k71sm18406091pfg.52.2018.01.26.00.03.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 26 Jan 2018 00:03:22 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, mengfanrong@huawei.com, huangdaode@hisilicon.com, waip23@126.com, Wang Yue , Heyi Guo Date: Fri, 26 Jan 2018 16:00:43 +0800 Message-Id: <1516953650-57980-9-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516953650-57980-1-git-send-email-huangming23@huawei.com> References: <1516953650-57980-1-git-send-email-huangming23@huawei.com> Subject: [PATCH edk2-platforms v2 08/15] Hilisicon: Change DmaLib to CoherentDmaLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Jan 2018 07:57:54 -0000 Unify all D0x(include D06 in further) to cache coherent DmaLib. This can improve boot speed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Wang Yue Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Platform/Hisilicon/D05/D05.dsc | 2 +- Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c | 2 +- Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c | 3 +-- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 6e44041..dfe19b0 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -614,7 +614,7 @@ Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { - DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf + DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf } diff --git a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c b/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c index 706eb12..63de50b 100644 --- a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c +++ b/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c @@ -26,7 +26,7 @@ EhciVirtualPciIoInitialize ( { return RegisterNonDiscoverableMmioDevice ( NonDiscoverableDeviceTypeEhci, - NonDiscoverableDeviceDmaTypeNonCoherent, + NonDiscoverableDeviceDmaTypeCoherent, NULL, NULL, 1, diff --git a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c index 2310ee4..3e272f8 100644 --- a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c +++ b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c @@ -27,7 +27,6 @@ ExitBootServicesEventSmmu ( IN VOID *Context ) { - SmmuConfigForOS (); DEBUG((EFI_D_INFO,"SMMU ExitBootServicesEvent\n")); } @@ -43,7 +42,7 @@ IoInitDxeEntry ( (VOID) EfiSerdesInitWrap (); - SmmuConfigForBios (); + SmmuConfigForOS (); Status = gBS->CreateEvent ( EVT_SIGNAL_EXIT_BOOT_SERVICES, -- 1.9.1