From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::242; helo=mail-pf0-x242.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x242.google.com (mail-pf0-x242.google.com [IPv6:2607:f8b0:400e:c00::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 253272215BD98 for ; Fri, 2 Feb 2018 04:00:12 -0800 (PST) Received: by mail-pf0-x242.google.com with SMTP id a14so3493911pfi.7 for ; Fri, 02 Feb 2018 04:05:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=saQWs49ZfXW+6OQHTfJLTJ9lEmiqqKr0ww/i2HYGE0A=; b=TMKtw5ZZpXtFw5a4ZmS24/bxJr+jmHGzjoTaxV1SxSetLWlGTTBFbHEnvjBIgXtyee XOoZ+t6bTNZrnIgzGN9kYURLhRDarhXZe4+vcUv2vbVOwvJHokZtsZRJwYCVo2bjpw2U vpGs9jlBE4xk6Q5G4U/sN9R19W6HVyMYgM8S4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=saQWs49ZfXW+6OQHTfJLTJ9lEmiqqKr0ww/i2HYGE0A=; b=Sm4LjyvDuCr6WWco6WlPB9fxJ1/IeBawzTjkjRc8MAr961sQAWqcg9SxzgVVRdzbnW t1GKqOAiMKeoBoem118M5SFZsSPOIp3SQNjGKhb/1GJ5/JsrllEdiXQUQUVYG81+t/Pl VivHK8/Cxsho1eoDsnjvhel/vVH4tWYvnwaCNrhQtkir2rQLW7kUvT3bzrqxeFSk1wAn TlBc5+xEC8H6hv3OSx8AzjLH0HRSMvpDyYrzvrxHATuDp58l9aeEhi9EgSKFosfXWlqy cyCNdBXh5vdKQ620o1UBOY/y77buBkFUn73zqny6kHJFa5W95RUise3HtuGBgBUirpri jaiw== X-Gm-Message-State: AKwxytdLhoQ/gtE4uBxAlCuqIrugYZdTjFzR+f6cXVBZvcm7/yNC0C61 CZYHSYkTtRLxVfJ3Sl4okv0P3Q== X-Google-Smtp-Source: AH8x226xQqH5pJku5JGpO4D4YVtF2+ViaqnVllGphN08H7yxeYlBBLsF64it1SrdvGTVdtq6laIe5A== X-Received: by 10.99.119.134 with SMTP id s128mr5584281pgc.132.1517573150853; Fri, 02 Feb 2018 04:05:50 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id b8sm3673047pff.31.2018.02.02.04.05.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 02 Feb 2018 04:05:50 -0800 (PST) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, mengfanrong@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, waip23@126.com, Heyi Guo Date: Fri, 2 Feb 2018 20:05:28 +0800 Message-Id: <1517573143-11451-1-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 Subject: [PATCH edk2-platforms v3 00/15] Improve D0x platforms and bug fix X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 02 Feb 2018 12:00:13 -0000 The major features of this patchset include adding PPTT support, switching to Generic BDS driver, adding capsule upgrade support, open-source version for SnpPlatform and SasPlatform changing DmaLib to CoherentDmaLib. Note: The patch PPTT is related to the edk2 patch "MdePkg ACPI: Add some macros for PPTT". Code can also be found in github: https://github.com/hisilicon/OpenPlatformPkg.git branch: rp-1802-platforms-v3 Heyi Guo (15): Hisilicon/D05: Move Madt definition to head file Hisilicon/D05: Add PPTT support Hisilicon/D0x/BDS: Switch to Generic BDS driver Hisilicon/D0x: Break BMC SetBoot option out into separate library Hisilicon D03/D05: Add capsule upgrade support Hisilicon D03/D05: Open SasPlatform source code Hisilicon D03/D05: Open SnpPlatform source code Hilisicon: Change DmaLib to CoherentDmaLib Hisilicon/Smbios: Indicate use of ProcessorFamily2 in type 4 table Hisilicon/PCIe: Disable PCIe ASPM Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver. Hisilicon/D03: Replace SP805Watchdog by WatchdogTimer driver. Hisilicon/D05/ACPI: Add ITS PXM Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM Hisilicon D03/D05: Update firmware version to 18.02 Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 ++ Platform/Hisilicon/D03/D03.dsc | 42 +- Platform/Hisilicon/D03/D03.fdf | 79 ++- Platform/Hisilicon/D03/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 81 +++ Platform/Hisilicon/D03/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 50 ++ Platform/Hisilicon/D03/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 70 +++ Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 ++ Platform/Hisilicon/D05/D05.dsc | 47 +- Platform/Hisilicon/D05/D05.fdf | 80 ++- Platform/Hisilicon/D05/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 81 +++ Platform/Hisilicon/D05/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 50 ++ Platform/Hisilicon/D05/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 70 +++ Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c | 106 ++++ Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf | 45 ++ Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 4 +- Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c | 115 ++++ Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf | 46 ++ Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c | 2 +- Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c | 3 +- Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 103 ++++ Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h | 2 + Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc | 10 + Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl | 9 + Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 34 +- Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 19 +- Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 30 +- Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 23 +- Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 529 ++++++++++++++++ Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 67 ++ Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 48 ++ Silicon/Hisilicon/HisiPkg.dec | 6 + Silicon/Hisilicon/Hisilicon.dsc.inc | 12 +- Silicon/Hisilicon/Hisilicon.fdf.inc | 9 + Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 10 +- Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h | 31 + Silicon/Hisilicon/Include/Library/OemDevicePath.h | 52 ++ Silicon/Hisilicon/Include/Protocol/HisiPlatformSasProtocol.h | 30 + Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h | 32 + Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h | 2 + Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c | 466 ++++++++++++++ Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf | 51 ++ Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 643 ++++++++++++++++++++ Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h | 31 + Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 74 +++ Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c | 123 ++++ Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf | 51 ++ 46 files changed, 3504 insertions(+), 54 deletions(-) create mode 100644 Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini create mode 100644 Platform/Hisilicon/D03/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc create mode 100644 Platform/Hisilicon/D03/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf create mode 100644 Platform/Hisilicon/D03/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c create mode 100644 Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini create mode 100644 Platform/Hisilicon/D05/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc create mode 100644 Platform/Hisilicon/D05/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf create mode 100644 Platform/Hisilicon/D05/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.c create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.h create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf create mode 100644 Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h create mode 100644 Silicon/Hisilicon/Include/Library/OemDevicePath.h create mode 100644 Silicon/Hisilicon/Include/Protocol/HisiPlatformSasProtocol.h create mode 100644 Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h create mode 100644 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c create mode 100644 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf create mode 100644 Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c create mode 100644 Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf -- 1.9.1