From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::244; helo=mail-pl0-x244.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x244.google.com (mail-pl0-x244.google.com [IPv6:2607:f8b0:400e:c01::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8C1F922393624 for ; Fri, 2 Feb 2018 04:00:38 -0800 (PST) Received: by mail-pl0-x244.google.com with SMTP id f4so6017173plr.10 for ; Fri, 02 Feb 2018 04:06:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2HaAwX9/c2G+YXTCHzD2U7eRW5aiDuapm4bcLjfPENU=; b=Lxv5VBUl771YR6TNOStEvgxIYIIcsRImE9RpsVOz8sc3CKiiF8xmy0+hAgFgVtvVip WFtkUlFi7QDuc75S7CEf9qE1c+aoVEaL+HseXhpUWuUjeo+Zj8s2Mhj7/KklRSyvAQua yqM8v6NfvhEuX6GlzuyDmYcqvS6Ia3is+Hr7o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2HaAwX9/c2G+YXTCHzD2U7eRW5aiDuapm4bcLjfPENU=; b=K5r1GVe6PnkveUvzgJFpedy5TM9E8/AlQHfEDdC/zJy2NCwLI4Oskrk6Yf7XDMauee Ysm+5ftJetKW1iYSIoSV7TguLuCDlX05u4lp325LM6vD5BDBsN/4oVjGnp9ZOp/2x1L9 AlGE4DS3Gkv3jlqjdyAa8yDjf8b0TCK8cPs7aECn2JTt3UhRJhL3b81/CvgAT63hrnpr 6oFMLC7oN2u+F95vPxbAeH5IzKHOeNrKioHJj8VIrwJWZNFnkX7OUn1ZVm9aSREs0U9I 1iJAJiNb7YM9bPgSOUXKap0Eb3OWPfKlrnb59L1YWzIZH6SIjKNjG8NeaqqlnEAIOJkD d8sg== X-Gm-Message-State: AKwxyteCPPbsjEV0GspJz6Ry5/g3VTNDSXYW9o8NhDygyJFlTotGDd5E 3wYVaams6vo8Cs8GRXAroHtbz/DJeeg= X-Google-Smtp-Source: AH8x2275887KEN2ptwq+8JxU9nwlvuHA8BBi9+KfCVuIhzUg19hj5U0WITM6iOU2JtWYvPPecQfgiA== X-Received: by 2002:a17:902:2c83:: with SMTP id n3-v6mr10953571plb.227.1517573176633; Fri, 02 Feb 2018 04:06:16 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id b8sm3673047pff.31.2018.02.02.04.06.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 02 Feb 2018 04:06:16 -0800 (PST) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, mengfanrong@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, waip23@126.com, Heyi Guo , Wang Yue Date: Fri, 2 Feb 2018 20:05:36 +0800 Message-Id: <1517573143-11451-9-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1517573143-11451-1-git-send-email-heyi.guo@linaro.org> References: <1517573143-11451-1-git-send-email-heyi.guo@linaro.org> Subject: [PATCH edk2-platforms v3 08/15] Hilisicon: Change DmaLib to CoherentDmaLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 02 Feb 2018 12:00:39 -0000 Unify all D0x(include D06 in further) to cache coherent DmaLib. This can improve boot speed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Wang Yue Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Reviewed-by: Leif Lindholm Reviewed-by: Ard Biesheuvel --- Platform/Hisilicon/D05/D05.dsc | 2 +- Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c | 2 +- Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c | 3 +-- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 6e44041..dfe19b0 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -614,7 +614,7 @@ Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { - DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf + DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf } diff --git a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c b/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c index 706eb12..63de50b 100644 --- a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c +++ b/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c @@ -26,7 +26,7 @@ EhciVirtualPciIoInitialize ( { return RegisterNonDiscoverableMmioDevice ( NonDiscoverableDeviceTypeEhci, - NonDiscoverableDeviceDmaTypeNonCoherent, + NonDiscoverableDeviceDmaTypeCoherent, NULL, NULL, 1, diff --git a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c index 2310ee4..3e272f8 100644 --- a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c +++ b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c @@ -27,7 +27,6 @@ ExitBootServicesEventSmmu ( IN VOID *Context ) { - SmmuConfigForOS (); DEBUG((EFI_D_INFO,"SMMU ExitBootServicesEvent\n")); } @@ -43,7 +42,7 @@ IoInitDxeEntry ( (VOID) EfiSerdesInitWrap (); - SmmuConfigForBios (); + SmmuConfigForOS (); Status = gBS->CreateEvent ( EVT_SIGNAL_EXIT_BOOT_SERVICES, -- 1.9.1