From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::244; helo=mail-pl0-x244.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl0-x244.google.com (mail-pl0-x244.google.com [IPv6:2607:f8b0:400e:c01::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 45E8021F0DA6F for ; Wed, 7 Feb 2018 00:19:26 -0800 (PST) Received: by mail-pl0-x244.google.com with SMTP id g18so39922plo.7 for ; Wed, 07 Feb 2018 00:25:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2HaAwX9/c2G+YXTCHzD2U7eRW5aiDuapm4bcLjfPENU=; b=i1Y/GPUc7eF6iBlX/K99KTkY8MxQ157IaZJf7nrReqYKDu61JJ1e4Nu25KcH0lecc6 2jI7m1+DbaJ3hGfviNI7DsIg3Viqe30Pe+vb5tjszNsvjqHt2A7OXnwzshN+EZtDvLja E11ynRxUcyYbs5bDvwDM36i4FCxR5H/yu+Vag= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2HaAwX9/c2G+YXTCHzD2U7eRW5aiDuapm4bcLjfPENU=; b=S010LYlaBH3eZZZ6yUvt+U+M56Fa87SZnmfS+WUN/E0b+ZkG1kzDoH+57DjrEyIAPw XTdAH62v7xD0yQiJSSc277SxmCZpMCxZpd9Abuc/++XWlivzu7NknfyxPZhEweK7pH00 5JM7jC1Tsix+2O6wwlOsFaoGS84GyHGj0H++E4SvhdLyg2vpdyfd+KvFLRm0izlY6HXt cdZrfYrdS++nrWJEoOPfnOmKfrNqU0Jj5ia9ONJt3HKfJcsJTy7TxMJwClpGANMmWxP1 ZW0Dycz7CjUKsPOMjv6mO/h+0OZtiuBKokLuIPmD9XfAEpPZU+uFVaXz+nVxnoxCWRMv MMgw== X-Gm-Message-State: APf1xPBwVjaFjkasBggEmvGjAOpC4QOzPSUoEcs6f6QQ7zvXOh4worwX VQ25lpvgaXFbXF3XiejTNhgnGg== X-Google-Smtp-Source: AH8x224zoFjsLk/wHegwFFojuy1HVyt+yrjUx4AHkhD6R6X0xTwumljF7f6va1TJ2tXeTvYbByRKwQ== X-Received: by 2002:a17:902:49:: with SMTP id 67-v6mr5145688pla.424.1517991909695; Wed, 07 Feb 2018 00:25:09 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id k127sm1984999pga.92.2018.02.07.00.24.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 07 Feb 2018 00:25:09 -0800 (PST) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Cc: ard.biesheuvel@linaro.org, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, mengfanrong@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, waip23@126.com, Heyi Guo , Wang Yue Date: Wed, 7 Feb 2018 16:22:42 +0800 Message-Id: <1517991769-5485-9-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1517991769-5485-1-git-send-email-heyi.guo@linaro.org> References: <1517991769-5485-1-git-send-email-heyi.guo@linaro.org> Subject: [PATCH edk2-platforms v4 08/15] Hilisicon: Change DmaLib to CoherentDmaLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Feb 2018 08:19:26 -0000 Unify all D0x(include D06 in further) to cache coherent DmaLib. This can improve boot speed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Wang Yue Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Reviewed-by: Leif Lindholm Reviewed-by: Ard Biesheuvel --- Platform/Hisilicon/D05/D05.dsc | 2 +- Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c | 2 +- Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c | 3 +-- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 6e44041..dfe19b0 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -614,7 +614,7 @@ Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf { - DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf + DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf } diff --git a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c b/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c index 706eb12..63de50b 100644 --- a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c +++ b/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c @@ -26,7 +26,7 @@ EhciVirtualPciIoInitialize ( { return RegisterNonDiscoverableMmioDevice ( NonDiscoverableDeviceTypeEhci, - NonDiscoverableDeviceDmaTypeNonCoherent, + NonDiscoverableDeviceDmaTypeCoherent, NULL, NULL, 1, diff --git a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c index 2310ee4..3e272f8 100644 --- a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c +++ b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c @@ -27,7 +27,6 @@ ExitBootServicesEventSmmu ( IN VOID *Context ) { - SmmuConfigForOS (); DEBUG((EFI_D_INFO,"SMMU ExitBootServicesEvent\n")); } @@ -43,7 +42,7 @@ IoInitDxeEntry ( (VOID) EfiSerdesInitWrap (); - SmmuConfigForBios (); + SmmuConfigForOS (); Status = gBS->CreateEvent ( EVT_SIGNAL_EXIT_BOOT_SERVICES, -- 1.9.1