From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::242; helo=mail-lf0-x242.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf0-x242.google.com (mail-lf0-x242.google.com [IPv6:2a00:1450:4010:c07::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D3B16223230D3 for ; Fri, 16 Feb 2018 08:29:42 -0800 (PST) Received: by mail-lf0-x242.google.com with SMTP id j193so4851751lfe.0 for ; Fri, 16 Feb 2018 08:35:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=h43+wgDLfPXME6BRpBhOyOhzAgOr3mK8OTSOtJGVpTs=; b=cOaWS4sup1DTz1al6yVP6Xs4dYwVXKO7mvjcuIl77hxzYZdwU1zyDNagyEvzr0SxDG QHBnJPcdORbqRcLMV7jVcUBNSBU0YmgKwRuafcec3pOH3cFPoHMOisx1vfDiXnwPdFW0 YhTsG7r8eIPdSBud+dJMk/5SjXCXNTYKsK5JriMNPeWRt/0gsQW62iZEQSXTDzS3SfS7 nNqFWMCyt/sEdp9TaHJFR8nhvaKV/u2chMANXOoLgp6cYvFjyCEuZ8dAbE9LTmEV3i5i 3PmtQL15wQs/iEP3Xe9YUJiLEWTavd423R8qMLIHOkvPlo/iK46/72EvK0OH0gWvkvX6 SNkg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=h43+wgDLfPXME6BRpBhOyOhzAgOr3mK8OTSOtJGVpTs=; b=mYQQADD4MsFRc6hgCrZcQJrxS4tdg8MQ/edF+jK+ggwSgMoD4GOZkkwnPU1kFocwis f1WU9GQ6+ENJcx3ZCRyPCJo3URjLlnRo+CyyY4AdXvmUEX25iutey2xe8gRTn03SPbkt 8r4Uoq1HEi+M8yYEAthemu/f662SP6c8wRo3OKYOid3TFVe6lGNzytReOnt/DhJB0kYE 13CldL3er6DaePcos4YQSSXHsIXtJoy3TGiJD/mJK/aU1dTxc6726Egq0JRbFgzJb9yg HdPGXquHziDyjJcbMLgc3mchq4+l2SW29caWLDOcs2RWTS68IGcj80PrdYJ0cevtnlvA zOhg== X-Gm-Message-State: APf1xPDNxWwJER044YUt40vlDY+moRxf47ECcpDInVzm4VuYc/jvbaeW IQVrkUvriXakKHsug+aj+zhoC+MzdKg= X-Google-Smtp-Source: AH8x225hNCpGa9qOO7gScYtXBaMEbDQm7ymYdqqZPh4F6o1vxgy7U/IVG71uBbs0qvBmYFRaJHQZ4A== X-Received: by 10.46.58.1 with SMTP id h1mr4282955lja.69.1518798934366; Fri, 16 Feb 2018 08:35:34 -0800 (PST) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id p83sm3775112lfg.41.2018.02.16.08.35.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 16 Feb 2018 08:35:33 -0800 (PST) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, neta@marvell.com, jinghua@marvell.com, xswang@marvell.com, igall@marvell.com, mw@semihalf.com, jsd@semihalf.com Date: Fri, 16 Feb 2018 17:35:25 +0100 Message-Id: <1518798927-8248-1-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 Subject: [platforms: PATCH 0/2] Armada7k8k x4/x2 PCIE fix X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 16:29:43 -0000 Hi, This short (although not small) patchset adds a fix for the PCIE SerDes link problems when using x4/x2 end points. Because it relies on the boot time HW configuration of the reference clock, a new library is introduced for obtaining sample at reset configuration. Later it will be reused e.g. in the SMBIOS driver. More details can be found in the commit log. The code is also available in the github: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/x4pcie-upstream-r20180216 I'm looking forward to your feedback. Best regards, Marcin Evan Wang (1): Marvell/Library: ComPhyLib: Fix configuration for PCIE x4 and x2 Igal Liberman (1): Marvell/Armada7k8k: Add basic sample at reset library Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 1 + Silicon/Marvell/Armada7k8k/Library/Armada7k8kSARLib/Armada7k8kSARLib.c | 166 +++++++++++++++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kSARLib/Armada7k8kSARLib.inf | 54 +++++ Silicon/Marvell/Include/Library/MvSARLib.h | 57 ++++++ Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c | 216 +++++++++++++++----- Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c | 1 + Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h | 20 ++ Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf | 1 + Silicon/Marvell/Marvell.dec | 3 + 9 files changed, 467 insertions(+), 52 deletions(-) create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSARLib/Armada7k8kSARLib.c create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSARLib/Armada7k8kSARLib.inf create mode 100644 Silicon/Marvell/Include/Library/MvSARLib.h -- 2.7.4