From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::243; helo=mail-pf0-x243.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x243.google.com (mail-pf0-x243.google.com [IPv6:2607:f8b0:400e:c00::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CB3DD22423858 for ; Wed, 28 Feb 2018 22:52:02 -0800 (PST) Received: by mail-pf0-x243.google.com with SMTP id a16so2083481pfn.9 for ; Wed, 28 Feb 2018 22:58:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3GDIjan80cUAO1zWBjouETK+quCYmkK8qXQ6hlijggY=; b=Yn2WaFMlUIauQuGaa+wFWZffxZYVooPRh43kc+86tA36kXQEyup/w7rPM9eeQBIYW7 xq62fCzc8d35EngHMKFGWF/ZnK8+vIGIqiyOZW7tXvNhYpWxqG/icVRIGDwigjAYuQyb F8u8hh6y29FIlJ9Q4Reg5YsXNeFP2bdT1pyiY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3GDIjan80cUAO1zWBjouETK+quCYmkK8qXQ6hlijggY=; b=htiXZIbxzUldANqxuvjs2L+Xa4LBoWx5aQnoxbpgBpa+ObUpHv1jqkH5RZuvrnlkOB sEdXq0NuGwQX8Wxw9ezBpRhbdgxvlft5Kywx4HgV9p0pNgA0bpa8m16vSQrptuVeinTd byiYEcdAtKGHx8vKESz3sm2Uwmur0y/VQasLJJ7tMP6HuYLWp0DCyPD4dWrv96SS9dFv 93Jq7HbOEyfeqcSxXOAP4o9jVcLCSteRRhuH8Jrt/wCaoz+pe1ZOnMDZVdNEncU5kZQZ MWAWkMN6Y5uZmRQtXE9dxXCxgJo0zHHm0xjguJzmxoxA7GwppFr9zN5qOaxxFNznGxtD nEgg== X-Gm-Message-State: APf1xPBUakJrGKs3qe2Vteh2t6Z2+NcOX+8QR6k6lfFYSsP4SPl7wUyM eoWwJcLQX4HsvIEjcSKhH2f6na00TDw= X-Google-Smtp-Source: AG47ELsOZmKuCdg5sjKbr3fiQeB1I1Du4X46atUG1X7VePXUuT9+zFEd+C036vVeQpQcf+eFb2aw4A== X-Received: by 10.98.219.129 with SMTP id f123mr901934pfg.195.1519887490479; Wed, 28 Feb 2018 22:58:10 -0800 (PST) Received: from localhost.localdomain ([45.56.152.115]) by smtp.gmail.com with ESMTPSA id p63sm6489867pfk.74.2018.02.28.22.58.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 28 Feb 2018 22:58:10 -0800 (PST) From: Heyi Guo To: edk2-devel@lists.01.org Cc: Heyi Guo Date: Thu, 1 Mar 2018 14:57:21 +0800 Message-Id: <1519887444-75510-4-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519887444-75510-1-git-send-email-heyi.guo@linaro.org> References: <1519887444-75510-1-git-send-email-heyi.guo@linaro.org> Subject: [PATCH v5 3/6] MdeModulePkg/PciHostBridgeLib.h: add address Translation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 01 Mar 2018 06:52:03 -0000 Add Translation field to PCI_ROOT_BRIDGE_APERTURE. Translation is used to represent the difference between device address and host address, if they are not the same on some platforms. In UEFI 2.7, "Address Translation Offset" is "Offset to apply to the Starting address to convert it to a PCI address". This means: Translation = device address - host address So we also use the above calculation for this Translation field to keep consistent. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Heyi Guo --- MdeModulePkg/Include/Library/PciHostBridgeLib.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/MdeModulePkg/Include/Library/PciHostBridgeLib.h b/MdeModulePkg/Include/Library/PciHostBridgeLib.h index d42e9ecdd763..18963a0d3821 100644 --- a/MdeModulePkg/Include/Library/PciHostBridgeLib.h +++ b/MdeModulePkg/Include/Library/PciHostBridgeLib.h @@ -20,8 +20,27 @@ // (Base > Limit) indicates an aperture is not available. // typedef struct { + // + // Base and Limit are the device address instead of host address when + // Translation is not zero + // UINT64 Base; UINT64 Limit; + // + // According to UEFI 2.7, Device Address = Host Address + Translation, + // so Translation = Device Address - Host Address. + // On platforms where Translation is not zero, the subtraction is probably to + // be performed with UINT64 wrap-around semantics, for we may translate an + // above-4G host address into a below-4G device address for legacy PCIe device + // compatibility. + // + // NOTE: The alignment of Translation is required to be larger than any BAR + // alignment in the same root bridge, so that the same alignment can be + // applied to both device address and host address, which simplifies the + // situation and makes the current resource allocation code in generic PCI + // host bridge driver still work. + // + UINT64 Translation; } PCI_ROOT_BRIDGE_APERTURE; typedef struct { -- 2.7.4