From: Dandan Bi <dandan.bi@intel.com>
To: edk2-devel@lists.01.org
Cc: Eric Dong <eric.dong@intel.com>, Laszlo Ersek <lersek@redhat.com>,
Ruiyu Ni <ruiyu.ni@intel.com>
Subject: [patch] UefiCpuPkg/CpuCommonFeaturesLib: Fix coding style issue
Date: Wed, 7 Mar 2018 13:53:37 +0800 [thread overview]
Message-ID: <1520402018-7012-1-git-send-email-dandan.bi@intel.com> (raw)
Boolean values do not need to use explicit comparisons
to TRUE or FALSE.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
---
UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
index cc64dbb..27ca911 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
@@ -138,11 +138,11 @@ McaInitialize (
)
{
MSR_IA32_MCG_CAP_REGISTER McgCap;
UINT32 BankIndex;
- if (State == TRUE) {
+ if (State) {
McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
for (BankIndex = 0; BankIndex < (UINT32) McgCap.Bits.Count; BankIndex++) {
CPU_REGISTER_TABLE_WRITE64 (
ProcessorNumber,
Msr,
--
1.9.5.msysgit.1
next reply other threads:[~2018-03-07 5:47 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-07 5:53 Dandan Bi [this message]
2018-03-07 5:53 ` [patch] SecurityPkg/SmmTcg2PhysicalPresenceLib: Fix coding style issue Dandan Bi
2018-03-07 7:42 ` Zhang, Chao B
2018-03-07 5:55 ` [patch] UefiCpuPkg/CpuCommonFeaturesLib: " Ni, Ruiyu
2018-03-07 9:07 ` Laszlo Ersek
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