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* [patch] UefiCpuPkg/CpuCommonFeaturesLib: Fix coding style issue
@ 2018-03-07  5:53 Dandan Bi
  2018-03-07  5:53 ` [patch] SecurityPkg/SmmTcg2PhysicalPresenceLib: " Dandan Bi
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Dandan Bi @ 2018-03-07  5:53 UTC (permalink / raw)
  To: edk2-devel; +Cc: Eric Dong, Laszlo Ersek, Ruiyu Ni

Boolean values do not need to use explicit comparisons
to TRUE or FALSE.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
---
 UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
index cc64dbb..27ca911 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
@@ -138,11 +138,11 @@ McaInitialize (
   )
 {
   MSR_IA32_MCG_CAP_REGISTER  McgCap;
   UINT32                     BankIndex;
 
-  if (State == TRUE) {
+  if (State) {
     McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
     for (BankIndex = 0; BankIndex < (UINT32) McgCap.Bits.Count; BankIndex++) {
       CPU_REGISTER_TABLE_WRITE64 (
         ProcessorNumber,
         Msr,
-- 
1.9.5.msysgit.1



^ permalink raw reply related	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2018-03-07  9:01 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-03-07  5:53 [patch] UefiCpuPkg/CpuCommonFeaturesLib: Fix coding style issue Dandan Bi
2018-03-07  5:53 ` [patch] SecurityPkg/SmmTcg2PhysicalPresenceLib: " Dandan Bi
2018-03-07  7:42   ` Zhang, Chao B
2018-03-07  5:55 ` [patch] UefiCpuPkg/CpuCommonFeaturesLib: " Ni, Ruiyu
2018-03-07  9:07 ` Laszlo Ersek

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