From: Heyi Guo <heyi.guo@linaro.org>
To: edk2-devel@lists.01.org
Cc: Chenhui Sun <sunchenhui@huawei.com>,
Heyi Guo <heyi.guo@linaro.org>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Leif Lindholm <leif.lindholm@linaro.org>,
Graeme Gregory <graeme.gregory@linaro.org>
Subject: [edk2-platforms PATCH v2 3/3] Hisilicon/D05: Support SBSA watchdog
Date: Mon, 12 Mar 2018 16:16:18 +0800 [thread overview]
Message-ID: <1520842578-95453-4-git-send-email-heyi.guo@linaro.org> (raw)
In-Reply-To: <1520842578-95453-1-git-send-email-heyi.guo@linaro.org>
From: Chenhui Sun <sunchenhui@huawei.com>
Add description of SBSA watchdogs to ACPI GTDT on D05.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chenhui Sun <sunchenhui@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Graeme Gregory <graeme.gregory@linaro.org>
---
Notes:
v2:
- Use local defines instead of PCD+define for watchdog base address
[Ard]
Silicon/Hisilicon/Hi1616/D05AcpiTables/Gtdt.aslc | 25 ++++++++++----------
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Gtdt.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Gtdt.aslc
index 2a9d209c00f0..9f27696cf022 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Gtdt.aslc
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Gtdt.aslc
@@ -30,6 +30,14 @@
#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ALWAYS_ON_CAPABILITY | GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED)
+// Generic watchdog address for SCCL (Super CPU cluster) A and SCCL B on Hi1616.
+// Watchdogs on socket 1 are not mapped to SPI interrupts so we can't describe
+// them in GTDT.
+#define GENERIC_WATCHDOG_CONTROL_BASE_SCCL_A 0x40500000
+#define GENERIC_WATCHDOG_REFRESH_BASE_SCCL_A 0x40600000
+#define GENERIC_WATCHDOG_CONTROL_BASE_SCCL_B 0x60500000
+#define GENERIC_WATCHDOG_REFRESH_BASE_SCCL_B 0x60600000
+
#pragma pack (1)
typedef struct {
@@ -57,22 +65,15 @@ EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV
GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress
-#ifdef notyet
- PV660_WATCHDOG_COUNT, // UINT32 PlatformTimerCount
+ HI1616_WATCHDOG_COUNT, // UINT32 PlatformTimerCount
sizeof (EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 PlatfromTimerOffset
},
{
- EFI_ACPI_6_1_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(
- //FixedPcdGet32 (PcdGenericWatchdogRefreshBase), FixedPcdGet32 (PcdGenericWatchdogControlBase), 93, 0),
- 0, 0, 0, 0),
- EFI_ACPI_6_1_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(
- //FixedPcdGet32 (PcdGenericWatchdogRefreshBase), FixedPcdGet32 (PcdGenericWatchdogControlBase), 94, EFI_ACPI_6_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER)
- 0, 0, 0, 0)
+ EFI_ACPI_5_1_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(
+ GENERIC_WATCHDOG_REFRESH_BASE_SCCL_A, GENERIC_WATCHDOG_CONTROL_BASE_SCCL_A, 400, 0),
+ EFI_ACPI_5_1_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(
+ GENERIC_WATCHDOG_REFRESH_BASE_SCCL_B, GENERIC_WATCHDOG_CONTROL_BASE_SCCL_B, 496, 0)
}
-#else /* !notyet */
- 0, 0
- }
-#endif
};
//
--
2.7.4
next prev parent reply other threads:[~2018-03-12 8:10 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-12 8:16 [edk2-platforms PATCH v2 0/3] Fix SBSA test failures on D05 Heyi Guo
2018-03-12 8:16 ` [edk2-platforms PATCH v2 1/3] Hisilicon/D0x: Set ACPI GTDT always-on flag Heyi Guo
2018-03-12 8:16 ` [edk2-platforms PATCH v2 2/3] Hisilicon: disable GICv3 legacy mode Heyi Guo
2018-03-12 8:16 ` Heyi Guo [this message]
2018-03-12 11:42 ` [edk2-platforms PATCH v2 0/3] Fix SBSA test failures on D05 Ard Biesheuvel
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