From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::243; helo=mail-pf0-x243.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x243.google.com (mail-pf0-x243.google.com [IPv6:2607:f8b0:400e:c00::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3F263224872AC for ; Mon, 12 Mar 2018 17:25:53 -0700 (PDT) Received: by mail-pf0-x243.google.com with SMTP id u5so5116840pfh.6 for ; Mon, 12 Mar 2018 17:32:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FxkRPZE+ohZU0je4CrHrRuB7F+xklm6biQAiVMp2jlE=; b=BvoSZlVFCPA1K5upVgZ19Sgy85ITIXfbGEyIx1l+ZaAs2mwB3PZNXhzcOX44XPNPgd s+BqtjWfYE5aX53FvWq3GpN1gQBWIo1F86NHLhL36pAFgqHpVq//UPvnbQV6SHJ4yDLm uIMwFVt3bIaIkTOkNbIWky/n+isbnRRfOri4k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FxkRPZE+ohZU0je4CrHrRuB7F+xklm6biQAiVMp2jlE=; b=h0IEW0wsb+JjqczIpWX9JyOsKMi97yRehSENzbia/rlGzYkylnBlcySy2/8Q3dJMs3 cWPO2BlkFdNcKJ5jV1qTBJJdjOI/BWx9TumMbIFF8SJcepLadaA47GeSi0NZV2On4GPG gyG2bXuRxtONU9s8P94QuQeKJ9S+cy2EaCV15sEIw5qr4LzyhHg0OSieNuaAsekPgvJ+ XpsnD9GS+nmZJbHt6AQzpH+bm2JvCrURATMruJN+Vjyi2YhmW0O0jEgeLcLAiGxkLDZ5 lqL8I3MnhCrn48RBLhCDDX4FO9VWDw5Bcc63LouCXVyw2OSybCHDgLaAYuPRzMiMcWgB 8pAA== X-Gm-Message-State: AElRT7Gmux7qUqABGPvKSCsleY5YXG9DV8eVxvVxx6MKtApdSUrXjCM6 P3qY+FIM7BE0l0KAA+nm1Q4vkef1wlM= X-Google-Smtp-Source: AG47ELvlhyqFnsci71ILzZPD/WVBbk2J21BgQY3IV7lnTsrH99DqaT5I2u5M6lVzryZBHgHNg3PcyQ== X-Received: by 10.98.215.81 with SMTP id v17mr9849381pfl.110.1520901133980; Mon, 12 Mar 2018 17:32:13 -0700 (PDT) Received: from localhost.localdomain ([45.56.152.76]) by smtp.gmail.com with ESMTPSA id p3sm16104145pga.45.2018.03.12.17.32.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 12 Mar 2018 17:32:13 -0700 (PDT) From: Heyi Guo To: edk2-devel@lists.01.org Cc: Heyi Guo , Yi Li , Leif Lindholm , Ard Biesheuvel , Marc Zyngier Date: Tue, 13 Mar 2018 08:31:30 +0800 Message-Id: <1520901090-96694-2-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1520901090-96694-1-git-send-email-heyi.guo@linaro.org> References: <1520901090-96694-1-git-send-email-heyi.guo@linaro.org> Subject: [PATCH v2 1/1] ArmPkg/TimerDxe: Add ISB for timer compare value reload X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 Mar 2018 00:25:53 -0000 If timer interrupt is level sensitive, reloading timer compare register has a side effect of clearing GIC pending status, so a "ISB" is needed to make sure this instruction is executed before enabling CPU IRQ, or else we may get spurious timer interrupts. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Heyi Guo Signed-off-by: Yi Li Cc: Leif Lindholm Cc: Ard Biesheuvel Cc: Marc Zyngier --- Notes: v2: - Use ISB instead of DSB [Marc] - Update commit message accordingly. ArmPkg/Drivers/TimerDxe/TimerDxe.c | 1 + 1 file changed, 1 insertion(+) diff --git a/ArmPkg/Drivers/TimerDxe/TimerDxe.c b/ArmPkg/Drivers/TimerDxe/TimerDxe.c index 33d7c922221f..32abee8726a0 100644 --- a/ArmPkg/Drivers/TimerDxe/TimerDxe.c +++ b/ArmPkg/Drivers/TimerDxe/TimerDxe.c @@ -337,6 +337,7 @@ TimerInterruptHandler ( // Set next compare value ArmGenericTimerSetCompareVal (CompareValue); + ArmInstructionSynchronizationBarrier (); ArmGenericTimerEnableTimer (); } -- 2.7.4