* [PATCH 1/1] IntelSiliconPkg/Vtd: Add more debug info.
@ 2018-03-19 0:50 Star Zeng
0 siblings, 0 replies; only message in thread
From: Star Zeng @ 2018-03-19 0:50 UTC (permalink / raw)
To: edk2-devel; +Cc: Jiewen Yao, Star Zeng
From: Jiewen Yao <jiewen.yao@intel.com>
Add more debug info for reason code.
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
---
IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c
index bc9f427a36..8dbc83fa2d 100644
--- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c
+++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c
@@ -481,7 +481,7 @@ DumpVtdRegs (
SourceId.Uint16 = (UINT16)FrcdReg.Bits.SID;
DEBUG((DEBUG_INFO, " Source - B%02x D%02x F%02x\n", SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function));
DEBUG((DEBUG_INFO, " Type - %x (%a)\n", FrcdReg.Bits.T, FrcdReg.Bits.T ? "read" : "write"));
- DEBUG((DEBUG_INFO, " Reason - %x\n", FrcdReg.Bits.FR));
+ DEBUG((DEBUG_INFO, " Reason - %x (Refer to VTd Spec, Appendix A)\n", FrcdReg.Bits.FR));
}
}
--
2.16.2.windows.1
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