From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.96.140; helo=cam-smtp0.cambridge.arm.com; envelope-from=alexei.fedorov@arm.com; receiver=edk2-devel@lists.01.org Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 94DEE203B8CA1 for ; Fri, 27 Apr 2018 06:58:53 -0700 (PDT) Received: from E107992.Emea.Arm.com (e107992.emea.arm.com [10.10.1.106]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id w3RDwoLI003838; Fri, 27 Apr 2018 14:58:50 +0100 From: AlexeiFedorov To: edk2-devel@lists.01.org Cc: ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, Matteo.Carlini@arm.com, Stephanie.Hughes-Fitt@arm.com, nd@arm.com, Evan.Lloyd@arm.com, Sami.Mujawar@arm.com Date: Fri, 27 Apr 2018 14:58:43 +0100 Message-Id: <1524837524-48208-1-git-send-email-alexei.fedorov@arm.com> X-Mailer: git-send-email 2.7.1.windows.1 Subject: [PATCH v1] ArmPkg: Fix bug in Generic Waitchdog driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 27 Apr 2018 13:58:54 -0000 In ArmPkg\Drivers\GenericWatchdogDxe\GenericWatchdogDxe.c the following functions WatchdogWriteOffsetRegister(); WatchdogWriteCompareRegister(); WatchdogEnable(); WatchdogDisable(); provide write access to ARM Generic Watchdog registers and use the values returned by MmioWrite32() and MmioWrite64() as EFI_STATUS return codes. Because MmioWriteXY() return the value passed as its write parameter, Generic Watchdog access functions can return error code which is different from EFI_SUCCESS, e.g. the following call Status = WatchdogWriteOffsetRegister (MAX_UINT32); if (EFI_ERROR (Status)) { return Status; } will return MAX_UINT32 defined in MdePkg\Include\Base.h as #define MAX_UINT32 ((UINT32)0xFFFFFFFF) This commit declares all the functions listed above as VOID and removes the code for checking their return values. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Alexei Fedorov Reviewed-by: Evan Lloyd --- All the changes can be seen at https://github.com/AlexeiFedorov/edk2/tree/84_generic_timer_v1 Notes: v1: - Fix functions writing to ARM Generic Watchdog's registers [Alexei] ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 37 +++++++++----------- 1 file changed, 16 insertions(+), 21 deletions(-) diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c index 252ba5bf321e379ef440830cab468af7c55905b3..3180f011253639c408b7151c79c2106a352c7340 100644 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c +++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2013-2017, ARM Limited. All rights reserved. +* Copyright (c) 2013-2018, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD @@ -43,36 +43,36 @@ UINT64 mNumTimerTicks = 0; EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol; -EFI_STATUS +VOID WatchdogWriteOffsetRegister ( UINT32 Value ) { - return MmioWrite32 (GENERIC_WDOG_OFFSET_REG, Value); + MmioWrite32 (GENERIC_WDOG_OFFSET_REG, Value); } -EFI_STATUS +VOID WatchdogWriteCompareRegister ( UINT64 Value ) { - return MmioWrite64 (GENERIC_WDOG_COMPARE_VALUE_REG, Value); + MmioWrite64 (GENERIC_WDOG_COMPARE_VALUE_REG, Value); } -EFI_STATUS +VOID WatchdogEnable ( VOID ) { - return MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_ENABLED); + MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_ENABLED); } -EFI_STATUS +VOID WatchdogDisable ( VOID ) { - return MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_DISABLED); + MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_DISABLED); } /** On exiting boot services we must make sure the Watchdog Timer @@ -163,9 +163,7 @@ WatchdogRegisterHandler ( then the watchdog timer is disabled. @retval EFI_SUCCESS The watchdog timer has been programmed to fire - in Time 100ns units. - @retval EFI_DEVICE_ERROR A watchdog timer could not be programmed due - to a device error. + in TimerPeriod 100ns units. **/ EFI_STATUS @@ -176,12 +174,12 @@ WatchdogSetTimerPeriod ( ) { UINTN SystemCount; - EFI_STATUS Status; // if TimerPeriod is 0, this is a request to stop the watchdog. if (TimerPeriod == 0) { mNumTimerTicks = 0; - return WatchdogDisable (); + WatchdogDisable (); + return EFI_SUCCESS; } // Work out how many timer ticks will equate to TimerPeriod @@ -195,19 +193,16 @@ WatchdogSetTimerPeriod ( because enabling the watchdog causes an "explicit refresh", which clobbers the compare register (WCV). In order to make sure this doesn't trigger an interrupt, set the offset to max. */ - Status = WatchdogWriteOffsetRegister (MAX_UINT32); - if (EFI_ERROR (Status)) { - return Status; - } + WatchdogWriteOffsetRegister (MAX_UINT32); WatchdogEnable (); SystemCount = ArmGenericTimerGetSystemCount (); - Status = WatchdogWriteCompareRegister (SystemCount + mNumTimerTicks); + WatchdogWriteCompareRegister (SystemCount + mNumTimerTicks); } else { - Status = WatchdogWriteOffsetRegister ((UINT32)mNumTimerTicks); + WatchdogWriteOffsetRegister ((UINT32)mNumTimerTicks); WatchdogEnable (); } - return Status; + return EFI_SUCCESS; } /** -- 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'