[PATCH edk2-platforms v4 0/9] Platform/ARM/Sgi: Add Arm's SGI platform support

[PATCH edk2-platforms v4 0/9] Platform/ARM/Sgi: Add Arm's SGI platform support

[Thomas Abraham]

Changes since v3:
- Adds support for SMSC9118 ethernet controller
- Adds support for PCIe and SATA controller to enable SATA disk access

Changes since v2:
- addressed all the comments from Ard.
- PrePeiCore is used instead of PrePi.

Changes since v1:
- minor update to commit messages

Arm CoreLink System Guidance for Infrastructure is a collection of
resources to provide a representative view of typical compute subsystems
that can be designed and implemented using specific generations of Arm IP.
These compute subsystems address the expected requirements of a specific
segment of the infrastructure market which includes servers, storage and
networking.

This patch series adds initial platform port support for Arm'S SGI-575
platform. This platform has 8x Cortex-A75 CPUs, supports DynamIQ
with L3 cache options, supports 2x DDR4-3200 (DMC-620) memory controller
and is SBSAv3 compliant. This series includes support for GIC, Serial,
smsc91x and virtio block device.

Daniil Egranov (4):
  Platform/ARM/Sgi: add initial platform dxe driver implementation
  Platform/ARM/Sgi: add support for virtio block device
  Platform/ARM/Sgi: add the initial set of acpi tables
  Platform/ARM/Sgi: add support for smsc91x ethernet controller

Thomas Abraham (3):
  Platform/ARM/Sgi: Add Platform library implementation
  Platform/ARM/Sgi: implement PciHostBridgeLib support
  Platform/ARM/Sgi: Add Ssdt, Iort and Mcfg tables

Vishwanatha HG (2):
  Platform/ARM/Sgi: add NOR flash platform library implementation
  Platform/ARM/Sgi: add initial support for ARM SGI platform

 .../ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf    |  58 ++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc    |  90 ++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl     |  99 ++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc    |  87 ++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc    | 123 ++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc    | 106 +++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc    | 173 +++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc    |  59 ++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc    |  77 +++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl     |  91 ++++++
 .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   |  48 +++
 .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf |  74 +++++
 .../ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c |  76 +++++
 Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h        |  41 +++
 Platform/ARM/SgiPkg/Include/SgiPlatform.h          |  71 +++++
 .../ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c   |  66 ++++
 .../ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf |  34 ++
 .../Library/PciHostBridgeLib/PciHostBridgeLib.c    | 189 ++++++++++++
 .../Library/PciHostBridgeLib/PciHostBridgeLib.inf  |  63 ++++
 .../SgiPkg/Library/PlatformLib/AArch64/Helper.S    |  65 ++++
 .../ARM/SgiPkg/Library/PlatformLib/PlatformLib.c   |  73 +++++
 .../ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf |  66 ++++
 .../SgiPkg/Library/PlatformLib/PlatformLibMem.c    | 128 ++++++++
 Platform/ARM/SgiPkg/SgiPlatform.dec                |  41 +++
 Platform/ARM/SgiPkg/SgiPlatform.dsc                | 305 ++++++++++++++++++
 Platform/ARM/SgiPkg/SgiPlatform.fdf                | 342 +++++++++++++++++++++
 26 files changed, 2645 insertions(+)
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl
 create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
 create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
 create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c
 create mode 100644 Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
 create mode 100644 Platform/ARM/SgiPkg/Include/SgiPlatform.h
 create mode 100644 Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c
 create mode 100644 Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf
 create mode 100644 Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
 create mode 100644 Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
 create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S
 create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
 create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
 create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
 create mode 100644 Platform/ARM/SgiPkg/SgiPlatform.dec
 create mode 100644 Platform/ARM/SgiPkg/SgiPlatform.dsc
 create mode 100644 Platform/ARM/SgiPkg/SgiPlatform.fdf

-- 
2.7.4

[PATCH edk2-platforms v4 1/9] Platform/ARM/Sgi: Add Platform library implementation

[Thomas Abraham]

Add initial SGI platform library support. This includes the virtual
memory map and helper functions for platform intialization.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
---
 Platform/ARM/SgiPkg/Include/SgiPlatform.h          |  67 +++++++++++++
 .../SgiPkg/Library/PlatformLib/AArch64/Helper.S    |  65 +++++++++++++
 .../ARM/SgiPkg/Library/PlatformLib/PlatformLib.c   |  73 +++++++++++++++
 .../ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf |  66 +++++++++++++
 .../SgiPkg/Library/PlatformLib/PlatformLibMem.c    | 104 +++++++++++++++++++++
 5 files changed, 375 insertions(+)
 create mode 100644 Platform/ARM/SgiPkg/Include/SgiPlatform.h
 create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S
 create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
 create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
 create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c

diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
new file mode 100644
index 0000000..441a467
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -0,0 +1,67 @@
+/** @file
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution. The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef __SGI_PLATFORM_H__
+#define __SGI_PLATFORM_H__
+
+/***********************************************************************************
+// Platform Memory Map
+************************************************************************************/
+
+// Expansion AXI - SMC Chip Select 0
+#define SGI_EXP_SMC_CS0_BASE                      0x08000000
+#define SGI_EXP_SMC_CS0_SZ                        SIZE_64MB
+
+// Expansion AXI - SMC Chip Select 1
+#define SGI_EXP_SMC_CS1_BASE                      0x0C000000
+#define SGI_EXP_SMC_CS1_SZ                        SIZE_64MB
+
+// Expansion AXI - System peripherals
+#define SGI_EXP_SYS_PERIPH_BASE                   0x1C000000
+#define SGI_EXP_SYS_PERIPH_SZ                     SIZE_2MB
+
+// Base address of system peripherals
+#define SGI_EXP_SYSPH_SYSTEM_REGISTERS            0x1C010000
+#define SGI_EXP_SYSPH_VIRTIO_BLOCK_BASE           0x1C130000
+
+// Sub System Peripherals - UART0
+#define SGI_SUBSYS_UART0_BASE                     0x2A400000
+#define SGI_SUBSYS_UART0_SZ                       0x00010000
+
+// Sub System Peripherals - UART1
+#define SGI_SUBSYS_UART1_BASE                     0x2A410000
+#define SGI_SUBSYS_UART1_SZ                       0x00010000
+
+// Sub System Peripherals - Generic Watchdog
+#define SGI_SUBSYS_GENERIC_WDOG_BASE              0x2A440000
+#define SGI_SUBSYS_GENERIC_WDOG_SZ                SIZE_128KB
+
+// Sub System Peripherals - GIC
+#define SGI_SUBSYS_GENERIC_GIC_BASE               0x30000000
+#define SGI_SUBSYS_GENERIC_GICR_BASE              0x300C0000
+#define SGI_SUBSYS_GENERIC_GIC_SZ                 SIZE_1MB
+
+// Expansion AXI - Platform Peripherals - UART0
+#define SGI_EXP_PLAT_PERIPH_UART0_BASE            0x7FF70000
+#define SGI_EXP_PLAT_PERIPH_UART0_SZ              SIZE_64KB
+
+// Expansion AXI - Platform Peripherals - UART1
+#define SGI_EXP_PLAT_PERIPH_UART1_BASE            0x7FF80000
+#define SGI_EXP_PLAT_PERIPH_UART1_SZ              SIZE_64KB
+
+// Register offsets into the System Registers Block
+#define SGI_SYSPH_SYS_REG_FLASH                   0x4C
+#define SGI_SYSPH_SYS_REG_FLASH_RWEN              0x1
+
+#endif // __SGI_PLATFORM_H__
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S b/Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S
new file mode 100644
index 0000000..dab6c77
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S
@@ -0,0 +1,65 @@
+/** @file
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <AsmMacroIoLibV8.h>
+#include <Library/ArmLib.h>
+
+.text
+.align 3
+
+GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
+GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
+GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
+GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
+
+//
+// First platform specific function to be called in the PEI phase
+//
+// This function is actually the first function called by the PrePi
+// or PrePeiCore modules. It allows to retrieve arguments passed to
+// the UEFI firmware through the CPU registers.
+//
+ASM_PFX(ArmPlatformPeiBootAction):
+  ret
+
+//UINTN
+//ArmPlatformGetCorePosition (
+//  IN UINTN MpId
+//  );
+// With this function: CorePos = (ClusterId * 2) + CoreId
+ASM_PFX(ArmPlatformGetCorePosition):
+  and   x1, x0, #ARM_CORE_MASK
+  and   x0, x0, #ARM_CLUSTER_MASK
+  add   x0, x1, x0, LSR #7
+  ret
+
+//UINTN
+//ArmPlatformGetPrimaryCoreMpId (
+//  VOID
+//  );
+ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
+  MOV32 (w0, FixedPcdGet32(PcdArmPrimaryCore))
+  ret
+
+//UINTN
+//ArmPlatformIsPrimaryCore (
+//  IN UINTN MpId
+//  );
+ASM_PFX(ArmPlatformIsPrimaryCore):
+  MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCoreMask))
+  and   x0, x0, x1
+  MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCore))
+  cmp   w0, w1
+  cset  x0, eq
+  ret
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
new file mode 100644
index 0000000..ea3201a
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
@@ -0,0 +1,73 @@
+/** @file
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/ArmPlatformLib.h>
+#include <Library/BaseLib.h>
+#include <Ppi/ArmMpCoreInfo.h>
+
+STATIC ARM_CORE_INFO mCoreInfoTable[] = {
+  {
+    // Cluster 0, Core 0
+    0x0, 0x0,
+  },
+};
+
+EFI_BOOT_MODE
+ArmPlatformGetBootMode (
+  VOID
+  )
+{
+  return BOOT_WITH_FULL_CONFIGURATION;
+}
+
+RETURN_STATUS
+ArmPlatformInitialize (
+  IN  UINTN                     MpId
+  )
+{
+  return RETURN_SUCCESS;
+}
+
+EFI_STATUS
+PrePeiCoreGetMpCoreInfo (
+  OUT UINTN                   *CoreCount,
+  OUT ARM_CORE_INFO           **ArmCoreTable
+  )
+{
+  *CoreCount = 1;
+  *ArmCoreTable = mCoreInfoTable;
+  return EFI_SUCCESS;
+}
+
+STATIC ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = {
+  PrePeiCoreGetMpCoreInfo
+};
+
+EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
+  {
+    EFI_PEI_PPI_DESCRIPTOR_PPI,
+    &gArmMpCoreInfoPpiGuid,
+    &mMpCoreInfoPpi
+  }
+};
+
+VOID
+ArmPlatformGetPlatformPpiList (
+  OUT UINTN                   *PpiListSize,
+  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
+  )
+{
+  *PpiListSize = sizeof (gPlatformPpiTable);
+  *PpiList = gPlatformPpiTable;
+}
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
new file mode 100644
index 0000000..1751cc2
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
@@ -0,0 +1,66 @@
+#
+#  Copyright (c) 2018, ARM Limited. All rights reserved.
+#
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+[Defines]
+  INF_VERSION                    = 0x0001001A
+  BASE_NAME                      = ArmSgiLib
+  FILE_GUID                      = 1d0ee1e1-d791-4ecf-a43e-a9c76e674264
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = ArmPlatformLib
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  Platform/ARM/SgiPkg/SgiPlatform.dec
+
+[LibraryClasses]
+  ArmLib
+  DebugLib
+  HobLib
+  IoLib
+  MemoryAllocationLib
+  SerialPortLib
+
+[Sources.common]
+  PlatformLibMem.c
+  PlatformLib.c
+
+[Sources.AARCH64]
+  AArch64/Helper.S | GCC
+
+[FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdClusterCount
+  gArmPlatformTokenSpaceGuid.PcdCoreCount
+  gArmTokenSpaceGuid.PcdSystemMemoryBase
+  gArmTokenSpaceGuid.PcdSystemMemorySize
+  gArmTokenSpaceGuid.PcdGicDistributorBase
+  gArmTokenSpaceGuid.PcdGicRedistributorsBase
+  gArmTokenSpaceGuid.PcdFvBaseAddress
+  gArmTokenSpaceGuid.PcdArmPrimaryCore
+  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+
+  gArmTokenSpaceGuid.PcdPciMmio32Base
+  gArmTokenSpaceGuid.PcdPciMmio32Size
+  gArmTokenSpaceGuid.PcdPciMmio64Base
+  gArmTokenSpaceGuid.PcdPciMmio64Size
+  gArmSgiTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress
+  gArmSgiTokenSpaceGuid.PcdPciConfigurationSpaceSize
+
+[Guids]
+  gEfiHobListGuid          ## CONSUMES  ## SystemTable
+
+[Ppis]
+  gArmMpCoreInfoPpiGuid
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
new file mode 100644
index 0000000..9be71fb
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
@@ -0,0 +1,104 @@
+/** @file
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+
+#include <SgiPlatform.h>
+
+// Total number of descriptors, including the final "end-of-table" descriptor.
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  8
+
+/**
+  Returns the Virtual Memory Map of the platform.
+
+  This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU
+  on your platform.
+
+  @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing
+                               a Physical-to-Virtual Memory mapping. This array
+                               must be ended by a zero-filled entry.
+**/
+VOID
+ArmPlatformGetVirtualMemoryMap (
+  IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
+  )
+{
+  UINTN                         Index = 0;
+  ARM_MEMORY_REGION_DESCRIPTOR  *VirtualMemoryTable;
+
+  ASSERT (VirtualMemoryMap != NULL);
+
+  VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages
+                       (EFI_SIZE_TO_PAGES (sizeof (ARM_MEMORY_REGION_DESCRIPTOR) *
+                       MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
+  if (VirtualMemoryTable == NULL) {
+    return;
+  }
+
+  // Expansion AXI - SMC Chip Select 0 (NOR Flash)
+  VirtualMemoryTable[Index].PhysicalBase    = SGI_EXP_SMC_CS0_BASE;
+  VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_SMC_CS0_BASE;
+  VirtualMemoryTable[Index].Length          = SIZE_64MB;
+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+  // Expansion AXI - SMC Chip Select 1 (NOR Flash)
+  VirtualMemoryTable[++Index].PhysicalBase  = SGI_EXP_SMC_CS1_BASE;
+  VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_SMC_CS1_BASE;
+  VirtualMemoryTable[Index].Length          = SIZE_64MB;
+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+  // Expansion AXI - System Peripherals
+  VirtualMemoryTable[++Index].PhysicalBase  = SGI_EXP_SYS_PERIPH_BASE;
+  VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_SYS_PERIPH_BASE;
+  VirtualMemoryTable[Index].Length          = SGI_EXP_SYS_PERIPH_SZ;
+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+  // Sub System Peripherals - Generic Watchdog
+  VirtualMemoryTable[++Index].PhysicalBase  = SGI_SUBSYS_GENERIC_WDOG_BASE;
+  VirtualMemoryTable[Index].VirtualBase     = SGI_SUBSYS_GENERIC_WDOG_BASE;
+  VirtualMemoryTable[Index].Length          = SGI_SUBSYS_GENERIC_WDOG_SZ;
+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+  // Sub System Peripherals - GIC-600
+  VirtualMemoryTable[++Index].PhysicalBase  = SGI_SUBSYS_GENERIC_GIC_BASE;
+  VirtualMemoryTable[Index].VirtualBase     = SGI_SUBSYS_GENERIC_GIC_BASE;
+  VirtualMemoryTable[Index].Length          = SGI_SUBSYS_GENERIC_GIC_SZ;
+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+  // Expansion AXI - Platform Peripherals - UART1
+  VirtualMemoryTable[++Index].PhysicalBase  = SGI_EXP_PLAT_PERIPH_UART1_BASE;
+  VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_PLAT_PERIPH_UART1_BASE;
+  VirtualMemoryTable[Index].Length          = SGI_EXP_PLAT_PERIPH_UART1_SZ;
+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+  // DDR - (2GB - 16MB)
+  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdSystemMemoryBase);
+  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdSystemMemoryBase);
+  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemorySize);
+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
+
+  // End of Table
+  VirtualMemoryTable[++Index].PhysicalBase  = 0;
+  VirtualMemoryTable[Index].VirtualBase     = 0;
+  VirtualMemoryTable[Index].Length          = 0;
+  VirtualMemoryTable[Index].Attributes      = (ARM_MEMORY_REGION_ATTRIBUTES)0;
+
+  ASSERT ((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
+  *VirtualMemoryMap = VirtualMemoryTable;
+}
-- 
2.7.4

Re: [PATCH edk2-platforms v4 1/9] Platform/ARM/Sgi: Add Platform library implementation

[Ard Biesheuvel]

On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
> Add initial SGI platform library support. This includes the virtual
> memory map and helper functions for platform intialization.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
> ---
>  Platform/ARM/SgiPkg/Include/SgiPlatform.h          |  67 +++++++++++++
>  .../SgiPkg/Library/PlatformLib/AArch64/Helper.S    |  65 +++++++++++++
>  .../ARM/SgiPkg/Library/PlatformLib/PlatformLib.c   |  73 +++++++++++++++
>  .../ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf |  66 +++++++++++++
>  .../SgiPkg/Library/PlatformLib/PlatformLibMem.c    | 104 +++++++++++++++++++++
>  5 files changed, 375 insertions(+)
>  create mode 100644 Platform/ARM/SgiPkg/Include/SgiPlatform.h
>  create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S
>  create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
>  create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
>  create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
>
> diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> new file mode 100644
> index 0000000..441a467
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> @@ -0,0 +1,67 @@
> +/** @file
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution. The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#ifndef __SGI_PLATFORM_H__
> +#define __SGI_PLATFORM_H__
> +
> +/***********************************************************************************
> +// Platform Memory Map
> +************************************************************************************/
> +
> +// Expansion AXI - SMC Chip Select 0
> +#define SGI_EXP_SMC_CS0_BASE                      0x08000000
> +#define SGI_EXP_SMC_CS0_SZ                        SIZE_64MB
> +
> +// Expansion AXI - SMC Chip Select 1
> +#define SGI_EXP_SMC_CS1_BASE                      0x0C000000
> +#define SGI_EXP_SMC_CS1_SZ                        SIZE_64MB
> +
> +// Expansion AXI - System peripherals
> +#define SGI_EXP_SYS_PERIPH_BASE                   0x1C000000
> +#define SGI_EXP_SYS_PERIPH_SZ                     SIZE_2MB
> +
> +// Base address of system peripherals
> +#define SGI_EXP_SYSPH_SYSTEM_REGISTERS            0x1C010000
> +#define SGI_EXP_SYSPH_VIRTIO_BLOCK_BASE           0x1C130000
> +
> +// Sub System Peripherals - UART0
> +#define SGI_SUBSYS_UART0_BASE                     0x2A400000
> +#define SGI_SUBSYS_UART0_SZ                       0x00010000
> +
> +// Sub System Peripherals - UART1
> +#define SGI_SUBSYS_UART1_BASE                     0x2A410000
> +#define SGI_SUBSYS_UART1_SZ                       0x00010000
> +
> +// Sub System Peripherals - Generic Watchdog
> +#define SGI_SUBSYS_GENERIC_WDOG_BASE              0x2A440000
> +#define SGI_SUBSYS_GENERIC_WDOG_SZ                SIZE_128KB
> +
> +// Sub System Peripherals - GIC
> +#define SGI_SUBSYS_GENERIC_GIC_BASE               0x30000000
> +#define SGI_SUBSYS_GENERIC_GICR_BASE              0x300C0000
> +#define SGI_SUBSYS_GENERIC_GIC_SZ                 SIZE_1MB
> +
> +// Expansion AXI - Platform Peripherals - UART0
> +#define SGI_EXP_PLAT_PERIPH_UART0_BASE            0x7FF70000
> +#define SGI_EXP_PLAT_PERIPH_UART0_SZ              SIZE_64KB
> +
> +// Expansion AXI - Platform Peripherals - UART1
> +#define SGI_EXP_PLAT_PERIPH_UART1_BASE            0x7FF80000
> +#define SGI_EXP_PLAT_PERIPH_UART1_SZ              SIZE_64KB
> +
> +// Register offsets into the System Registers Block
> +#define SGI_SYSPH_SYS_REG_FLASH                   0x4C
> +#define SGI_SYSPH_SYS_REG_FLASH_RWEN              0x1
> +
> +#endif // __SGI_PLATFORM_H__
> diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S b/Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S
> new file mode 100644
> index 0000000..dab6c77
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S
> @@ -0,0 +1,65 @@
> +/** @file
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include <AsmMacroIoLibV8.h>
> +#include <Library/ArmLib.h>
> +
> +.text
> +.align 3
> +
> +GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
> +GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
> +GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
> +GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
> +
> +//
> +// First platform specific function to be called in the PEI phase
> +//
> +// This function is actually the first function called by the PrePi
> +// or PrePeiCore modules. It allows to retrieve arguments passed to
> +// the UEFI firmware through the CPU registers.
> +//
> +ASM_PFX(ArmPlatformPeiBootAction):
> +  ret
> +
> +//UINTN
> +//ArmPlatformGetCorePosition (
> +//  IN UINTN MpId
> +//  );
> +// With this function: CorePos = (ClusterId * 2) + CoreId
> +ASM_PFX(ArmPlatformGetCorePosition):
> +  and   x1, x0, #ARM_CORE_MASK
> +  and   x0, x0, #ARM_CLUSTER_MASK
> +  add   x0, x1, x0, LSR #7
> +  ret
> +
> +//UINTN
> +//ArmPlatformGetPrimaryCoreMpId (
> +//  VOID
> +//  );
> +ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
> +  MOV32 (w0, FixedPcdGet32(PcdArmPrimaryCore))
> +  ret
> +
> +//UINTN
> +//ArmPlatformIsPrimaryCore (
> +//  IN UINTN MpId
> +//  );
> +ASM_PFX(ArmPlatformIsPrimaryCore):
> +  MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCoreMask))
> +  and   x0, x0, x1
> +  MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCore))
> +  cmp   w0, w1
> +  cset  x0, eq
> +  ret
> diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
> new file mode 100644
> index 0000000..ea3201a
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
> @@ -0,0 +1,73 @@
> +/** @file
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include <Library/ArmPlatformLib.h>
> +#include <Library/BaseLib.h>
> +#include <Ppi/ArmMpCoreInfo.h>
> +
> +STATIC ARM_CORE_INFO mCoreInfoTable[] = {
> +  {
> +    // Cluster 0, Core 0
> +    0x0, 0x0,
> +  },
> +};
> +
> +EFI_BOOT_MODE
> +ArmPlatformGetBootMode (
> +  VOID
> +  )
> +{
> +  return BOOT_WITH_FULL_CONFIGURATION;
> +}
> +
> +RETURN_STATUS
> +ArmPlatformInitialize (
> +  IN  UINTN                     MpId
> +  )
> +{
> +  return RETURN_SUCCESS;
> +}
> +
> +EFI_STATUS
> +PrePeiCoreGetMpCoreInfo (
> +  OUT UINTN                   *CoreCount,
> +  OUT ARM_CORE_INFO           **ArmCoreTable
> +  )
> +{
> +  *CoreCount = 1;
> +  *ArmCoreTable = mCoreInfoTable;
> +  return EFI_SUCCESS;
> +}
> +
> +STATIC ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = {
> +  PrePeiCoreGetMpCoreInfo
> +};
> +
> +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
> +  {
> +    EFI_PEI_PPI_DESCRIPTOR_PPI,
> +    &gArmMpCoreInfoPpiGuid,
> +    &mMpCoreInfoPpi
> +  }
> +};
> +
> +VOID
> +ArmPlatformGetPlatformPpiList (
> +  OUT UINTN                   *PpiListSize,
> +  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
> +  )
> +{
> +  *PpiListSize = sizeof (gPlatformPpiTable);
> +  *PpiList = gPlatformPpiTable;
> +}
> diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
> new file mode 100644
> index 0000000..1751cc2
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
> @@ -0,0 +1,66 @@
> +#
> +#  Copyright (c) 2018, ARM Limited. All rights reserved.
> +#
> +#  This program and the accompanying materials are licensed and made available
> +#  under the terms and conditions of the BSD License which accompanies this
> +#  distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +[Defines]
> +  INF_VERSION                    = 0x0001001A
> +  BASE_NAME                      = ArmSgiLib
> +  FILE_GUID                      = 1d0ee1e1-d791-4ecf-a43e-a9c76e674264
> +  MODULE_TYPE                    = BASE
> +  VERSION_STRING                 = 1.0
> +  LIBRARY_CLASS                  = ArmPlatformLib
> +
> +[Packages]
> +  ArmPkg/ArmPkg.dec
> +  ArmPlatformPkg/ArmPlatformPkg.dec
> +  EmbeddedPkg/EmbeddedPkg.dec
> +  MdeModulePkg/MdeModulePkg.dec
> +  MdePkg/MdePkg.dec
> +  Platform/ARM/SgiPkg/SgiPlatform.dec
> +
> +[LibraryClasses]
> +  ArmLib
> +  DebugLib
> +  HobLib
> +  IoLib
> +  MemoryAllocationLib
> +  SerialPortLib
> +
> +[Sources.common]
> +  PlatformLibMem.c
> +  PlatformLib.c
> +
> +[Sources.AARCH64]
> +  AArch64/Helper.S | GCC
> +
> +[FixedPcd]
> +  gArmPlatformTokenSpaceGuid.PcdClusterCount
> +  gArmPlatformTokenSpaceGuid.PcdCoreCount
> +  gArmTokenSpaceGuid.PcdSystemMemoryBase
> +  gArmTokenSpaceGuid.PcdSystemMemorySize
> +  gArmTokenSpaceGuid.PcdGicDistributorBase
> +  gArmTokenSpaceGuid.PcdGicRedistributorsBase
> +  gArmTokenSpaceGuid.PcdFvBaseAddress
> +  gArmTokenSpaceGuid.PcdArmPrimaryCore
> +  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
> +
> +  gArmTokenSpaceGuid.PcdPciMmio32Base
> +  gArmTokenSpaceGuid.PcdPciMmio32Size
> +  gArmTokenSpaceGuid.PcdPciMmio64Base
> +  gArmTokenSpaceGuid.PcdPciMmio64Size
> +  gArmSgiTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress
> +  gArmSgiTokenSpaceGuid.PcdPciConfigurationSpaceSize
> +
> +[Guids]
> +  gEfiHobListGuid          ## CONSUMES  ## SystemTable
> +
> +[Ppis]
> +  gArmMpCoreInfoPpiGuid
> diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
> new file mode 100644
> index 0000000..9be71fb
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
> @@ -0,0 +1,104 @@
> +/** @file
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include <Library/ArmPlatformLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/HobLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +
> +#include <SgiPlatform.h>
> +
> +// Total number of descriptors, including the final "end-of-table" descriptor.
> +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  8
> +
> +/**
> +  Returns the Virtual Memory Map of the platform.
> +
> +  This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU
> +  on your platform.
> +
> +  @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing
> +                               a Physical-to-Virtual Memory mapping. This array
> +                               must be ended by a zero-filled entry.
> +**/
> +VOID
> +ArmPlatformGetVirtualMemoryMap (
> +  IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
> +  )
> +{
> +  UINTN                         Index = 0;

Initializers are not allowed for automatic variables. Please use a
separate assignment.

> +  ARM_MEMORY_REGION_DESCRIPTOR  *VirtualMemoryTable;
> +
> +  ASSERT (VirtualMemoryMap != NULL);
> +
> +  VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages
> +                       (EFI_SIZE_TO_PAGES (sizeof (ARM_MEMORY_REGION_DESCRIPTOR) *
> +                       MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
> +  if (VirtualMemoryTable == NULL) {
> +    return;
> +  }
> +
> +  // Expansion AXI - SMC Chip Select 0 (NOR Flash)
> +  VirtualMemoryTable[Index].PhysicalBase    = SGI_EXP_SMC_CS0_BASE;
> +  VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_SMC_CS0_BASE;
> +  VirtualMemoryTable[Index].Length          = SIZE_64MB;
> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
> +  // Expansion AXI - SMC Chip Select 1 (NOR Flash)
> +  VirtualMemoryTable[++Index].PhysicalBase  = SGI_EXP_SMC_CS1_BASE;
> +  VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_SMC_CS1_BASE;
> +  VirtualMemoryTable[Index].Length          = SIZE_64MB;
> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
> +  // Expansion AXI - System Peripherals
> +  VirtualMemoryTable[++Index].PhysicalBase  = SGI_EXP_SYS_PERIPH_BASE;
> +  VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_SYS_PERIPH_BASE;
> +  VirtualMemoryTable[Index].Length          = SGI_EXP_SYS_PERIPH_SZ;
> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
> +  // Sub System Peripherals - Generic Watchdog
> +  VirtualMemoryTable[++Index].PhysicalBase  = SGI_SUBSYS_GENERIC_WDOG_BASE;
> +  VirtualMemoryTable[Index].VirtualBase     = SGI_SUBSYS_GENERIC_WDOG_BASE;
> +  VirtualMemoryTable[Index].Length          = SGI_SUBSYS_GENERIC_WDOG_SZ;
> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
> +  // Sub System Peripherals - GIC-600
> +  VirtualMemoryTable[++Index].PhysicalBase  = SGI_SUBSYS_GENERIC_GIC_BASE;
> +  VirtualMemoryTable[Index].VirtualBase     = SGI_SUBSYS_GENERIC_GIC_BASE;
> +  VirtualMemoryTable[Index].Length          = SGI_SUBSYS_GENERIC_GIC_SZ;
> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
> +  // Expansion AXI - Platform Peripherals - UART1
> +  VirtualMemoryTable[++Index].PhysicalBase  = SGI_EXP_PLAT_PERIPH_UART1_BASE;
> +  VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_PLAT_PERIPH_UART1_BASE;
> +  VirtualMemoryTable[Index].Length          = SGI_EXP_PLAT_PERIPH_UART1_SZ;
> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
> +  // DDR - (2GB - 16MB)
> +  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdSystemMemoryBase);
> +  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdSystemMemoryBase);
> +  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemorySize);
> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
> +
> +  // End of Table
> +  VirtualMemoryTable[++Index].PhysicalBase  = 0;
> +  VirtualMemoryTable[Index].VirtualBase     = 0;
> +  VirtualMemoryTable[Index].Length          = 0;
> +  VirtualMemoryTable[Index].Attributes      = (ARM_MEMORY_REGION_ATTRIBUTES)0;
> +
> +  ASSERT ((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
> +  *VirtualMemoryMap = VirtualMemoryTable;
> +}
> --
> 2.7.4
>

[PATCH edk2-platforms v4 2/9] Platform/ARM/Sgi: add NOR flash platform library implementation

[Thomas Abraham]

From: Vishwanatha HG <vishwanatha.hg@arm.com>

Add a initial NOR flash driver platform wrapper as part of the platform
library. Access to NOR flash devices connected to CS0 and CS1 is enabled
in this initial implementation.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vishwanatha HG <vishwanatha.hg@arm.com>
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
---
 .../ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c   | 66 ++++++++++++++++++++++
 .../ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf | 34 +++++++++++
 2 files changed, 100 insertions(+)
 create mode 100644 Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c
 create mode 100644 Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf

diff --git a/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c
new file mode 100644
index 0000000..9b4981f
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c
@@ -0,0 +1,66 @@
+/** @file
+
+  Copyright (c) 2018, ARM Ltd. All rights reserved.
+
+  This program and the accompanying materials are licensed and made available
+  under the terms and conditions of the BSD License which accompanies this
+  distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ **/
+
+#include <PiDxe.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/NorFlashPlatformLib.h>
+#include <SgiPlatform.h>
+
+STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = {
+  {
+    SGI_EXP_SMC_CS0_BASE,
+    SGI_EXP_SMC_CS0_BASE,
+    SIZE_256KB * 256,
+    SIZE_256KB,
+    {0xEBF0B9DF, 0x17d0, 0x4812, { 0xA9, 0x59, 0xCF, 0xD7, 0x92, 0xEE, 0x31, 0x13} }
+  },
+  {
+    SGI_EXP_SMC_CS1_BASE,
+    SGI_EXP_SMC_CS1_BASE,
+    SIZE_256KB * 256,
+    SIZE_256KB,
+    { 0x1F15DA3C, 0x37FF, 0x4070, { 0xB4, 0x71, 0xBB, 0x4A, 0xF1, 0x2A, 0x72, 0x4A } }
+  },
+};
+
+EFI_STATUS
+NorFlashPlatformInitialization (
+  VOID
+  )
+{
+  UINT64 SysRegFlash;
+
+  SysRegFlash = SGI_EXP_SYSPH_SYSTEM_REGISTERS + SGI_SYSPH_SYS_REG_FLASH;
+  if ((MmioRead32 (SysRegFlash) & SGI_SYSPH_SYS_REG_FLASH_RWEN) == 0) {
+    MmioWrite32 (SysRegFlash, 1);
+  }
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+NorFlashPlatformGetDevices (
+  OUT NOR_FLASH_DESCRIPTION   **NorFlashDevices,
+  OUT UINT32                  *Count
+  )
+{
+  if ((NorFlashDevices == NULL) || (Count == NULL)) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  *NorFlashDevices = mNorFlashDevices;
+  *Count = ARRAY_SIZE (mNorFlashDevices);
+  return EFI_SUCCESS;
+}
diff --git a/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf
new file mode 100644
index 0000000..3a6b33b
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf
@@ -0,0 +1,34 @@
+#/** @file
+#
+#  Copyright (c) 2018, ARM Ltd. All rights reserved.
+
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x0001001A
+  BASE_NAME                      = NorFlashSgiLib
+  FILE_GUID                      = 3f021755-6d74-4065-9ee4-98225267b36e
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = NorFlashPlatformLib
+
+[Sources.common]
+  NorFlashLib.c
+
+[Packages]
+  ArmPlatformPkg/ArmPlatformPkg.dec
+  MdePkg/MdePkg.dec
+  Platform/ARM/SgiPkg/SgiPlatform.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  IoLib
-- 
2.7.4

Re: [PATCH edk2-platforms v4 2/9] Platform/ARM/Sgi: add NOR flash platform library implementation

[Ard Biesheuvel]

On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
> From: Vishwanatha HG <vishwanatha.hg@arm.com>
>
> Add a initial NOR flash driver platform wrapper as part of the platform
> library. Access to NOR flash devices connected to CS0 and CS1 is enabled
> in this initial implementation.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Vishwanatha HG <vishwanatha.hg@arm.com>
> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
> ---
>  .../ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c   | 66 ++++++++++++++++++++++
>  .../ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf | 34 +++++++++++
>  2 files changed, 100 insertions(+)
>  create mode 100644 Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c
>  create mode 100644 Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf
>
> diff --git a/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c
> new file mode 100644
> index 0000000..9b4981f
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c
> @@ -0,0 +1,66 @@
> +/** @file
> +
> +  Copyright (c) 2018, ARM Ltd. All rights reserved.
> +
> +  This program and the accompanying materials are licensed and made available
> +  under the terms and conditions of the BSD License which accompanies this
> +  distribution.  The full text of the license may be found at
> +  http://opensource.org/licenses/bsd-license.php
> +
> +  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> + **/
> +
> +#include <PiDxe.h>
> +#include <Library/DebugLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/NorFlashPlatformLib.h>
> +#include <SgiPlatform.h>
> +
> +STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = {
> +  {
> +    SGI_EXP_SMC_CS0_BASE,
> +    SGI_EXP_SMC_CS0_BASE,
> +    SIZE_256KB * 256,
> +    SIZE_256KB,
> +    {0xEBF0B9DF, 0x17d0, 0x4812, { 0xA9, 0x59, 0xCF, 0xD7, 0x92, 0xEE, 0x31, 0x13} }
> +  },
> +  {
> +    SGI_EXP_SMC_CS1_BASE,
> +    SGI_EXP_SMC_CS1_BASE,
> +    SIZE_256KB * 256,
> +    SIZE_256KB,
> +    { 0x1F15DA3C, 0x37FF, 0x4070, { 0xB4, 0x71, 0xBB, 0x4A, 0xF1, 0x2A, 0x72, 0x4A } }

Please use consistent whitespace in these GUID definitions.

> +  },
> +};
> +
> +EFI_STATUS
> +NorFlashPlatformInitialization (
> +  VOID
> +  )
> +{
> +  UINT64 SysRegFlash;
> +
> +  SysRegFlash = SGI_EXP_SYSPH_SYSTEM_REGISTERS + SGI_SYSPH_SYS_REG_FLASH;
> +  if ((MmioRead32 (SysRegFlash) & SGI_SYSPH_SYS_REG_FLASH_RWEN) == 0) {
> +    MmioWrite32 (SysRegFlash, 1);

SGI_SYSPH_SYS_REG_FLASH_RWEN?

Should you use MmioOr32() here? (I can't tell, I don't have the docs)

> +  }
> +
> +  return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +NorFlashPlatformGetDevices (
> +  OUT NOR_FLASH_DESCRIPTION   **NorFlashDevices,
> +  OUT UINT32                  *Count
> +  )
> +{
> +  if ((NorFlashDevices == NULL) || (Count == NULL)) {
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
> +  *NorFlashDevices = mNorFlashDevices;
> +  *Count = ARRAY_SIZE (mNorFlashDevices);
> +  return EFI_SUCCESS;
> +}
> diff --git a/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf
> new file mode 100644
> index 0000000..3a6b33b
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf
> @@ -0,0 +1,34 @@
> +#/** @file
> +#
> +#  Copyright (c) 2018, ARM Ltd. All rights reserved.
> +
> +#  This program and the accompanying materials are licensed and made available
> +#  under the terms and conditions of the BSD License which accompanies this
> +#  distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> +  INF_VERSION                    = 0x0001001A
> +  BASE_NAME                      = NorFlashSgiLib
> +  FILE_GUID                      = 3f021755-6d74-4065-9ee4-98225267b36e
> +  MODULE_TYPE                    = DXE_DRIVER
> +  VERSION_STRING                 = 1.0
> +  LIBRARY_CLASS                  = NorFlashPlatformLib
> +
> +[Sources.common]
> +  NorFlashLib.c
> +
> +[Packages]
> +  ArmPlatformPkg/ArmPlatformPkg.dec
> +  MdePkg/MdePkg.dec
> +  Platform/ARM/SgiPkg/SgiPlatform.dec
> +
> +[LibraryClasses]
> +  BaseLib
> +  DebugLib
> +  IoLib
> --
> 2.7.4
>

Re: [PATCH edk2-platforms v4 2/9] Platform/ARM/Sgi: add NOR flash platform library implementation

[Thomas Abraham]

Hi Ard,

On Mon, May 21, 2018 at 2:23 PM, Ard Biesheuvel
<ard.biesheuvel@linaro.org> wrote:
> On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
>> From: Vishwanatha HG <vishwanatha.hg@arm.com>
>>
>> Add a initial NOR flash driver platform wrapper as part of the platform
>> library. Access to NOR flash devices connected to CS0 and CS1 is enabled
>> in this initial implementation.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Vishwanatha HG <vishwanatha.hg@arm.com>
>> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
>> ---
>>  .../ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c   | 66 ++++++++++++++++++++++
>>  .../ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf | 34 +++++++++++
>>  2 files changed, 100 insertions(+)
>>  create mode 100644 Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c
>>  create mode 100644 Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf
>>
>> diff --git a/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c
>> new file mode 100644
>> index 0000000..9b4981f
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c
>> @@ -0,0 +1,66 @@
>> +/** @file
>> +
>> +  Copyright (c) 2018, ARM Ltd. All rights reserved.
>> +
>> +  This program and the accompanying materials are licensed and made available
>> +  under the terms and conditions of the BSD License which accompanies this
>> +  distribution.  The full text of the license may be found at
>> +  http://opensource.org/licenses/bsd-license.php
>> +
>> +  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +
>> + **/
>> +
>> +#include <PiDxe.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/IoLib.h>
>> +#include <Library/NorFlashPlatformLib.h>
>> +#include <SgiPlatform.h>
>> +
>> +STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = {
>> +  {
>> +    SGI_EXP_SMC_CS0_BASE,
>> +    SGI_EXP_SMC_CS0_BASE,
>> +    SIZE_256KB * 256,
>> +    SIZE_256KB,
>> +    {0xEBF0B9DF, 0x17d0, 0x4812, { 0xA9, 0x59, 0xCF, 0xD7, 0x92, 0xEE, 0x31, 0x13} }
>> +  },
>> +  {
>> +    SGI_EXP_SMC_CS1_BASE,
>> +    SGI_EXP_SMC_CS1_BASE,
>> +    SIZE_256KB * 256,
>> +    SIZE_256KB,
>> +    { 0x1F15DA3C, 0x37FF, 0x4070, { 0xB4, 0x71, 0xBB, 0x4A, 0xF1, 0x2A, 0x72, 0x4A } }
>
> Please use consistent whitespace in these GUID definitions.
>
>> +  },
>> +};
>> +
>> +EFI_STATUS
>> +NorFlashPlatformInitialization (
>> +  VOID
>> +  )
>> +{
>> +  UINT64 SysRegFlash;
>> +
>> +  SysRegFlash = SGI_EXP_SYSPH_SYSTEM_REGISTERS + SGI_SYSPH_SYS_REG_FLASH;
>> +  if ((MmioRead32 (SysRegFlash) & SGI_SYSPH_SYS_REG_FLASH_RWEN) == 0) {
>> +    MmioWrite32 (SysRegFlash, 1);
>
> SGI_SYSPH_SYS_REG_FLASH_RWEN?

The SysReg register has a bit in it that has to be set to allow
read/write access to the NOR flash. So this macros represents that
bit.

>
> Should you use MmioOr32() here? (I can't tell, I don't have the docs)

Tested with MmioOr32() and that works as well. So updated the code.

Thanks,
Thomas.

<snip>

[PATCH edk2-platforms v4 3/9] Platform/ARM/Sgi: add initial platform dxe driver implementation

[Thomas Abraham]

From: Daniil Egranov <daniil.egranov@arm.com>

Add a initial platform dxe driver which starts of being almost
an empty implementation.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
---
 .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   | 25 ++++++++
 .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 73 ++++++++++++++++++++++
 2 files changed, 98 insertions(+)
 create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
 create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf

diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
new file mode 100644
index 0000000..eb26fde
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
@@ -0,0 +1,25 @@
+/** @file
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/DebugLib.h>
+
+EFI_STATUS
+EFIAPI
+ArmSgiPkgEntryPoint (
+  IN EFI_HANDLE         ImageHandle,
+  IN EFI_SYSTEM_TABLE   *SystemTable
+  )
+{
+  return EFI_SUCCESS;
+}
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
new file mode 100644
index 0000000..dbe04c5
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
@@ -0,0 +1,73 @@
+#
+#  Copyright (c) 2018, ARM Limited. All rights reserved.
+#
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+[Defines]
+  INF_VERSION                    = 0x0001001A
+  BASE_NAME                      = PlatformDxe
+  FILE_GUID                      = 54cee352-c4cd-4d80-8524-54325c3a528e
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  ENTRY_POINT                    = ArmSgiPkgEntryPoint
+
+[Sources.common]
+  PlatformDxe.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+  Platform/ARM/SgiPkg/SgiPlatform.dec
+
+[LibraryClasses]
+  AcpiLib
+  BaseMemoryLib
+  DebugLib
+  DxeServicesTableLib
+  FdtLib
+  HobLib
+  IoLib
+  PcdLib
+  PrintLib
+  SerialPortLib
+  UefiBootServicesTableLib
+  UefiRuntimeServicesTableLib
+  UefiLib
+  UefiDriverEntryPoint
+  VirtioMmioDeviceLib
+
+[Guids]
+  gEfiEndOfDxeEventGroupGuid
+  gEfiFileInfoGuid
+  gEfiHobListGuid
+  gFdtTableGuid
+  gEfiAcpi10TableGuid
+  gEfiAcpiTableGuid
+  gSgi575AcpiTablesiFileGuid
+
+[Protocols]
+  gEfiBlockIoProtocolGuid
+  gEfiDevicePathFromTextProtocolGuid
+  gEfiSimpleFileSystemProtocolGuid
+
+[FeaturePcd]
+  gArmSgiTokenSpaceGuid.PcdVirtioSupported
+
+[FixedPcd]
+  gArmTokenSpaceGuid.PcdSystemMemoryBase
+  gArmTokenSpaceGuid.PcdSystemMemorySize
+  gArmTokenSpaceGuid.PcdHypFvBaseAddress
+  gArmTokenSpaceGuid.PcdHypFvSize
+
+[Depex]
+  TRUE
-- 
2.7.4

Re: [PATCH edk2-platforms v4 3/9] Platform/ARM/Sgi: add initial platform dxe driver implementation

[Ard Biesheuvel]

On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
> From: Daniil Egranov <daniil.egranov@arm.com>
>
> Add a initial platform dxe driver which starts of being almost
> an empty implementation.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
> ---
>  .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   | 25 ++++++++
>  .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 73 ++++++++++++++++++++++
>  2 files changed, 98 insertions(+)
>  create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>  create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
>
> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> new file mode 100644
> index 0000000..eb26fde
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> @@ -0,0 +1,25 @@
> +/** @file
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include <Library/DebugLib.h>
> +
> +EFI_STATUS
> +EFIAPI
> +ArmSgiPkgEntryPoint (
> +  IN EFI_HANDLE         ImageHandle,
> +  IN EFI_SYSTEM_TABLE   *SystemTable
> +  )
> +{
> +  return EFI_SUCCESS;
> +}
> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> new file mode 100644
> index 0000000..dbe04c5
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> @@ -0,0 +1,73 @@
> +#
> +#  Copyright (c) 2018, ARM Limited. All rights reserved.
> +#
> +#  This program and the accompanying materials are licensed and made available
> +#  under the terms and conditions of the BSD License which accompanies this
> +#  distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +[Defines]
> +  INF_VERSION                    = 0x0001001A
> +  BASE_NAME                      = PlatformDxe
> +  FILE_GUID                      = 54cee352-c4cd-4d80-8524-54325c3a528e
> +  MODULE_TYPE                    = DXE_DRIVER
> +  VERSION_STRING                 = 1.0
> +  ENTRY_POINT                    = ArmSgiPkgEntryPoint
> +
> +[Sources.common]
> +  PlatformDxe.c
> +
> +[Packages]
> +  ArmPkg/ArmPkg.dec
> +  ArmPlatformPkg/ArmPlatformPkg.dec
> +  EmbeddedPkg/EmbeddedPkg.dec
> +  MdePkg/MdePkg.dec
> +  OvmfPkg/OvmfPkg.dec
> +  Platform/ARM/SgiPkg/SgiPlatform.dec
> +
> +[LibraryClasses]
> +  AcpiLib
> +  BaseMemoryLib
> +  DebugLib
> +  DxeServicesTableLib
> +  FdtLib
> +  HobLib
> +  IoLib
> +  PcdLib
> +  PrintLib
> +  SerialPortLib
> +  UefiBootServicesTableLib
> +  UefiRuntimeServicesTableLib
> +  UefiLib
> +  UefiDriverEntryPoint
> +  VirtioMmioDeviceLib
> +
> +[Guids]
> +  gEfiEndOfDxeEventGroupGuid
> +  gEfiFileInfoGuid
> +  gEfiHobListGuid
> +  gFdtTableGuid
> +  gEfiAcpi10TableGuid
> +  gEfiAcpiTableGuid
> +  gSgi575AcpiTablesiFileGuid
> +
> +[Protocols]
> +  gEfiBlockIoProtocolGuid
> +  gEfiDevicePathFromTextProtocolGuid
> +  gEfiSimpleFileSystemProtocolGuid
> +
> +[FeaturePcd]
> +  gArmSgiTokenSpaceGuid.PcdVirtioSupported
> +
> +[FixedPcd]
> +  gArmTokenSpaceGuid.PcdSystemMemoryBase
> +  gArmTokenSpaceGuid.PcdSystemMemorySize
> +  gArmTokenSpaceGuid.PcdHypFvBaseAddress
> +  gArmTokenSpaceGuid.PcdHypFvSize
> +

As I mentioned in my review of v1: I think it is fine to start with an
empty stub for a driver, but please don't limit that to the C file.

None of these library classes, guids, protocols or PCDs are being used
in this patch. References to them should be added along with the code
that actually uses those references.

> +[Depex]
> +  TRUE
> --
> 2.7.4
>

Re: [PATCH edk2-platforms v4 3/9] Platform/ARM/Sgi: add initial platform dxe driver implementation

[Thomas Abraham]

On Mon, May 21, 2018 at 2:25 PM, Ard Biesheuvel
<ard.biesheuvel@linaro.org> wrote:
> On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
>> From: Daniil Egranov <daniil.egranov@arm.com>
>>
>> Add a initial platform dxe driver which starts of being almost
>> an empty implementation.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
>> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
>> ---
>>  .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   | 25 ++++++++
>>  .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 73 ++++++++++++++++++++++
>>  2 files changed, 98 insertions(+)
>>  create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>>  create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
>>
>> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>> new file mode 100644
>> index 0000000..eb26fde
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>> @@ -0,0 +1,25 @@
>> +/** @file
>> +*
>> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
>> +*
>> +*  This program and the accompanying materials are licensed and made available
>> +*  under the terms and conditions of the BSD License which accompanies this
>> +*  distribution.  The full text of the license may be found at
>> +*  http://opensource.org/licenses/bsd-license.php
>> +*
>> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#include <Library/DebugLib.h>
>> +
>> +EFI_STATUS
>> +EFIAPI
>> +ArmSgiPkgEntryPoint (
>> +  IN EFI_HANDLE         ImageHandle,
>> +  IN EFI_SYSTEM_TABLE   *SystemTable
>> +  )
>> +{
>> +  return EFI_SUCCESS;
>> +}
>> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
>> new file mode 100644
>> index 0000000..dbe04c5
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
>> @@ -0,0 +1,73 @@
>> +#
>> +#  Copyright (c) 2018, ARM Limited. All rights reserved.
>> +#
>> +#  This program and the accompanying materials are licensed and made available
>> +#  under the terms and conditions of the BSD License which accompanies this
>> +#  distribution.  The full text of the license may be found at
>> +#  http://opensource.org/licenses/bsd-license.php
>> +#
>> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +
>> +[Defines]
>> +  INF_VERSION                    = 0x0001001A
>> +  BASE_NAME                      = PlatformDxe
>> +  FILE_GUID                      = 54cee352-c4cd-4d80-8524-54325c3a528e
>> +  MODULE_TYPE                    = DXE_DRIVER
>> +  VERSION_STRING                 = 1.0
>> +  ENTRY_POINT                    = ArmSgiPkgEntryPoint
>> +
>> +[Sources.common]
>> +  PlatformDxe.c
>> +
>> +[Packages]
>> +  ArmPkg/ArmPkg.dec
>> +  ArmPlatformPkg/ArmPlatformPkg.dec
>> +  EmbeddedPkg/EmbeddedPkg.dec
>> +  MdePkg/MdePkg.dec
>> +  OvmfPkg/OvmfPkg.dec
>> +  Platform/ARM/SgiPkg/SgiPlatform.dec
>> +
>> +[LibraryClasses]
>> +  AcpiLib
>> +  BaseMemoryLib
>> +  DebugLib
>> +  DxeServicesTableLib
>> +  FdtLib
>> +  HobLib
>> +  IoLib
>> +  PcdLib
>> +  PrintLib
>> +  SerialPortLib
>> +  UefiBootServicesTableLib
>> +  UefiRuntimeServicesTableLib
>> +  UefiLib
>> +  UefiDriverEntryPoint
>> +  VirtioMmioDeviceLib
>> +
>> +[Guids]
>> +  gEfiEndOfDxeEventGroupGuid
>> +  gEfiFileInfoGuid
>> +  gEfiHobListGuid
>> +  gFdtTableGuid
>> +  gEfiAcpi10TableGuid
>> +  gEfiAcpiTableGuid
>> +  gSgi575AcpiTablesiFileGuid
>> +
>> +[Protocols]
>> +  gEfiBlockIoProtocolGuid
>> +  gEfiDevicePathFromTextProtocolGuid
>> +  gEfiSimpleFileSystemProtocolGuid
>> +
>> +[FeaturePcd]
>> +  gArmSgiTokenSpaceGuid.PcdVirtioSupported
>> +
>> +[FixedPcd]
>> +  gArmTokenSpaceGuid.PcdSystemMemoryBase
>> +  gArmTokenSpaceGuid.PcdSystemMemorySize
>> +  gArmTokenSpaceGuid.PcdHypFvBaseAddress
>> +  gArmTokenSpaceGuid.PcdHypFvSize
>> +
>
> As I mentioned in my review of v1: I think it is fine to start with an
> empty stub for a driver, but please don't limit that to the C file.
>
> None of these library classes, guids, protocols or PCDs are being used
> in this patch. References to them should be added along with the code
> that actually uses those references.

Yes, I missed this part. This will be fixed in the next version.

Thanks,
Thomas.

>
>> +[Depex]
>> +  TRUE
>> --
>> 2.7.4
>>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel

[PATCH edk2-platforms v4 4/9] Platform/ARM/Sgi: add support for virtio block device

[Thomas Abraham]

From: Daniil Egranov <daniil.egranov@arm.com>

Add the registration of the virtio block device.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
---
 .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   | 18 ++++-
 .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf |  1 +
 .../ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c | 76 ++++++++++++++++++++++
 3 files changed, 94 insertions(+), 1 deletion(-)
 create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c

diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
index eb26fde..fb1e390 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
@@ -15,11 +15,27 @@
 #include <Library/DebugLib.h>
 
 EFI_STATUS
+InitVirtioBlockIo (
+  IN EFI_HANDLE         ImageHandle
+);
+
+EFI_STATUS
 EFIAPI
 ArmSgiPkgEntryPoint (
   IN EFI_HANDLE         ImageHandle,
   IN EFI_SYSTEM_TABLE   *SystemTable
   )
 {
-  return EFI_SUCCESS;
+  EFI_STATUS              Status;
+
+  // Install Virtio Block IO.
+  if (FeaturePcdGet (PcdVirtioSupported) == TRUE) {
+    Status = InitVirtioBlockIo (ImageHandle);
+    if (EFI_ERROR (Status)) {
+      DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install Virtio Block IO\n"));
+      return Status;
+    }
+  }
+
+  return Status;
 }
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
index dbe04c5..995f80d 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
@@ -20,6 +20,7 @@
 
 [Sources.common]
   PlatformDxe.c
+  VirtioBlockIo.c
 
 [Packages]
   ArmPkg/ArmPkg.dec
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c
new file mode 100644
index 0000000..58dfd22
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c
@@ -0,0 +1,76 @@
+/** @file
+
+  Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
+
+  This program and the accompanying materials are licensed and made available
+  under the terms and conditions of the BSD License which accompanies this
+  distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/VirtioMmioDeviceLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <SgiPlatform.h>
+
+#pragma pack (1)
+typedef struct {
+  VENDOR_DEVICE_PATH                  Vendor;
+  EFI_DEVICE_PATH_PROTOCOL            End;
+} VIRTIO_BLK_DEVICE_PATH;
+#pragma pack ()
+
+STATIC VIRTIO_BLK_DEVICE_PATH mVirtioBlockDevicePath =
+{
+  {
+    {
+      HARDWARE_DEVICE_PATH,
+      HW_VENDOR_DP,
+      {
+        (UINT8)( sizeof (VENDOR_DEVICE_PATH) ),
+        (UINT8)( (sizeof (VENDOR_DEVICE_PATH) ) >> 8)
+      }
+    },
+    EFI_CALLER_ID_GUID,
+  },
+  {
+    END_DEVICE_PATH_TYPE,
+    END_ENTIRE_DEVICE_PATH_SUBTYPE,
+    {
+      sizeof (EFI_DEVICE_PATH_PROTOCOL),
+      0
+    }
+  }
+};
+
+/**
+ * Entrypoint for 'VirtioBlockIo' driver
+ */
+EFI_STATUS
+InitVirtioBlockIo (
+   IN EFI_HANDLE         ImageHandle
+  )
+{
+  EFI_STATUS Status = 0;
+
+  Status = gBS->InstallProtocolInterface (&ImageHandle,
+               &gEfiDevicePathProtocolGuid, EFI_NATIVE_INTERFACE,
+               &mVirtioBlockDevicePath);
+
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  // Declare the Virtio BlockIo device
+  Status = VirtioMmioInstallDevice (SGI_EXP_SYSPH_VIRTIO_BLOCK_BASE, ImageHandle);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install Virtio block device\n"));
+  }
+
+  return Status;
+}
-- 
2.7.4

Re: [PATCH edk2-platforms v4 4/9] Platform/ARM/Sgi: add support for virtio block device

[Ard Biesheuvel]

On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
> From: Daniil Egranov <daniil.egranov@arm.com>
>
> Add the registration of the virtio block device.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
> ---
>  .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   | 18 ++++-
>  .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf |  1 +
>  .../ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c | 76 ++++++++++++++++++++++
>  3 files changed, 94 insertions(+), 1 deletion(-)
>  create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c
>
> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> index eb26fde..fb1e390 100644
> --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> @@ -15,11 +15,27 @@
>  #include <Library/DebugLib.h>
>
>  EFI_STATUS
> +InitVirtioBlockIo (
> +  IN EFI_HANDLE         ImageHandle
> +);
> +
> +EFI_STATUS
>  EFIAPI
>  ArmSgiPkgEntryPoint (
>    IN EFI_HANDLE         ImageHandle,
>    IN EFI_SYSTEM_TABLE   *SystemTable
>    )
>  {
> -  return EFI_SUCCESS;
> +  EFI_STATUS              Status;
> +
> +  // Install Virtio Block IO.
> +  if (FeaturePcdGet (PcdVirtioSupported) == TRUE) {

No need to compare booleans with TRUE or FALSE.

> +    Status = InitVirtioBlockIo (ImageHandle);
> +    if (EFI_ERROR (Status)) {
> +      DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install Virtio Block IO\n"));
> +      return Status;
> +    }
> +  }
> +
> +  return Status;
>  }
> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> index dbe04c5..995f80d 100644
> --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> @@ -20,6 +20,7 @@
>
>  [Sources.common]
>    PlatformDxe.c
> +  VirtioBlockIo.c
>
>  [Packages]
>    ArmPkg/ArmPkg.dec
> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c
> new file mode 100644
> index 0000000..58dfd22
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c
> @@ -0,0 +1,76 @@
> +/** @file
> +
> +  Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
> +
> +  This program and the accompanying materials are licensed and made available
> +  under the terms and conditions of the BSD License which accompanies this
> +  distribution.  The full text of the license may be found at
> +  http://opensource.org/licenses/bsd-license.php
> +
> +  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include <Library/VirtioMmioDeviceLib.h>
> +#include <Library/DevicePathLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <SgiPlatform.h>
> +
> +#pragma pack (1)
> +typedef struct {
> +  VENDOR_DEVICE_PATH                  Vendor;
> +  EFI_DEVICE_PATH_PROTOCOL            End;
> +} VIRTIO_BLK_DEVICE_PATH;
> +#pragma pack ()
> +
> +STATIC VIRTIO_BLK_DEVICE_PATH mVirtioBlockDevicePath =
> +{
> +  {
> +    {
> +      HARDWARE_DEVICE_PATH,
> +      HW_VENDOR_DP,
> +      {
> +        (UINT8)( sizeof (VENDOR_DEVICE_PATH) ),
> +        (UINT8)( (sizeof (VENDOR_DEVICE_PATH) ) >> 8)

No spaces after ( or before ) please

> +      }
> +    },
> +    EFI_CALLER_ID_GUID,
> +  },
> +  {
> +    END_DEVICE_PATH_TYPE,
> +    END_ENTIRE_DEVICE_PATH_SUBTYPE,
> +    {
> +      sizeof (EFI_DEVICE_PATH_PROTOCOL),
> +      0
> +    }
> +  }
> +};
> +
> +/**
> + * Entrypoint for 'VirtioBlockIo' driver
> + */
> +EFI_STATUS
> +InitVirtioBlockIo (
> +   IN EFI_HANDLE         ImageHandle
> +  )
> +{
> +  EFI_STATUS Status = 0;
> +
> +  Status = gBS->InstallProtocolInterface (&ImageHandle,
> +               &gEfiDevicePathProtocolGuid, EFI_NATIVE_INTERFACE,
> +               &mVirtioBlockDevicePath);
> +

Please use correct indentation.

> +  if (EFI_ERROR (Status)) {
> +    return Status;
> +  }
> +
> +  // Declare the Virtio BlockIo device
> +  Status = VirtioMmioInstallDevice (SGI_EXP_SYSPH_VIRTIO_BLOCK_BASE, ImageHandle);
> +  if (EFI_ERROR (Status)) {
> +    DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install Virtio block device\n"));
> +  }
> +

Please handle this error correctly. If the call to
VirtioMmioInstallDevice() fails, you will exit this function and hence
the DXE entry point with an error, which will result in the driver to
be unloaded. However, you just installed gEfiDevicePathProtocolGuid
with references to the driver's code, and attempts to invoke those
will result in a crash after this.

> +  return Status;
> +}
> --
> 2.7.4
>

Re: [PATCH edk2-platforms v4 4/9] Platform/ARM/Sgi: add support for virtio block device

[Thomas Abraham]

On Mon, May 21, 2018 at 2:28 PM, Ard Biesheuvel
<ard.biesheuvel@linaro.org> wrote:
> On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
>> From: Daniil Egranov <daniil.egranov@arm.com>
>>
>> Add the registration of the virtio block device.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
>> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
>> ---
>>  .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   | 18 ++++-
>>  .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf |  1 +
>>  .../ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c | 76 ++++++++++++++++++++++
>>  3 files changed, 94 insertions(+), 1 deletion(-)
>>  create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c
>>
>> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>> index eb26fde..fb1e390 100644
>> --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>> @@ -15,11 +15,27 @@
>>  #include <Library/DebugLib.h>
>>
>>  EFI_STATUS
>> +InitVirtioBlockIo (
>> +  IN EFI_HANDLE         ImageHandle
>> +);
>> +
>> +EFI_STATUS
>>  EFIAPI
>>  ArmSgiPkgEntryPoint (
>>    IN EFI_HANDLE         ImageHandle,
>>    IN EFI_SYSTEM_TABLE   *SystemTable
>>    )
>>  {
>> -  return EFI_SUCCESS;
>> +  EFI_STATUS              Status;
>> +
>> +  // Install Virtio Block IO.
>> +  if (FeaturePcdGet (PcdVirtioSupported) == TRUE) {
>
> No need to compare booleans with TRUE or FALSE.
>
>> +    Status = InitVirtioBlockIo (ImageHandle);
>> +    if (EFI_ERROR (Status)) {
>> +      DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install Virtio Block IO\n"));
>> +      return Status;
>> +    }
>> +  }
>> +
>> +  return Status;
>>  }
>> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
>> index dbe04c5..995f80d 100644
>> --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
>> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
>> @@ -20,6 +20,7 @@
>>
>>  [Sources.common]
>>    PlatformDxe.c
>> +  VirtioBlockIo.c
>>
>>  [Packages]
>>    ArmPkg/ArmPkg.dec
>> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c
>> new file mode 100644
>> index 0000000..58dfd22
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c
>> @@ -0,0 +1,76 @@
>> +/** @file
>> +
>> +  Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
>> +
>> +  This program and the accompanying materials are licensed and made available
>> +  under the terms and conditions of the BSD License which accompanies this
>> +  distribution.  The full text of the license may be found at
>> +  http://opensource.org/licenses/bsd-license.php
>> +
>> +  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#include <Library/VirtioMmioDeviceLib.h>
>> +#include <Library/DevicePathLib.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/UefiBootServicesTableLib.h>
>> +#include <SgiPlatform.h>
>> +
>> +#pragma pack (1)
>> +typedef struct {
>> +  VENDOR_DEVICE_PATH                  Vendor;
>> +  EFI_DEVICE_PATH_PROTOCOL            End;
>> +} VIRTIO_BLK_DEVICE_PATH;
>> +#pragma pack ()
>> +
>> +STATIC VIRTIO_BLK_DEVICE_PATH mVirtioBlockDevicePath =
>> +{
>> +  {
>> +    {
>> +      HARDWARE_DEVICE_PATH,
>> +      HW_VENDOR_DP,
>> +      {
>> +        (UINT8)( sizeof (VENDOR_DEVICE_PATH) ),
>> +        (UINT8)( (sizeof (VENDOR_DEVICE_PATH) ) >> 8)
>
> No spaces after ( or before ) please
>
>> +      }
>> +    },
>> +    EFI_CALLER_ID_GUID,
>> +  },
>> +  {
>> +    END_DEVICE_PATH_TYPE,
>> +    END_ENTIRE_DEVICE_PATH_SUBTYPE,
>> +    {
>> +      sizeof (EFI_DEVICE_PATH_PROTOCOL),
>> +      0
>> +    }
>> +  }
>> +};
>> +
>> +/**
>> + * Entrypoint for 'VirtioBlockIo' driver
>> + */
>> +EFI_STATUS
>> +InitVirtioBlockIo (
>> +   IN EFI_HANDLE         ImageHandle
>> +  )
>> +{
>> +  EFI_STATUS Status = 0;
>> +
>> +  Status = gBS->InstallProtocolInterface (&ImageHandle,
>> +               &gEfiDevicePathProtocolGuid, EFI_NATIVE_INTERFACE,
>> +               &mVirtioBlockDevicePath);
>> +
>
> Please use correct indentation.
>
>> +  if (EFI_ERROR (Status)) {
>> +    return Status;
>> +  }
>> +
>> +  // Declare the Virtio BlockIo device
>> +  Status = VirtioMmioInstallDevice (SGI_EXP_SYSPH_VIRTIO_BLOCK_BASE, ImageHandle);
>> +  if (EFI_ERROR (Status)) {
>> +    DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install Virtio block device\n"));
>> +  }
>> +
>
> Please handle this error correctly. If the call to
> VirtioMmioInstallDevice() fails, you will exit this function and hence
> the DXE entry point with an error, which will result in the driver to
> be unloaded. However, you just installed gEfiDevicePathProtocolGuid
> with references to the driver's code, and attempts to invoke those
> will result in a crash after this.

Okay, thanks for pointing this out. This will be fixed in the next version.

Thanks,
Thomas.

>
>> +  return Status;
>> +}
>> --
>> 2.7.4
>>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel

[PATCH edk2-platforms v4 5/9] Platform/ARM/Sgi: add the initial set of acpi tables

[Thomas Abraham]

From: Daniil Egranov <daniil.egranov@arm.com>

Add the initial version of Acpi tables for the SGI-575 platform which
is required to boot the linux kernel up to a busybox prompt.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
---
 .../ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf    |  53 +++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc    |  90 +++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl     |  99 ++++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc    |  87 +++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc    | 123 +++++++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc    | 173 +++++++++++++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc    |  77 +++++++++
 .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   |   7 +
 Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h        |  41 +++++
 9 files changed, 750 insertions(+)
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
 create mode 100644 Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h

diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
new file mode 100644
index 0000000..2c9bd98
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
@@ -0,0 +1,53 @@
+## @file
+#  ACPI table data and ASL sources required to boot the platform.
+#
+#  Copyright (c) 2018, ARM Ltd. All rights reserved.
+#
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001001A
+  BASE_NAME                      = Sgi575AcpiTables
+  FILE_GUID                      = c712719a-0aaf-438c-9cdd-35ab4d60207d  # gSgi575AcpiTablesiFileGuid
+  MODULE_TYPE                    = USER_DEFINED
+  VERSION_STRING                 = 1.0
+
+[Sources]
+  Dbg2.aslc
+  Dsdt.asl
+  Fadt.aslc
+  Gtdt.aslc
+  Madt.aslc
+  Spcr.aslc
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  Platform/ARM/SgiPkg/SgiPlatform.dec
+  Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
+
+[FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdCoreCount
+  gArmPlatformTokenSpaceGuid.PcdClusterCount
+  gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+  gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+  gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+  gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+  gArmTokenSpaceGuid.PcdGicDistributorBase
+  gArmTokenSpaceGuid.PcdGicRedistributorsBase
+
+  gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
+  gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
+  gArmPlatformTokenSpaceGuid.PL011UartInterrupt
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
new file mode 100644
index 0000000..ed671f3
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
@@ -0,0 +1,90 @@
+/** @file
+*  Debug Port Table 2 (DBG2)
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution. The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <IndustryStandard/Acpi61.h>
+#include <IndustryStandard/DebugPort2Table.h>
+
+#define SGI_DBG2_NUM_DEBUG_PORTS           1
+#define SGI_DBG2_NUM_GAS                   1
+#define SGI_DBG2_NS_STR_LENGTH             8
+#define SGI_PL011_REGISTER_SPACE           0x1000
+
+#define NAME_STR_UART1     {'C', 'O', 'M', '1', '\0', '\0', '\0', '\0'}
+
+#pragma pack(1)
+
+typedef struct {
+  EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
+  EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE        BaseAddressRegister;
+  UINT32                                        AddressSize;
+  UINT8                                         NameSpaceString[SGI_DBG2_NS_STR_LENGTH];
+} DBG2_DEBUG_DEVICE_INFORMATION;
+
+typedef struct {
+  EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE       Description;
+  DBG2_DEBUG_DEVICE_INFORMATION                 Dbg2DeviceInfo[SGI_DBG2_NUM_DEBUG_PORTS];
+} DBG2_TABLE;
+
+#pragma pack()
+
+#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) {                                  \
+  {                                                                                                                 \
+    EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,         /* UINT8     Revision */                        \
+    sizeof (DBG2_DEBUG_DEVICE_INFORMATION),                         /* UINT16    Length */                          \
+    NumReg,                                                         /* UINT8     NumberofGenericAddressRegisters */ \
+    SGI_DBG2_NS_STR_LENGTH,                                         /* UINT16    NameSpaceStringLength */           \
+    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),     /* UINT16    NameSpaceStringOffset */           \
+    0,                                                              /* UINT16    OemDataLength */                   \
+    0,                                                              /* UINT16    OemDataOffset */                   \
+    EFI_ACPI_DBG2_PORT_TYPE_SERIAL,                                 /* UINT16    Port Type */                       \
+    SubType,                                                        /* UINT16    Port Subtype */                    \
+    { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE },             /* UINT8     Reserved[2] */                     \
+    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UINT16    BaseAddressRegister Offset */      \
+    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)          /* UINT16    AddressSize Offset */              \
+  },                                                                                                                \
+  ARM_GAS32 (UartBase),                            /* EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
+  UartAddrLen,                                     /* UINT32  AddressSize */                                        \
+  UartNameStr                                      /* UINT8   NameSpaceString[MAX_DBG2_NAME_LEN] */                 \
+}
+
+STATIC DBG2_TABLE Dbg2 = {
+  {
+    ARM_ACPI_HEADER (
+      EFI_ACPI_6_1_DEBUG_PORT_2_TABLE_SIGNATURE,
+      DBG2_TABLE,
+      EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
+    ),
+    OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
+    SGI_DBG2_NUM_DEBUG_PORTS
+  },
+  {
+    // Kernel Debug Port
+    DBG2_DEBUG_PORT_DDI (
+      SGI_DBG2_NUM_GAS,
+      EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART,
+      FixedPcdGet64 (PcdSerialDbgRegisterBase),
+      SGI_PL011_REGISTER_SPACE,
+      NAME_STR_UART1
+    ),
+  }
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Dbg2;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
new file mode 100644
index 0000000..ceeac5f
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
@@ -0,0 +1,99 @@
+/** @file
+*  Differentiated System Description Table Fields (DSDT)
+*
+*  Copyright (c) 2018, ARM Ltd. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+
+DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-SGI575", EFI_ACPI_ARM_OEM_REVISION) {
+  Scope(_SB) {
+
+    Device(CP00) { // A75-0: Cluster 0, Cpu 0
+      Name(_HID, "ACPI0007")
+      Name(_UID, 0)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP01) { // A75-0: Cluster 0, Cpu 1
+      Name(_HID, "ACPI0007")
+      Name(_UID, 1)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP02) { // A75-0: Cluster 0, Cpu 2
+      Name(_HID, "ACPI0007")
+      Name(_UID, 2)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP03) { // A75-0: Cluster 0, Cpu 3
+      Name(_HID, "ACPI0007")
+      Name(_UID, 3)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP04) { // A75-0: Cluster 1, Cpu 0
+      Name(_HID, "ACPI0007")
+      Name(_UID, 4)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP05) { // A75-0: Cluster 1, Cpu 1
+      Name(_HID, "ACPI0007")
+      Name(_UID, 5)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP06) { // A75-0: Cluster 1, Cpu 2
+      Name(_HID, "ACPI0007")
+      Name(_UID, 6)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP07) { // A75-0: Cluster 1, Cpu 3
+      Name(_HID, "ACPI0007")
+      Name(_UID, 7)
+      Name(_STA, 0xF)
+    }
+
+    // UART PL011
+    Device(COM0) {
+      Name(_HID, "ARMH0011")
+      Name(_CID, "ARMH0011")
+      Name(_UID, Zero)
+      Name(_STA, 0xF)
+      Name(_CRS, ResourceTemplate() {
+        Memory32Fixed(ReadWrite, 0x7FF80000, 0x1000)
+        Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }
+      })
+    }
+
+    // SMSC 91C111
+    Device(ETH0) {
+      Name(_HID, "LNRO0003")
+      Name(_UID, Zero)
+      Name(_STA, 0xF)
+      Name(_CRS, ResourceTemplate() {
+            Memory32Fixed(ReadWrite, 0x18000000, 0x1000)
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }
+      })
+      Name(_DSD, Package() {
+                 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+                     Package() {
+                     Package(2) {"reg-io-width", 4 },
+                    }
+      })
+    }
+  } // Scope(_SB)
+}
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
new file mode 100644
index 0000000..ed96298
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
@@ -0,0 +1,87 @@
+/** @file
+*  Fixed ACPI Description Table (FADT)
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <IndustryStandard/Acpi.h>
+
+STATIC EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
+  ARM_ACPI_HEADER (
+    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE,
+    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
+  ),
+  0,                                                                        // UINT32     FirmwareCtrl
+  0,                                                                        // UINT32     Dsdt
+  EFI_ACPI_RESERVED_BYTE,                                                   // UINT8      Reserved0
+  EFI_ACPI_6_1_PM_PROFILE_ENTERPRISE_SERVER,                                // UINT8      PreferredPmProfile
+  0,                                                                        // UINT16     SciInt
+  0,                                                                        // UINT32     SmiCmd
+  0,                                                                        // UINT8      AcpiEnable
+  0,                                                                        // UINT8      AcpiDisable
+  0,                                                                        // UINT8      S4BiosReq
+  0,                                                                        // UINT8      PstateCnt
+  0,                                                                        // UINT32     Pm1aEvtBlk
+  0,                                                                        // UINT32     Pm1bEvtBlk
+  0,                                                                        // UINT32     Pm1aCntBlk
+  0,                                                                        // UINT32     Pm1bCntBlk
+  0,                                                                        // UINT32     Pm2CntBlk
+  0,                                                                        // UINT32     PmTmrBlk
+  0,                                                                        // UINT32     Gpe0Blk
+  0,                                                                        // UINT32     Gpe1Blk
+  0,                                                                        // UINT8      Pm1EvtLen
+  0,                                                                        // UINT8      Pm1CntLen
+  0,                                                                        // UINT8      Pm2CntLen
+  0,                                                                        // UINT8      PmTmrLen
+  0,                                                                        // UINT8      Gpe0BlkLen
+  0,                                                                        // UINT8      Gpe1BlkLen
+  0,                                                                        // UINT8      Gpe1Base
+  0,                                                                        // UINT8      CstCnt
+  0,                                                                        // UINT16     PLvl2Lat
+  0,                                                                        // UINT16     PLvl3Lat
+  0,                                                                        // UINT16     FlushSize
+  0,                                                                        // UINT16     FlushStride
+  0,                                                                        // UINT8      DutyOffset
+  0,                                                                        // UINT8      DutyWidth
+  0,                                                                        // UINT8      DayAlrm
+  0,                                                                        // UINT8      MonAlrm
+  0,                                                                        // UINT8      Century
+  0,                                                                        // UINT16     IaPcBootArch
+  0,                                                                        // UINT8      Reserved1
+  EFI_ACPI_6_1_HW_REDUCED_ACPI | EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE,    // UINT32     Flags
+  NULL_GAS,                                                                 // GAS        ResetReg
+  0,                                                                        // UINT8      ResetValue
+  EFI_ACPI_6_1_ARM_PSCI_COMPLIANT,                                          // UINT16     ArmBootArchFlags
+  EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION,                 // UINT8      MinorRevision
+  0,                                                                        // UINT64     XFirmwareCtrl
+  0,                                                                        // UINT64     XDsdt
+  NULL_GAS,                                                                 // GAS        XPm1aEvtBlk
+  NULL_GAS,                                                                 // GAS        XPm1bEvtBlk
+  NULL_GAS,                                                                 // GAS        XPm1aCntBlk
+  NULL_GAS,                                                                 // GAS        XPm1bCntBlk
+  NULL_GAS,                                                                 // GAS        XPm2CntBlk
+  NULL_GAS,                                                                 // GAS        XPmTmrBlk
+  NULL_GAS,                                                                 // GAS        XGpe0Blk
+  NULL_GAS,                                                                 // GAS        XGpe1Blk
+  NULL_GAS,                                                                 // GAS        SleepControlReg
+  NULL_GAS,                                                                 // GAS        SleepStatusReg
+  0                                                                         // UINT64     HypervisorVendorIdentity;
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Fadt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
new file mode 100644
index 0000000..862a960
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
@@ -0,0 +1,123 @@
+/** @file
+*  Generic Timer Description Table (GTDT)
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+#include <IndustryStandard/Acpi61.h>
+
+#define SGI_PLATFORM_WATCHDOG_COUNT       2
+#define SGI_TIMER_FRAMES_COUNT            2
+
+#define SYSTEM_TIMER_BASE_ADDRESS         0xFFFFFFFFFFFFFFFF
+#define GTDT_GLOBAL_FLAGS                 0
+#define GTDT_GTIMER_FLAGS                 EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
+
+#define SGI_GT_BLOCK_CTL_BASE             0x2A810000
+#define SGI_GT_BLOCK_FRAME1_CTL_BASE      0x2A820000
+#define SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE  0xFFFFFFFFFFFFFFFF
+#define SGI_GT_BLOCK_FRAME1_GSIV          0x5B
+
+#define SGI_GT_BLOCK_FRAME0_CTL_BASE      0x2A830000
+#define SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE  0xFFFFFFFFFFFFFFFF
+#define SGI_GT_BLOCK_FRAME0_GSIV          0x5C
+
+#define SGI_GTX_TIMER_FLAGS               0
+#define GTX_TIMER_SECURE                  EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER
+#define GTX_TIMER_NON_SECURE              0
+#define GTX_TIMER_SAVE_CONTEXT            EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY
+#define SGI_GTX_COMMON_FLAGS_S            (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_SECURE)
+#define SGI_GTX_COMMON_FLAGS_NS           (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_NON_SECURE)
+
+#pragma pack (1)
+
+typedef struct {
+  EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE    Gtdt;
+  EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE            GtBlock;
+  EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE      Frames[SGI_TIMER_FRAMES_COUNT];
+} EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES;
+
+#pragma pack ()
+
+STATIC EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
+  {
+    ARM_ACPI_HEADER (
+      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
+      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES,
+      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
+    ),
+    SYSTEM_TIMER_BASE_ADDRESS,                    // UINT64  PhysicalAddress
+    0,                                            // UINT32  Reserved
+    FixedPcdGet32 (PcdArmArchTimerSecIntrNum),    // UINT32  SecurePL1TimerGSIV
+    GTDT_GTIMER_FLAGS,                            // UINT32  SecurePL1TimerFlags
+    FixedPcdGet32 (PcdArmArchTimerIntrNum),       // UINT32  NonSecurePL1TimerGSIV
+    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL1TimerFlags
+    FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),   // UINT32  VirtualTimerGSIV
+    GTDT_GTIMER_FLAGS,                            // UINT32  VirtualTimerFlags
+    FixedPcdGet32 (PcdArmArchTimerHypIntrNum),    // UINT32  NonSecurePL2TimerGSIV
+    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL2TimerFlags
+    0xFFFFFFFFFFFFFFFF,                           // UINT64  CntReadBasePhysicalAddress
+    SGI_PLATFORM_WATCHDOG_COUNT,                  // UINT32  PlatformTimerCount
+    sizeof (EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 PlatfromTimerOffset
+  },
+  {
+    EFI_ACPI_6_1_GTDT_GT_BLOCK,                           // UINT8 Type
+    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE) +        // UINT16 Length
+    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE) *
+    SGI_TIMER_FRAMES_COUNT,
+    EFI_ACPI_RESERVED_BYTE,                               // UINT8 Reserved
+    SGI_GT_BLOCK_CTL_BASE,                                // UINT64 CntCtlBase
+    SGI_TIMER_FRAMES_COUNT,                               // UINT32 GTBlockTimerCount
+    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE)          // UINT32 GTBlockTimerOffset
+  },
+  {
+    {
+      0,                                     // UINT8 GTFrameNumber
+      {
+        EFI_ACPI_RESERVED_BYTE,
+        EFI_ACPI_RESERVED_BYTE,
+        EFI_ACPI_RESERVED_BYTE
+      },                                     // UINT8 Reserved[3]
+      SGI_GT_BLOCK_FRAME0_CTL_BASE,          // UINT64 CntBaseX
+      SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE,      // UINT64 CntEL0BaseX
+      SGI_GT_BLOCK_FRAME0_GSIV,              // UINT32 GTxPhysicalTimerGSIV
+      SGI_GTX_TIMER_FLAGS,                   // UINT32 GTxPhysicalTimerFlags
+      0,                                     // UINT32 GTxVirtualTimerGSIV
+      0,                                     // UINT32 GTxVirtualTimerFlags
+      SGI_GTX_COMMON_FLAGS_NS                // UINT32 GTxCommonFlags
+    },
+    {
+      1,                                     // UINT8 GTFrameNumber
+      {
+        EFI_ACPI_RESERVED_BYTE,
+        EFI_ACPI_RESERVED_BYTE,
+        EFI_ACPI_RESERVED_BYTE
+      },                                     // UINT8 Reserved[3]
+      SGI_GT_BLOCK_FRAME1_CTL_BASE,          // UINT64 CntBaseX
+      SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE,      // UINT64 CntEL0BaseX
+      SGI_GT_BLOCK_FRAME1_GSIV,              // UINT32 GTxPhysicalTimerGSIV
+      SGI_GTX_TIMER_FLAGS,                   // UINT32 GTxPhysicalTimerFlags
+      0,                                     // UINT32 GTxVirtualTimerGSIV
+      0,                                     // UINT32 GTxVirtualTimerFlags
+      SGI_GTX_COMMON_FLAGS_S                 // UINT32 GTxCommonFlags
+    }
+  },
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Gtdt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
new file mode 100644
index 0000000..4f98120
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
@@ -0,0 +1,173 @@
+/** @file
+*  Multiple APIC Description Table (MADT)
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+#include <Library/PcdLib.h>
+#include <IndustryStandard/Acpi.h>
+
+#define CORES   (FixedPcdGet32 (PcdClusterCount) * \
+                 FixedPcdGet32 (PcdCoreCount))
+
+// EFI_ACPI_6_1_GIC_STRUCTURE
+#define EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,      \
+  PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency)           \
+  {                                                                            \
+    EFI_ACPI_6_1_GIC,                     /* Type */                           \
+    sizeof (EFI_ACPI_6_1_GIC_STRUCTURE),  /* Length */                         \
+    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
+    GicId,                                /* CPUInterfaceNumber */             \
+    AcpiCpuUid,                           /* AcpiProcessorUid */               \
+    Flags,                                /* Flags */                          \
+    0,                                    /* ParkingProtocolVersion */         \
+    PmuIrq,                               /* PerformanceInterruptGsiv */       \
+    0,                                    /* ParkedAddress */                  \
+    GicBase,                              /* PhysicalBaseAddress */            \
+    GicVBase,                             /* GICV */                           \
+    GicHBase,                             /* GICH */                           \
+    GsivId,                               /* VGICMaintenanceInterrupt */       \
+    GicRBase,                             /* GICRBaseAddress */                \
+    Mpidr,                                /* MPIDR */                          \
+    Efficiency,                           /* ProcessorPowerEfficiencyClass */  \
+    {                                                                          \
+      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[0] */                   \
+      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[1] */                   \
+      EFI_ACPI_RESERVED_BYTE              /* Reserved2[2] */                   \
+    }                                                                          \
+  }
+
+// EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE
+#define EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase,            \
+  GicDistVector, GicVersion)                                                   \
+  {                                                                            \
+    EFI_ACPI_6_1_GICD,                    /* Type */                           \
+    sizeof (EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE),                           \
+    EFI_ACPI_RESERVED_WORD,               /* Reserved1 */                      \
+    GicDistHwId,                          /* GicId */                          \
+    GicDistBase,                          /* PhysicalBaseAddress */            \
+    GicDistVector,                        /* SystemVectorBase */               \
+    GicVersion,                           /* GicVersion */                     \
+    {                                                                          \
+      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[0] */                   \
+      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[1] */                   \
+      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[2] */                   \
+    }                                                                          \
+  }
+
+// EFI_ACPI_6_1_GICR_STRUCTURE
+#define EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength)  \
+  {                                                                            \
+    EFI_ACPI_6_1_GICR,                    /* Type */                           \
+    sizeof (EFI_ACPI_6_1_GICR_STRUCTURE), /* Length */                         \
+    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
+    RedisRegionAddr,                      /* DiscoveryRangeBaseAddress */      \
+    RedisDiscLength                       /* DiscoveryRangeLength */           \
+  }
+
+// EFI_ACPI_6_1_GIC_ITS_STRUCTURE
+#define EFI_ACPI_6_1_GIC_ITS_INIT(GicItsId, GicItsBase)                        \
+  {                                                                            \
+    EFI_ACPI_6_1_GIC_ITS,                 /* Type */                           \
+    sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE),                                   \
+    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
+    GicItsId,                             /* GicItsId */                       \
+    GicItsBase,                           /* PhysicalBaseAddress */            \
+    EFI_ACPI_RESERVED_DWORD,              /* DiscoveryRangeLength */           \
+  }
+
+//
+// Multiple APIC Description Table
+//
+#pragma pack (1)
+
+typedef struct {
+  EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
+  EFI_ACPI_6_1_GIC_STRUCTURE                            GicInterfaces[CORES];
+  EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;
+  EFI_ACPI_6_1_GICR_STRUCTURE                           GicRedistributor;
+  EFI_ACPI_6_1_GIC_ITS_STRUCTURE                        GicIts;
+} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+#pragma pack ()
+
+STATIC EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
+  {
+    ARM_ACPI_HEADER (
+      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE,
+      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
+    ),
+    // MADT specific fields
+    0, // LocalApicAddress
+    0, // Flags
+  },
+  {
+    // Format: EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
+    //                                          PmuIrq, GicBase, GicVBase,
+    //                                          GicHBase, GsivId, GicRBase,
+    //                                          Efficiency)
+    // Note: The GIC Structure of the primary CPU must be the first entry
+    // (see note in 5.2.12.14 GICC Structure of ACPI v6.1).
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-0
+      0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-1
+      0, 1, GET_MPID(0x0, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-2
+      0, 2, GET_MPID(0x0, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-3
+      0, 3, GET_MPID(0x0, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-4
+      0, 4, GET_MPID(0x100, 0x00), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-5
+      0, 5, GET_MPID(0x100, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-6
+      0, 6, GET_MPID(0x100, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-7
+      0, 7, GET_MPID(0x100, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+  },
+  // GIC Distributor Entry
+  EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
+                                    0, 3),
+  // GIC Redistributor
+  EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase),
+                                      SIZE_1MB),
+  // GIC ITS
+  EFI_ACPI_6_1_GIC_ITS_INIT(0, 0x30040000),
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Madt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
new file mode 100644
index 0000000..10eaf27
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
@@ -0,0 +1,77 @@
+/** @file
+*  Serial Port Console Redirection Table (SPCR)
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <IndustryStandard/Acpi61.h>
+#include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
+
+STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
+  ARM_ACPI_HEADER (
+    EFI_ACPI_6_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
+    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE,
+    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
+  ),
+  // UINT8                                   InterfaceType;
+  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART,
+  // UINT8                                   Reserved1[3];
+  {
+    EFI_ACPI_RESERVED_BYTE,
+    EFI_ACPI_RESERVED_BYTE,
+    EFI_ACPI_RESERVED_BYTE
+  },
+  // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE  BaseAddress;
+  ARM_GAS32 (0x7FF80000),
+  // UINT8                                   InterruptType;
+  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC,
+  // UINT8                                   Irq;
+  0,
+  // UINT32                                  GlobalSystemInterrupt;
+  FixedPcdGet32 (PL011UartInterrupt),
+  // UINT8                                   BaudRate;
+  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200,
+  // UINT8                                   Parity;
+  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY,
+  // UINT8                                   StopBits;
+  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1,
+  // UINT8                                   FlowControl;
+  0,
+  // UINT8                                   TerminalType;
+  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_ANSI,
+  // UINT8                                   Reserved2;
+  EFI_ACPI_RESERVED_BYTE,
+  // UINT16                                  PciDeviceId;
+  0xFFFF,
+  // UINT16                                  PciVendorId;
+  0xFFFF,
+  // UINT8                                   PciBusNumber;
+  0x00,
+  // UINT8                                   PciDeviceNumber;
+  0x00,
+  // UINT8                                   PciFunctionNumber;
+  0x00,
+  // UINT32                                  PciFlags;
+  0x00000000,
+  // UINT8                                   PciSegment;
+  0x00,
+  // UINT32                                  Reserved3;
+  EFI_ACPI_RESERVED_DWORD
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Spcr;
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
index fb1e390..4c956f4 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
@@ -12,6 +12,7 @@
 *
 **/
 
+#include <Library/AcpiLib.h>
 #include <Library/DebugLib.h>
 
 EFI_STATUS
@@ -28,6 +29,12 @@ ArmSgiPkgEntryPoint (
 {
   EFI_STATUS              Status;
 
+  Status = LocateAndInstallAcpiFromFv (&gSgi575AcpiTablesiFileGuid);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install ACPI tables\n"));
+    return Status;
+  }
+
   // Install Virtio Block IO.
   if (FeaturePcdGet (PcdVirtioSupported) == TRUE) {
     Status = InitVirtioBlockIo (ImageHandle);
diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
new file mode 100644
index 0000000..870ffe9
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
@@ -0,0 +1,41 @@
+/** @file
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution. The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef __SGI_ACPI_HEADER__
+#define __SGI_ACPI_HEADER__
+
+//
+// ACPI table information used to initialize tables.
+//
+#define EFI_ACPI_ARM_OEM_ID           'A','R','M','L','T','D'   // OEMID 6 bytes long
+#define EFI_ACPI_ARM_OEM_TABLE_ID     SIGNATURE_64('E','N','T','P','L','A','T','F') // OEM table id 8 bytes long
+#define EFI_ACPI_ARM_OEM_REVISION     0x20140727
+#define EFI_ACPI_ARM_CREATOR_ID       SIGNATURE_32('A','R','M',' ')
+#define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099
+
+// A macro to initialise the common header part of EFI ACPI tables as defined by
+// EFI_ACPI_DESCRIPTION_HEADER structure.
+#define ARM_ACPI_HEADER(Signature, Type, Revision) {             \
+    Signature,                      /* UINT32  Signature */       \
+    sizeof (Type),                  /* UINT32  Length */          \
+    Revision,                       /* UINT8   Revision */        \
+    0,                              /* UINT8   Checksum */        \
+    { EFI_ACPI_ARM_OEM_ID },        /* UINT8   OemId[6] */        \
+    EFI_ACPI_ARM_OEM_TABLE_ID,      /* UINT64  OemTableId */      \
+    EFI_ACPI_ARM_OEM_REVISION,      /* UINT32  OemRevision */     \
+    EFI_ACPI_ARM_CREATOR_ID,        /* UINT32  CreatorId */       \
+    EFI_ACPI_ARM_CREATOR_REVISION   /* UINT32  CreatorRevision */ \
+  }
+
+#endif /* __SGI_ACPI_HEADER__ */
-- 
2.7.4

Re: [PATCH edk2-platforms v4 5/9] Platform/ARM/Sgi: add the initial set of acpi tables

[Alexei Fedorov]

Daniil, Thomas.


Why is SGI_PLATFORM_WATCHDOG_COUNT defined as 2 in Gtdt.aslc :


#define SGI_PLATFORM_WATCHDOG_COUNT       2


and the same value is used in PlatformTimerCount field:


SGI_PLATFORM_WATCHDOG_COUNT,                  // UINT32  PlatformTimerCount


although the table doesn't contain any SBSA Generic watchdog entries but only GT blocks?


Regards.

Alexei

________________________________
From: edk2-devel <edk2-devel-bounces@lists.01.org> on behalf of Thomas Abraham <thomas.abraham@arm.com>
Sent: 21 May 2018 09:25:48
To: edk2-devel@lists.01.org
Cc: leif.lindholm@linaro.org; ard.biesheuvel@linaro.org
Subject: [edk2] [PATCH edk2-platforms v4 5/9] Platform/ARM/Sgi: add the initial set of acpi tables

From: Daniil Egranov <daniil.egranov@arm.com>

Add the initial version of Acpi tables for the SGI-575 platform which
is required to boot the linux kernel up to a busybox prompt.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
---
 .../ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf    |  53 +++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc    |  90 +++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl     |  99 ++++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc    |  87 +++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc    | 123 +++++++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc    | 173 +++++++++++++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc    |  77 +++++++++
 .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   |   7 +
 Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h        |  41 +++++
 9 files changed, 750 insertions(+)
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
 create mode 100644 Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h

diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
new file mode 100644
index 0000000..2c9bd98
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
@@ -0,0 +1,53 @@
+## @file
+#  ACPI table data and ASL sources required to boot the platform.
+#
+#  Copyright (c) 2018, ARM Ltd. All rights reserved.
+#
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001001A
+  BASE_NAME                      = Sgi575AcpiTables
+  FILE_GUID                      = c712719a-0aaf-438c-9cdd-35ab4d60207d  # gSgi575AcpiTablesiFileGuid
+  MODULE_TYPE                    = USER_DEFINED
+  VERSION_STRING                 = 1.0
+
+[Sources]
+  Dbg2.aslc
+  Dsdt.asl
+  Fadt.aslc
+  Gtdt.aslc
+  Madt.aslc
+  Spcr.aslc
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  Platform/ARM/SgiPkg/SgiPlatform.dec
+  Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
+
+[FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdCoreCount
+  gArmPlatformTokenSpaceGuid.PcdClusterCount
+  gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+  gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+  gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+  gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+  gArmTokenSpaceGuid.PcdGicDistributorBase
+  gArmTokenSpaceGuid.PcdGicRedistributorsBase
+
+  gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
+  gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
+  gArmPlatformTokenSpaceGuid.PL011UartInterrupt
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
new file mode 100644
index 0000000..ed671f3
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
@@ -0,0 +1,90 @@
+/** @file
+*  Debug Port Table 2 (DBG2)
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution. The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <IndustryStandard/Acpi61.h>
+#include <IndustryStandard/DebugPort2Table.h>
+
+#define SGI_DBG2_NUM_DEBUG_PORTS           1
+#define SGI_DBG2_NUM_GAS                   1
+#define SGI_DBG2_NS_STR_LENGTH             8
+#define SGI_PL011_REGISTER_SPACE           0x1000
+
+#define NAME_STR_UART1     {'C', 'O', 'M', '1', '\0', '\0', '\0', '\0'}
+
+#pragma pack(1)
+
+typedef struct {
+  EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
+  EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE        BaseAddressRegister;
+  UINT32                                        AddressSize;
+  UINT8                                         NameSpaceString[SGI_DBG2_NS_STR_LENGTH];
+} DBG2_DEBUG_DEVICE_INFORMATION;
+
+typedef struct {
+  EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE       Description;
+  DBG2_DEBUG_DEVICE_INFORMATION                 Dbg2DeviceInfo[SGI_DBG2_NUM_DEBUG_PORTS];
+} DBG2_TABLE;
+
+#pragma pack()
+
+#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) {                                  \
+  {                                                                                                                 \
+    EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,         /* UINT8     Revision */                        \
+    sizeof (DBG2_DEBUG_DEVICE_INFORMATION),                         /* UINT16    Length */                          \
+    NumReg,                                                         /* UINT8     NumberofGenericAddressRegisters */ \
+    SGI_DBG2_NS_STR_LENGTH,                                         /* UINT16    NameSpaceStringLength */           \
+    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),     /* UINT16    NameSpaceStringOffset */           \
+    0,                                                              /* UINT16    OemDataLength */                   \
+    0,                                                              /* UINT16    OemDataOffset */                   \
+    EFI_ACPI_DBG2_PORT_TYPE_SERIAL,                                 /* UINT16    Port Type */                       \
+    SubType,                                                        /* UINT16    Port Subtype */                    \
+    { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE },             /* UINT8     Reserved[2] */                     \
+    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UINT16    BaseAddressRegister Offset */      \
+    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)          /* UINT16    AddressSize Offset */              \
+  },                                                                                                                \
+  ARM_GAS32 (UartBase),                            /* EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
+  UartAddrLen,                                     /* UINT32  AddressSize */                                        \
+  UartNameStr                                      /* UINT8   NameSpaceString[MAX_DBG2_NAME_LEN] */                 \
+}
+
+STATIC DBG2_TABLE Dbg2 = {
+  {
+    ARM_ACPI_HEADER (
+      EFI_ACPI_6_1_DEBUG_PORT_2_TABLE_SIGNATURE,
+      DBG2_TABLE,
+      EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
+    ),
+    OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
+    SGI_DBG2_NUM_DEBUG_PORTS
+  },
+  {
+    // Kernel Debug Port
+    DBG2_DEBUG_PORT_DDI (
+      SGI_DBG2_NUM_GAS,
+      EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART,
+      FixedPcdGet64 (PcdSerialDbgRegisterBase),
+      SGI_PL011_REGISTER_SPACE,
+      NAME_STR_UART1
+    ),
+  }
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Dbg2;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
new file mode 100644
index 0000000..ceeac5f
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
@@ -0,0 +1,99 @@
+/** @file
+*  Differentiated System Description Table Fields (DSDT)
+*
+*  Copyright (c) 2018, ARM Ltd. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+
+DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-SGI575", EFI_ACPI_ARM_OEM_REVISION) {
+  Scope(_SB) {
+
+    Device(CP00) { // A75-0: Cluster 0, Cpu 0
+      Name(_HID, "ACPI0007")
+      Name(_UID, 0)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP01) { // A75-0: Cluster 0, Cpu 1
+      Name(_HID, "ACPI0007")
+      Name(_UID, 1)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP02) { // A75-0: Cluster 0, Cpu 2
+      Name(_HID, "ACPI0007")
+      Name(_UID, 2)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP03) { // A75-0: Cluster 0, Cpu 3
+      Name(_HID, "ACPI0007")
+      Name(_UID, 3)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP04) { // A75-0: Cluster 1, Cpu 0
+      Name(_HID, "ACPI0007")
+      Name(_UID, 4)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP05) { // A75-0: Cluster 1, Cpu 1
+      Name(_HID, "ACPI0007")
+      Name(_UID, 5)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP06) { // A75-0: Cluster 1, Cpu 2
+      Name(_HID, "ACPI0007")
+      Name(_UID, 6)
+      Name(_STA, 0xF)
+    }
+
+    Device(CP07) { // A75-0: Cluster 1, Cpu 3
+      Name(_HID, "ACPI0007")
+      Name(_UID, 7)
+      Name(_STA, 0xF)
+    }
+
+    // UART PL011
+    Device(COM0) {
+      Name(_HID, "ARMH0011")
+      Name(_CID, "ARMH0011")
+      Name(_UID, Zero)
+      Name(_STA, 0xF)
+      Name(_CRS, ResourceTemplate() {
+        Memory32Fixed(ReadWrite, 0x7FF80000, 0x1000)
+        Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }
+      })
+    }
+
+    // SMSC 91C111
+    Device(ETH0) {
+      Name(_HID, "LNRO0003")
+      Name(_UID, Zero)
+      Name(_STA, 0xF)
+      Name(_CRS, ResourceTemplate() {
+            Memory32Fixed(ReadWrite, 0x18000000, 0x1000)
+            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }
+      })
+      Name(_DSD, Package() {
+                 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+                     Package() {
+                     Package(2) {"reg-io-width", 4 },
+                    }
+      })
+    }
+  } // Scope(_SB)
+}
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
new file mode 100644
index 0000000..ed96298
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
@@ -0,0 +1,87 @@
+/** @file
+*  Fixed ACPI Description Table (FADT)
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <IndustryStandard/Acpi.h>
+
+STATIC EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
+  ARM_ACPI_HEADER (
+    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE,
+    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
+  ),
+  0,                                                                        // UINT32     FirmwareCtrl
+  0,                                                                        // UINT32     Dsdt
+  EFI_ACPI_RESERVED_BYTE,                                                   // UINT8      Reserved0
+  EFI_ACPI_6_1_PM_PROFILE_ENTERPRISE_SERVER,                                // UINT8      PreferredPmProfile
+  0,                                                                        // UINT16     SciInt
+  0,                                                                        // UINT32     SmiCmd
+  0,                                                                        // UINT8      AcpiEnable
+  0,                                                                        // UINT8      AcpiDisable
+  0,                                                                        // UINT8      S4BiosReq
+  0,                                                                        // UINT8      PstateCnt
+  0,                                                                        // UINT32     Pm1aEvtBlk
+  0,                                                                        // UINT32     Pm1bEvtBlk
+  0,                                                                        // UINT32     Pm1aCntBlk
+  0,                                                                        // UINT32     Pm1bCntBlk
+  0,                                                                        // UINT32     Pm2CntBlk
+  0,                                                                        // UINT32     PmTmrBlk
+  0,                                                                        // UINT32     Gpe0Blk
+  0,                                                                        // UINT32     Gpe1Blk
+  0,                                                                        // UINT8      Pm1EvtLen
+  0,                                                                        // UINT8      Pm1CntLen
+  0,                                                                        // UINT8      Pm2CntLen
+  0,                                                                        // UINT8      PmTmrLen
+  0,                                                                        // UINT8      Gpe0BlkLen
+  0,                                                                        // UINT8      Gpe1BlkLen
+  0,                                                                        // UINT8      Gpe1Base
+  0,                                                                        // UINT8      CstCnt
+  0,                                                                        // UINT16     PLvl2Lat
+  0,                                                                        // UINT16     PLvl3Lat
+  0,                                                                        // UINT16     FlushSize
+  0,                                                                        // UINT16     FlushStride
+  0,                                                                        // UINT8      DutyOffset
+  0,                                                                        // UINT8      DutyWidth
+  0,                                                                        // UINT8      DayAlrm
+  0,                                                                        // UINT8      MonAlrm
+  0,                                                                        // UINT8      Century
+  0,                                                                        // UINT16     IaPcBootArch
+  0,                                                                        // UINT8      Reserved1
+  EFI_ACPI_6_1_HW_REDUCED_ACPI | EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE,    // UINT32     Flags
+  NULL_GAS,                                                                 // GAS        ResetReg
+  0,                                                                        // UINT8      ResetValue
+  EFI_ACPI_6_1_ARM_PSCI_COMPLIANT,                                          // UINT16     ArmBootArchFlags
+  EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION,                 // UINT8      MinorRevision
+  0,                                                                        // UINT64     XFirmwareCtrl
+  0,                                                                        // UINT64     XDsdt
+  NULL_GAS,                                                                 // GAS        XPm1aEvtBlk
+  NULL_GAS,                                                                 // GAS        XPm1bEvtBlk
+  NULL_GAS,                                                                 // GAS        XPm1aCntBlk
+  NULL_GAS,                                                                 // GAS        XPm1bCntBlk
+  NULL_GAS,                                                                 // GAS        XPm2CntBlk
+  NULL_GAS,                                                                 // GAS        XPmTmrBlk
+  NULL_GAS,                                                                 // GAS        XGpe0Blk
+  NULL_GAS,                                                                 // GAS        XGpe1Blk
+  NULL_GAS,                                                                 // GAS        SleepControlReg
+  NULL_GAS,                                                                 // GAS        SleepStatusReg
+  0                                                                         // UINT64     HypervisorVendorIdentity;
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Fadt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
new file mode 100644
index 0000000..862a960
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
@@ -0,0 +1,123 @@
+/** @file
+*  Generic Timer Description Table (GTDT)
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+#include <IndustryStandard/Acpi61.h>
+
+#define SGI_PLATFORM_WATCHDOG_COUNT       2
+#define SGI_TIMER_FRAMES_COUNT            2
+
+#define SYSTEM_TIMER_BASE_ADDRESS         0xFFFFFFFFFFFFFFFF
+#define GTDT_GLOBAL_FLAGS                 0
+#define GTDT_GTIMER_FLAGS                 EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
+
+#define SGI_GT_BLOCK_CTL_BASE             0x2A810000
+#define SGI_GT_BLOCK_FRAME1_CTL_BASE      0x2A820000
+#define SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE  0xFFFFFFFFFFFFFFFF
+#define SGI_GT_BLOCK_FRAME1_GSIV          0x5B
+
+#define SGI_GT_BLOCK_FRAME0_CTL_BASE      0x2A830000
+#define SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE  0xFFFFFFFFFFFFFFFF
+#define SGI_GT_BLOCK_FRAME0_GSIV          0x5C
+
+#define SGI_GTX_TIMER_FLAGS               0
+#define GTX_TIMER_SECURE                  EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER
+#define GTX_TIMER_NON_SECURE              0
+#define GTX_TIMER_SAVE_CONTEXT            EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY
+#define SGI_GTX_COMMON_FLAGS_S            (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_SECURE)
+#define SGI_GTX_COMMON_FLAGS_NS           (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_NON_SECURE)
+
+#pragma pack (1)
+
+typedef struct {
+  EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE    Gtdt;
+  EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE            GtBlock;
+  EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE      Frames[SGI_TIMER_FRAMES_COUNT];
+} EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES;
+
+#pragma pack ()
+
+STATIC EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
+  {
+    ARM_ACPI_HEADER (
+      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
+      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES,
+      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
+    ),
+    SYSTEM_TIMER_BASE_ADDRESS,                    // UINT64  PhysicalAddress
+    0,                                            // UINT32  Reserved
+    FixedPcdGet32 (PcdArmArchTimerSecIntrNum),    // UINT32  SecurePL1TimerGSIV
+    GTDT_GTIMER_FLAGS,                            // UINT32  SecurePL1TimerFlags
+    FixedPcdGet32 (PcdArmArchTimerIntrNum),       // UINT32  NonSecurePL1TimerGSIV
+    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL1TimerFlags
+    FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),   // UINT32  VirtualTimerGSIV
+    GTDT_GTIMER_FLAGS,                            // UINT32  VirtualTimerFlags
+    FixedPcdGet32 (PcdArmArchTimerHypIntrNum),    // UINT32  NonSecurePL2TimerGSIV
+    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL2TimerFlags
+    0xFFFFFFFFFFFFFFFF,                           // UINT64  CntReadBasePhysicalAddress
+    SGI_PLATFORM_WATCHDOG_COUNT,                  // UINT32  PlatformTimerCount
+    sizeof (EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 PlatfromTimerOffset
+  },
+  {
+    EFI_ACPI_6_1_GTDT_GT_BLOCK,                           // UINT8 Type
+    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE) +        // UINT16 Length
+    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE) *
+    SGI_TIMER_FRAMES_COUNT,
+    EFI_ACPI_RESERVED_BYTE,                               // UINT8 Reserved
+    SGI_GT_BLOCK_CTL_BASE,                                // UINT64 CntCtlBase
+    SGI_TIMER_FRAMES_COUNT,                               // UINT32 GTBlockTimerCount
+    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE)          // UINT32 GTBlockTimerOffset
+  },
+  {
+    {
+      0,                                     // UINT8 GTFrameNumber
+      {
+        EFI_ACPI_RESERVED_BYTE,
+        EFI_ACPI_RESERVED_BYTE,
+        EFI_ACPI_RESERVED_BYTE
+      },                                     // UINT8 Reserved[3]
+      SGI_GT_BLOCK_FRAME0_CTL_BASE,          // UINT64 CntBaseX
+      SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE,      // UINT64 CntEL0BaseX
+      SGI_GT_BLOCK_FRAME0_GSIV,              // UINT32 GTxPhysicalTimerGSIV
+      SGI_GTX_TIMER_FLAGS,                   // UINT32 GTxPhysicalTimerFlags
+      0,                                     // UINT32 GTxVirtualTimerGSIV
+      0,                                     // UINT32 GTxVirtualTimerFlags
+      SGI_GTX_COMMON_FLAGS_NS                // UINT32 GTxCommonFlags
+    },
+    {
+      1,                                     // UINT8 GTFrameNumber
+      {
+        EFI_ACPI_RESERVED_BYTE,
+        EFI_ACPI_RESERVED_BYTE,
+        EFI_ACPI_RESERVED_BYTE
+      },                                     // UINT8 Reserved[3]
+      SGI_GT_BLOCK_FRAME1_CTL_BASE,          // UINT64 CntBaseX
+      SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE,      // UINT64 CntEL0BaseX
+      SGI_GT_BLOCK_FRAME1_GSIV,              // UINT32 GTxPhysicalTimerGSIV
+      SGI_GTX_TIMER_FLAGS,                   // UINT32 GTxPhysicalTimerFlags
+      0,                                     // UINT32 GTxVirtualTimerGSIV
+      0,                                     // UINT32 GTxVirtualTimerFlags
+      SGI_GTX_COMMON_FLAGS_S                 // UINT32 GTxCommonFlags
+    }
+  },
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Gtdt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
new file mode 100644
index 0000000..4f98120
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
@@ -0,0 +1,173 @@
+/** @file
+*  Multiple APIC Description Table (MADT)
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+#include <Library/PcdLib.h>
+#include <IndustryStandard/Acpi.h>
+
+#define CORES   (FixedPcdGet32 (PcdClusterCount) * \
+                 FixedPcdGet32 (PcdCoreCount))
+
+// EFI_ACPI_6_1_GIC_STRUCTURE
+#define EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,      \
+  PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency)           \
+  {                                                                            \
+    EFI_ACPI_6_1_GIC,                     /* Type */                           \
+    sizeof (EFI_ACPI_6_1_GIC_STRUCTURE),  /* Length */                         \
+    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
+    GicId,                                /* CPUInterfaceNumber */             \
+    AcpiCpuUid,                           /* AcpiProcessorUid */               \
+    Flags,                                /* Flags */                          \
+    0,                                    /* ParkingProtocolVersion */         \
+    PmuIrq,                               /* PerformanceInterruptGsiv */       \
+    0,                                    /* ParkedAddress */                  \
+    GicBase,                              /* PhysicalBaseAddress */            \
+    GicVBase,                             /* GICV */                           \
+    GicHBase,                             /* GICH */                           \
+    GsivId,                               /* VGICMaintenanceInterrupt */       \
+    GicRBase,                             /* GICRBaseAddress */                \
+    Mpidr,                                /* MPIDR */                          \
+    Efficiency,                           /* ProcessorPowerEfficiencyClass */  \
+    {                                                                          \
+      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[0] */                   \
+      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[1] */                   \
+      EFI_ACPI_RESERVED_BYTE              /* Reserved2[2] */                   \
+    }                                                                          \
+  }
+
+// EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE
+#define EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase,            \
+  GicDistVector, GicVersion)                                                   \
+  {                                                                            \
+    EFI_ACPI_6_1_GICD,                    /* Type */                           \
+    sizeof (EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE),                           \
+    EFI_ACPI_RESERVED_WORD,               /* Reserved1 */                      \
+    GicDistHwId,                          /* GicId */                          \
+    GicDistBase,                          /* PhysicalBaseAddress */            \
+    GicDistVector,                        /* SystemVectorBase */               \
+    GicVersion,                           /* GicVersion */                     \
+    {                                                                          \
+      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[0] */                   \
+      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[1] */                   \
+      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[2] */                   \
+    }                                                                          \
+  }
+
+// EFI_ACPI_6_1_GICR_STRUCTURE
+#define EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength)  \
+  {                                                                            \
+    EFI_ACPI_6_1_GICR,                    /* Type */                           \
+    sizeof (EFI_ACPI_6_1_GICR_STRUCTURE), /* Length */                         \
+    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
+    RedisRegionAddr,                      /* DiscoveryRangeBaseAddress */      \
+    RedisDiscLength                       /* DiscoveryRangeLength */           \
+  }
+
+// EFI_ACPI_6_1_GIC_ITS_STRUCTURE
+#define EFI_ACPI_6_1_GIC_ITS_INIT(GicItsId, GicItsBase)                        \
+  {                                                                            \
+    EFI_ACPI_6_1_GIC_ITS,                 /* Type */                           \
+    sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE),                                   \
+    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
+    GicItsId,                             /* GicItsId */                       \
+    GicItsBase,                           /* PhysicalBaseAddress */            \
+    EFI_ACPI_RESERVED_DWORD,              /* DiscoveryRangeLength */           \
+  }
+
+//
+// Multiple APIC Description Table
+//
+#pragma pack (1)
+
+typedef struct {
+  EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
+  EFI_ACPI_6_1_GIC_STRUCTURE                            GicInterfaces[CORES];
+  EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;
+  EFI_ACPI_6_1_GICR_STRUCTURE                           GicRedistributor;
+  EFI_ACPI_6_1_GIC_ITS_STRUCTURE                        GicIts;
+} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+#pragma pack ()
+
+STATIC EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
+  {
+    ARM_ACPI_HEADER (
+      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE,
+      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
+    ),
+    // MADT specific fields
+    0, // LocalApicAddress
+    0, // Flags
+  },
+  {
+    // Format: EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
+    //                                          PmuIrq, GicBase, GicVBase,
+    //                                          GicHBase, GsivId, GicRBase,
+    //                                          Efficiency)
+    // Note: The GIC Structure of the primary CPU must be the first entry
+    // (see note in 5.2.12.14 GICC Structure of ACPI v6.1).
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-0
+      0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-1
+      0, 1, GET_MPID(0x0, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-2
+      0, 2, GET_MPID(0x0, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-3
+      0, 3, GET_MPID(0x0, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-4
+      0, 4, GET_MPID(0x100, 0x00), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-5
+      0, 5, GET_MPID(0x100, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-6
+      0, 6, GET_MPID(0x100, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-7
+      0, 7, GET_MPID(0x100, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
+      FixedPcdGet32 (PcdGicDistributorBase),
+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+  },
+  // GIC Distributor Entry
+  EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
+                                    0, 3),
+  // GIC Redistributor
+  EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase),
+                                      SIZE_1MB),
+  // GIC ITS
+  EFI_ACPI_6_1_GIC_ITS_INIT(0, 0x30040000),
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Madt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
new file mode 100644
index 0000000..10eaf27
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
@@ -0,0 +1,77 @@
+/** @file
+*  Serial Port Console Redirection Table (SPCR)
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <IndustryStandard/Acpi61.h>
+#include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
+
+STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
+  ARM_ACPI_HEADER (
+    EFI_ACPI_6_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
+    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE,
+    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
+  ),
+  // UINT8                                   InterfaceType;
+  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART,
+  // UINT8                                   Reserved1[3];
+  {
+    EFI_ACPI_RESERVED_BYTE,
+    EFI_ACPI_RESERVED_BYTE,
+    EFI_ACPI_RESERVED_BYTE
+  },
+  // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE  BaseAddress;
+  ARM_GAS32 (0x7FF80000),
+  // UINT8                                   InterruptType;
+  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC,
+  // UINT8                                   Irq;
+  0,
+  // UINT32                                  GlobalSystemInterrupt;
+  FixedPcdGet32 (PL011UartInterrupt),
+  // UINT8                                   BaudRate;
+  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200,
+  // UINT8                                   Parity;
+  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY,
+  // UINT8                                   StopBits;
+  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1,
+  // UINT8                                   FlowControl;
+  0,
+  // UINT8                                   TerminalType;
+  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_ANSI,
+  // UINT8                                   Reserved2;
+  EFI_ACPI_RESERVED_BYTE,
+  // UINT16                                  PciDeviceId;
+  0xFFFF,
+  // UINT16                                  PciVendorId;
+  0xFFFF,
+  // UINT8                                   PciBusNumber;
+  0x00,
+  // UINT8                                   PciDeviceNumber;
+  0x00,
+  // UINT8                                   PciFunctionNumber;
+  0x00,
+  // UINT32                                  PciFlags;
+  0x00000000,
+  // UINT8                                   PciSegment;
+  0x00,
+  // UINT32                                  Reserved3;
+  EFI_ACPI_RESERVED_DWORD
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Spcr;
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
index fb1e390..4c956f4 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
@@ -12,6 +12,7 @@
 *
 **/

+#include <Library/AcpiLib.h>
 #include <Library/DebugLib.h>

 EFI_STATUS
@@ -28,6 +29,12 @@ ArmSgiPkgEntryPoint (
 {
   EFI_STATUS              Status;

+  Status = LocateAndInstallAcpiFromFv (&gSgi575AcpiTablesiFileGuid);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install ACPI tables\n"));
+    return Status;
+  }
+
   // Install Virtio Block IO.
   if (FeaturePcdGet (PcdVirtioSupported) == TRUE) {
     Status = InitVirtioBlockIo (ImageHandle);
diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
new file mode 100644
index 0000000..870ffe9
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
@@ -0,0 +1,41 @@
+/** @file
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution. The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef __SGI_ACPI_HEADER__
+#define __SGI_ACPI_HEADER__
+
+//
+// ACPI table information used to initialize tables.
+//
+#define EFI_ACPI_ARM_OEM_ID           'A','R','M','L','T','D'   // OEMID 6 bytes long
+#define EFI_ACPI_ARM_OEM_TABLE_ID     SIGNATURE_64('E','N','T','P','L','A','T','F') // OEM table id 8 bytes long
+#define EFI_ACPI_ARM_OEM_REVISION     0x20140727
+#define EFI_ACPI_ARM_CREATOR_ID       SIGNATURE_32('A','R','M',' ')
+#define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099
+
+// A macro to initialise the common header part of EFI ACPI tables as defined by
+// EFI_ACPI_DESCRIPTION_HEADER structure.
+#define ARM_ACPI_HEADER(Signature, Type, Revision) {             \
+    Signature,                      /* UINT32  Signature */       \
+    sizeof (Type),                  /* UINT32  Length */          \
+    Revision,                       /* UINT8   Revision */        \
+    0,                              /* UINT8   Checksum */        \
+    { EFI_ACPI_ARM_OEM_ID },        /* UINT8   OemId[6] */        \
+    EFI_ACPI_ARM_OEM_TABLE_ID,      /* UINT64  OemTableId */      \
+    EFI_ACPI_ARM_OEM_REVISION,      /* UINT32  OemRevision */     \
+    EFI_ACPI_ARM_CREATOR_ID,        /* UINT32  CreatorId */       \
+    EFI_ACPI_ARM_CREATOR_REVISION   /* UINT32  CreatorRevision */ \
+  }
+
+#endif /* __SGI_ACPI_HEADER__ */
--
2.7.4

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Re: [PATCH edk2-platforms v4 5/9] Platform/ARM/Sgi: add the initial set of acpi tables

[Thomas Abraham]

Hi Alexei,

On Mon, May 21, 2018 at 2:18 PM, Alexei Fedorov <Alexei.Fedorov@arm.com> wrote:
> Daniil, Thomas.
>
>
> Why is SGI_PLATFORM_WATCHDOG_COUNT defined as 2 in Gtdt.aslc :
>
>
> #define SGI_PLATFORM_WATCHDOG_COUNT       2
>
>
> and the same value is used in PlatformTimerCount field:
>
>
> SGI_PLATFORM_WATCHDOG_COUNT,                  // UINT32  PlatformTimerCount
>
>
> although the table doesn't contain any SBSA Generic watchdog entries but only GT blocks?

Yes, I missed that. These the SBSA Generic watchdog entries will be
included in the next vesion. Thanks for pointing this out.

Thanks,
Thomas.

>
>
> Regards.
>
> Alexei
>
> ________________________________
> From: edk2-devel <edk2-devel-bounces@lists.01.org> on behalf of Thomas Abraham <thomas.abraham@arm.com>
> Sent: 21 May 2018 09:25:48
> To: edk2-devel@lists.01.org
> Cc: leif.lindholm@linaro.org; ard.biesheuvel@linaro.org
> Subject: [edk2] [PATCH edk2-platforms v4 5/9] Platform/ARM/Sgi: add the initial set of acpi tables
>
> From: Daniil Egranov <daniil.egranov@arm.com>
>
> Add the initial version of Acpi tables for the SGI-575 platform which
> is required to boot the linux kernel up to a busybox prompt.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
> ---
>  .../ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf    |  53 +++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc    |  90 +++++++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl     |  99 ++++++++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc    |  87 +++++++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc    | 123 +++++++++++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc    | 173 +++++++++++++++++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc    |  77 +++++++++
>  .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   |   7 +
>  Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h        |  41 +++++
>  9 files changed, 750 insertions(+)
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
>  create mode 100644 Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
>
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
> new file mode 100644
> index 0000000..2c9bd98
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
> @@ -0,0 +1,53 @@
> +## @file
> +#  ACPI table data and ASL sources required to boot the platform.
> +#
> +#  Copyright (c) 2018, ARM Ltd. All rights reserved.
> +#
> +#  This program and the accompanying materials are licensed and made available
> +#  under the terms and conditions of the BSD License which accompanies this
> +#  distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +##
> +
> +[Defines]
> +  INF_VERSION                    = 0x0001001A
> +  BASE_NAME                      = Sgi575AcpiTables
> +  FILE_GUID                      = c712719a-0aaf-438c-9cdd-35ab4d60207d  # gSgi575AcpiTablesiFileGuid
> +  MODULE_TYPE                    = USER_DEFINED
> +  VERSION_STRING                 = 1.0
> +
> +[Sources]
> +  Dbg2.aslc
> +  Dsdt.asl
> +  Fadt.aslc
> +  Gtdt.aslc
> +  Madt.aslc
> +  Spcr.aslc
> +
> +[Packages]
> +  ArmPkg/ArmPkg.dec
> +  ArmPlatformPkg/ArmPlatformPkg.dec
> +  EmbeddedPkg/EmbeddedPkg.dec
> +  MdeModulePkg/MdeModulePkg.dec
> +  MdePkg/MdePkg.dec
> +  Platform/ARM/SgiPkg/SgiPlatform.dec
> +  Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
> +
> +[FixedPcd]
> +  gArmPlatformTokenSpaceGuid.PcdCoreCount
> +  gArmPlatformTokenSpaceGuid.PcdClusterCount
> +  gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
> +  gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
> +  gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
> +  gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
> +  gArmTokenSpaceGuid.PcdGicDistributorBase
> +  gArmTokenSpaceGuid.PcdGicRedistributorsBase
> +
> +  gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
> +  gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
> +  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
> +  gArmPlatformTokenSpaceGuid.PL011UartInterrupt
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
> new file mode 100644
> index 0000000..ed671f3
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
> @@ -0,0 +1,90 @@
> +/** @file
> +*  Debug Port Table 2 (DBG2)
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution. The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "SgiAcpiHeader.h"
> +#include <Library/AcpiLib.h>
> +#include <IndustryStandard/Acpi61.h>
> +#include <IndustryStandard/DebugPort2Table.h>
> +
> +#define SGI_DBG2_NUM_DEBUG_PORTS           1
> +#define SGI_DBG2_NUM_GAS                   1
> +#define SGI_DBG2_NS_STR_LENGTH             8
> +#define SGI_PL011_REGISTER_SPACE           0x1000
> +
> +#define NAME_STR_UART1     {'C', 'O', 'M', '1', '\0', '\0', '\0', '\0'}
> +
> +#pragma pack(1)
> +
> +typedef struct {
> +  EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
> +  EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE        BaseAddressRegister;
> +  UINT32                                        AddressSize;
> +  UINT8                                         NameSpaceString[SGI_DBG2_NS_STR_LENGTH];
> +} DBG2_DEBUG_DEVICE_INFORMATION;
> +
> +typedef struct {
> +  EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE       Description;
> +  DBG2_DEBUG_DEVICE_INFORMATION                 Dbg2DeviceInfo[SGI_DBG2_NUM_DEBUG_PORTS];
> +} DBG2_TABLE;
> +
> +#pragma pack()
> +
> +#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) {                                  \
> +  {                                                                                                                 \
> +    EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,         /* UINT8     Revision */                        \
> +    sizeof (DBG2_DEBUG_DEVICE_INFORMATION),                         /* UINT16    Length */                          \
> +    NumReg,                                                         /* UINT8     NumberofGenericAddressRegisters */ \
> +    SGI_DBG2_NS_STR_LENGTH,                                         /* UINT16    NameSpaceStringLength */           \
> +    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),     /* UINT16    NameSpaceStringOffset */           \
> +    0,                                                              /* UINT16    OemDataLength */                   \
> +    0,                                                              /* UINT16    OemDataOffset */                   \
> +    EFI_ACPI_DBG2_PORT_TYPE_SERIAL,                                 /* UINT16    Port Type */                       \
> +    SubType,                                                        /* UINT16    Port Subtype */                    \
> +    { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE },             /* UINT8     Reserved[2] */                     \
> +    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UINT16    BaseAddressRegister Offset */      \
> +    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)          /* UINT16    AddressSize Offset */              \
> +  },                                                                                                                \
> +  ARM_GAS32 (UartBase),                            /* EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
> +  UartAddrLen,                                     /* UINT32  AddressSize */                                        \
> +  UartNameStr                                      /* UINT8   NameSpaceString[MAX_DBG2_NAME_LEN] */                 \
> +}
> +
> +STATIC DBG2_TABLE Dbg2 = {
> +  {
> +    ARM_ACPI_HEADER (
> +      EFI_ACPI_6_1_DEBUG_PORT_2_TABLE_SIGNATURE,
> +      DBG2_TABLE,
> +      EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
> +    ),
> +    OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
> +    SGI_DBG2_NUM_DEBUG_PORTS
> +  },
> +  {
> +    // Kernel Debug Port
> +    DBG2_DEBUG_PORT_DDI (
> +      SGI_DBG2_NUM_GAS,
> +      EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART,
> +      FixedPcdGet64 (PcdSerialDbgRegisterBase),
> +      SGI_PL011_REGISTER_SPACE,
> +      NAME_STR_UART1
> +    ),
> +  }
> +};
> +
> +//
> +// Reference the table being generated to prevent the optimizer from removing
> +// the data structure from the executable
> +//
> +VOID* CONST ReferenceAcpiTable = &Dbg2;
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
> new file mode 100644
> index 0000000..ceeac5f
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
> @@ -0,0 +1,99 @@
> +/** @file
> +*  Differentiated System Description Table Fields (DSDT)
> +*
> +*  Copyright (c) 2018, ARM Ltd. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "SgiPlatform.h"
> +#include "SgiAcpiHeader.h"
> +
> +DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-SGI575", EFI_ACPI_ARM_OEM_REVISION) {
> +  Scope(_SB) {
> +
> +    Device(CP00) { // A75-0: Cluster 0, Cpu 0
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 0)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP01) { // A75-0: Cluster 0, Cpu 1
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 1)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP02) { // A75-0: Cluster 0, Cpu 2
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 2)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP03) { // A75-0: Cluster 0, Cpu 3
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 3)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP04) { // A75-0: Cluster 1, Cpu 0
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 4)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP05) { // A75-0: Cluster 1, Cpu 1
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 5)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP06) { // A75-0: Cluster 1, Cpu 2
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 6)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP07) { // A75-0: Cluster 1, Cpu 3
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 7)
> +      Name(_STA, 0xF)
> +    }
> +
> +    // UART PL011
> +    Device(COM0) {
> +      Name(_HID, "ARMH0011")
> +      Name(_CID, "ARMH0011")
> +      Name(_UID, Zero)
> +      Name(_STA, 0xF)
> +      Name(_CRS, ResourceTemplate() {
> +        Memory32Fixed(ReadWrite, 0x7FF80000, 0x1000)
> +        Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }
> +      })
> +    }
> +
> +    // SMSC 91C111
> +    Device(ETH0) {
> +      Name(_HID, "LNRO0003")
> +      Name(_UID, Zero)
> +      Name(_STA, 0xF)
> +      Name(_CRS, ResourceTemplate() {
> +            Memory32Fixed(ReadWrite, 0x18000000, 0x1000)
> +            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }
> +      })
> +      Name(_DSD, Package() {
> +                 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> +                     Package() {
> +                     Package(2) {"reg-io-width", 4 },
> +                    }
> +      })
> +    }
> +  } // Scope(_SB)
> +}
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
> new file mode 100644
> index 0000000..ed96298
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
> @@ -0,0 +1,87 @@
> +/** @file
> +*  Fixed ACPI Description Table (FADT)
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "SgiAcpiHeader.h"
> +#include <Library/AcpiLib.h>
> +#include <IndustryStandard/Acpi.h>
> +
> +STATIC EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
> +  ARM_ACPI_HEADER (
> +    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
> +    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE,
> +    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
> +  ),
> +  0,                                                                        // UINT32     FirmwareCtrl
> +  0,                                                                        // UINT32     Dsdt
> +  EFI_ACPI_RESERVED_BYTE,                                                   // UINT8      Reserved0
> +  EFI_ACPI_6_1_PM_PROFILE_ENTERPRISE_SERVER,                                // UINT8      PreferredPmProfile
> +  0,                                                                        // UINT16     SciInt
> +  0,                                                                        // UINT32     SmiCmd
> +  0,                                                                        // UINT8      AcpiEnable
> +  0,                                                                        // UINT8      AcpiDisable
> +  0,                                                                        // UINT8      S4BiosReq
> +  0,                                                                        // UINT8      PstateCnt
> +  0,                                                                        // UINT32     Pm1aEvtBlk
> +  0,                                                                        // UINT32     Pm1bEvtBlk
> +  0,                                                                        // UINT32     Pm1aCntBlk
> +  0,                                                                        // UINT32     Pm1bCntBlk
> +  0,                                                                        // UINT32     Pm2CntBlk
> +  0,                                                                        // UINT32     PmTmrBlk
> +  0,                                                                        // UINT32     Gpe0Blk
> +  0,                                                                        // UINT32     Gpe1Blk
> +  0,                                                                        // UINT8      Pm1EvtLen
> +  0,                                                                        // UINT8      Pm1CntLen
> +  0,                                                                        // UINT8      Pm2CntLen
> +  0,                                                                        // UINT8      PmTmrLen
> +  0,                                                                        // UINT8      Gpe0BlkLen
> +  0,                                                                        // UINT8      Gpe1BlkLen
> +  0,                                                                        // UINT8      Gpe1Base
> +  0,                                                                        // UINT8      CstCnt
> +  0,                                                                        // UINT16     PLvl2Lat
> +  0,                                                                        // UINT16     PLvl3Lat
> +  0,                                                                        // UINT16     FlushSize
> +  0,                                                                        // UINT16     FlushStride
> +  0,                                                                        // UINT8      DutyOffset
> +  0,                                                                        // UINT8      DutyWidth
> +  0,                                                                        // UINT8      DayAlrm
> +  0,                                                                        // UINT8      MonAlrm
> +  0,                                                                        // UINT8      Century
> +  0,                                                                        // UINT16     IaPcBootArch
> +  0,                                                                        // UINT8      Reserved1
> +  EFI_ACPI_6_1_HW_REDUCED_ACPI | EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE,    // UINT32     Flags
> +  NULL_GAS,                                                                 // GAS        ResetReg
> +  0,                                                                        // UINT8      ResetValue
> +  EFI_ACPI_6_1_ARM_PSCI_COMPLIANT,                                          // UINT16     ArmBootArchFlags
> +  EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION,                 // UINT8      MinorRevision
> +  0,                                                                        // UINT64     XFirmwareCtrl
> +  0,                                                                        // UINT64     XDsdt
> +  NULL_GAS,                                                                 // GAS        XPm1aEvtBlk
> +  NULL_GAS,                                                                 // GAS        XPm1bEvtBlk
> +  NULL_GAS,                                                                 // GAS        XPm1aCntBlk
> +  NULL_GAS,                                                                 // GAS        XPm1bCntBlk
> +  NULL_GAS,                                                                 // GAS        XPm2CntBlk
> +  NULL_GAS,                                                                 // GAS        XPmTmrBlk
> +  NULL_GAS,                                                                 // GAS        XGpe0Blk
> +  NULL_GAS,                                                                 // GAS        XGpe1Blk
> +  NULL_GAS,                                                                 // GAS        SleepControlReg
> +  NULL_GAS,                                                                 // GAS        SleepStatusReg
> +  0                                                                         // UINT64     HypervisorVendorIdentity;
> +};
> +
> +//
> +// Reference the table being generated to prevent the optimizer from removing the
> +// data structure from the executable
> +//
> +VOID* CONST ReferenceAcpiTable = &Fadt;
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
> new file mode 100644
> index 0000000..862a960
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
> @@ -0,0 +1,123 @@
> +/** @file
> +*  Generic Timer Description Table (GTDT)
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "SgiAcpiHeader.h"
> +#include <Library/AcpiLib.h>
> +#include <Library/PcdLib.h>
> +#include <IndustryStandard/Acpi61.h>
> +
> +#define SGI_PLATFORM_WATCHDOG_COUNT       2
> +#define SGI_TIMER_FRAMES_COUNT            2
> +
> +#define SYSTEM_TIMER_BASE_ADDRESS         0xFFFFFFFFFFFFFFFF
> +#define GTDT_GLOBAL_FLAGS                 0
> +#define GTDT_GTIMER_FLAGS                 EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
> +
> +#define SGI_GT_BLOCK_CTL_BASE             0x2A810000
> +#define SGI_GT_BLOCK_FRAME1_CTL_BASE      0x2A820000
> +#define SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE  0xFFFFFFFFFFFFFFFF
> +#define SGI_GT_BLOCK_FRAME1_GSIV          0x5B
> +
> +#define SGI_GT_BLOCK_FRAME0_CTL_BASE      0x2A830000
> +#define SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE  0xFFFFFFFFFFFFFFFF
> +#define SGI_GT_BLOCK_FRAME0_GSIV          0x5C
> +
> +#define SGI_GTX_TIMER_FLAGS               0
> +#define GTX_TIMER_SECURE                  EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER
> +#define GTX_TIMER_NON_SECURE              0
> +#define GTX_TIMER_SAVE_CONTEXT            EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY
> +#define SGI_GTX_COMMON_FLAGS_S            (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_SECURE)
> +#define SGI_GTX_COMMON_FLAGS_NS           (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_NON_SECURE)
> +
> +#pragma pack (1)
> +
> +typedef struct {
> +  EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE    Gtdt;
> +  EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE            GtBlock;
> +  EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE      Frames[SGI_TIMER_FRAMES_COUNT];
> +} EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES;
> +
> +#pragma pack ()
> +
> +STATIC EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
> +  {
> +    ARM_ACPI_HEADER (
> +      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
> +      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES,
> +      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
> +    ),
> +    SYSTEM_TIMER_BASE_ADDRESS,                    // UINT64  PhysicalAddress
> +    0,                                            // UINT32  Reserved
> +    FixedPcdGet32 (PcdArmArchTimerSecIntrNum),    // UINT32  SecurePL1TimerGSIV
> +    GTDT_GTIMER_FLAGS,                            // UINT32  SecurePL1TimerFlags
> +    FixedPcdGet32 (PcdArmArchTimerIntrNum),       // UINT32  NonSecurePL1TimerGSIV
> +    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL1TimerFlags
> +    FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),   // UINT32  VirtualTimerGSIV
> +    GTDT_GTIMER_FLAGS,                            // UINT32  VirtualTimerFlags
> +    FixedPcdGet32 (PcdArmArchTimerHypIntrNum),    // UINT32  NonSecurePL2TimerGSIV
> +    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL2TimerFlags
> +    0xFFFFFFFFFFFFFFFF,                           // UINT64  CntReadBasePhysicalAddress
> +    SGI_PLATFORM_WATCHDOG_COUNT,                  // UINT32  PlatformTimerCount
> +    sizeof (EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 PlatfromTimerOffset
> +  },
> +  {
> +    EFI_ACPI_6_1_GTDT_GT_BLOCK,                           // UINT8 Type
> +    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE) +        // UINT16 Length
> +    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE) *
> +    SGI_TIMER_FRAMES_COUNT,
> +    EFI_ACPI_RESERVED_BYTE,                               // UINT8 Reserved
> +    SGI_GT_BLOCK_CTL_BASE,                                // UINT64 CntCtlBase
> +    SGI_TIMER_FRAMES_COUNT,                               // UINT32 GTBlockTimerCount
> +    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE)          // UINT32 GTBlockTimerOffset
> +  },
> +  {
> +    {
> +      0,                                     // UINT8 GTFrameNumber
> +      {
> +        EFI_ACPI_RESERVED_BYTE,
> +        EFI_ACPI_RESERVED_BYTE,
> +        EFI_ACPI_RESERVED_BYTE
> +      },                                     // UINT8 Reserved[3]
> +      SGI_GT_BLOCK_FRAME0_CTL_BASE,          // UINT64 CntBaseX
> +      SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE,      // UINT64 CntEL0BaseX
> +      SGI_GT_BLOCK_FRAME0_GSIV,              // UINT32 GTxPhysicalTimerGSIV
> +      SGI_GTX_TIMER_FLAGS,                   // UINT32 GTxPhysicalTimerFlags
> +      0,                                     // UINT32 GTxVirtualTimerGSIV
> +      0,                                     // UINT32 GTxVirtualTimerFlags
> +      SGI_GTX_COMMON_FLAGS_NS                // UINT32 GTxCommonFlags
> +    },
> +    {
> +      1,                                     // UINT8 GTFrameNumber
> +      {
> +        EFI_ACPI_RESERVED_BYTE,
> +        EFI_ACPI_RESERVED_BYTE,
> +        EFI_ACPI_RESERVED_BYTE
> +      },                                     // UINT8 Reserved[3]
> +      SGI_GT_BLOCK_FRAME1_CTL_BASE,          // UINT64 CntBaseX
> +      SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE,      // UINT64 CntEL0BaseX
> +      SGI_GT_BLOCK_FRAME1_GSIV,              // UINT32 GTxPhysicalTimerGSIV
> +      SGI_GTX_TIMER_FLAGS,                   // UINT32 GTxPhysicalTimerFlags
> +      0,                                     // UINT32 GTxVirtualTimerGSIV
> +      0,                                     // UINT32 GTxVirtualTimerFlags
> +      SGI_GTX_COMMON_FLAGS_S                 // UINT32 GTxCommonFlags
> +    }
> +  },
> +};
> +
> +//
> +// Reference the table being generated to prevent the optimizer from removing the
> +// data structure from the executable
> +//
> +VOID* CONST ReferenceAcpiTable = &Gtdt;
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
> new file mode 100644
> index 0000000..4f98120
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
> @@ -0,0 +1,173 @@
> +/** @file
> +*  Multiple APIC Description Table (MADT)
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "SgiPlatform.h"
> +#include "SgiAcpiHeader.h"
> +#include <Library/AcpiLib.h>
> +#include <Library/ArmLib.h>
> +#include <Library/PcdLib.h>
> +#include <IndustryStandard/Acpi.h>
> +
> +#define CORES   (FixedPcdGet32 (PcdClusterCount) * \
> +                 FixedPcdGet32 (PcdCoreCount))
> +
> +// EFI_ACPI_6_1_GIC_STRUCTURE
> +#define EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,      \
> +  PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency)           \
> +  {                                                                            \
> +    EFI_ACPI_6_1_GIC,                     /* Type */                           \
> +    sizeof (EFI_ACPI_6_1_GIC_STRUCTURE),  /* Length */                         \
> +    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
> +    GicId,                                /* CPUInterfaceNumber */             \
> +    AcpiCpuUid,                           /* AcpiProcessorUid */               \
> +    Flags,                                /* Flags */                          \
> +    0,                                    /* ParkingProtocolVersion */         \
> +    PmuIrq,                               /* PerformanceInterruptGsiv */       \
> +    0,                                    /* ParkedAddress */                  \
> +    GicBase,                              /* PhysicalBaseAddress */            \
> +    GicVBase,                             /* GICV */                           \
> +    GicHBase,                             /* GICH */                           \
> +    GsivId,                               /* VGICMaintenanceInterrupt */       \
> +    GicRBase,                             /* GICRBaseAddress */                \
> +    Mpidr,                                /* MPIDR */                          \
> +    Efficiency,                           /* ProcessorPowerEfficiencyClass */  \
> +    {                                                                          \
> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[0] */                   \
> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[1] */                   \
> +      EFI_ACPI_RESERVED_BYTE              /* Reserved2[2] */                   \
> +    }                                                                          \
> +  }
> +
> +// EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE
> +#define EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase,            \
> +  GicDistVector, GicVersion)                                                   \
> +  {                                                                            \
> +    EFI_ACPI_6_1_GICD,                    /* Type */                           \
> +    sizeof (EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE),                           \
> +    EFI_ACPI_RESERVED_WORD,               /* Reserved1 */                      \
> +    GicDistHwId,                          /* GicId */                          \
> +    GicDistBase,                          /* PhysicalBaseAddress */            \
> +    GicDistVector,                        /* SystemVectorBase */               \
> +    GicVersion,                           /* GicVersion */                     \
> +    {                                                                          \
> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[0] */                   \
> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[1] */                   \
> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[2] */                   \
> +    }                                                                          \
> +  }
> +
> +// EFI_ACPI_6_1_GICR_STRUCTURE
> +#define EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength)  \
> +  {                                                                            \
> +    EFI_ACPI_6_1_GICR,                    /* Type */                           \
> +    sizeof (EFI_ACPI_6_1_GICR_STRUCTURE), /* Length */                         \
> +    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
> +    RedisRegionAddr,                      /* DiscoveryRangeBaseAddress */      \
> +    RedisDiscLength                       /* DiscoveryRangeLength */           \
> +  }
> +
> +// EFI_ACPI_6_1_GIC_ITS_STRUCTURE
> +#define EFI_ACPI_6_1_GIC_ITS_INIT(GicItsId, GicItsBase)                        \
> +  {                                                                            \
> +    EFI_ACPI_6_1_GIC_ITS,                 /* Type */                           \
> +    sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE),                                   \
> +    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
> +    GicItsId,                             /* GicItsId */                       \
> +    GicItsBase,                           /* PhysicalBaseAddress */            \
> +    EFI_ACPI_RESERVED_DWORD,              /* DiscoveryRangeLength */           \
> +  }
> +
> +//
> +// Multiple APIC Description Table
> +//
> +#pragma pack (1)
> +
> +typedef struct {
> +  EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
> +  EFI_ACPI_6_1_GIC_STRUCTURE                            GicInterfaces[CORES];
> +  EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;
> +  EFI_ACPI_6_1_GICR_STRUCTURE                           GicRedistributor;
> +  EFI_ACPI_6_1_GIC_ITS_STRUCTURE                        GicIts;
> +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
> +
> +#pragma pack ()
> +
> +STATIC EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
> +  {
> +    ARM_ACPI_HEADER (
> +      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
> +      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE,
> +      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
> +    ),
> +    // MADT specific fields
> +    0, // LocalApicAddress
> +    0, // Flags
> +  },
> +  {
> +    // Format: EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
> +    //                                          PmuIrq, GicBase, GicVBase,
> +    //                                          GicHBase, GsivId, GicRBase,
> +    //                                          Efficiency)
> +    // Note: The GIC Structure of the primary CPU must be the first entry
> +    // (see note in 5.2.12.14 GICC Structure of ACPI v6.1).
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-0
> +      0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-1
> +      0, 1, GET_MPID(0x0, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-2
> +      0, 2, GET_MPID(0x0, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-3
> +      0, 3, GET_MPID(0x0, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-4
> +      0, 4, GET_MPID(0x100, 0x00), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-5
> +      0, 5, GET_MPID(0x100, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-6
> +      0, 6, GET_MPID(0x100, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-7
> +      0, 7, GET_MPID(0x100, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +  },
> +  // GIC Distributor Entry
> +  EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
> +                                    0, 3),
> +  // GIC Redistributor
> +  EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase),
> +                                      SIZE_1MB),
> +  // GIC ITS
> +  EFI_ACPI_6_1_GIC_ITS_INIT(0, 0x30040000),
> +};
> +
> +//
> +// Reference the table being generated to prevent the optimizer from removing
> +// the data structure from the executable
> +//
> +VOID* CONST ReferenceAcpiTable = &Madt;
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
> new file mode 100644
> index 0000000..10eaf27
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
> @@ -0,0 +1,77 @@
> +/** @file
> +*  Serial Port Console Redirection Table (SPCR)
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "SgiAcpiHeader.h"
> +#include <Library/AcpiLib.h>
> +#include <IndustryStandard/Acpi61.h>
> +#include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
> +
> +STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
> +  ARM_ACPI_HEADER (
> +    EFI_ACPI_6_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
> +    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE,
> +    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
> +  ),
> +  // UINT8                                   InterfaceType;
> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART,
> +  // UINT8                                   Reserved1[3];
> +  {
> +    EFI_ACPI_RESERVED_BYTE,
> +    EFI_ACPI_RESERVED_BYTE,
> +    EFI_ACPI_RESERVED_BYTE
> +  },
> +  // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE  BaseAddress;
> +  ARM_GAS32 (0x7FF80000),
> +  // UINT8                                   InterruptType;
> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC,
> +  // UINT8                                   Irq;
> +  0,
> +  // UINT32                                  GlobalSystemInterrupt;
> +  FixedPcdGet32 (PL011UartInterrupt),
> +  // UINT8                                   BaudRate;
> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200,
> +  // UINT8                                   Parity;
> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY,
> +  // UINT8                                   StopBits;
> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1,
> +  // UINT8                                   FlowControl;
> +  0,
> +  // UINT8                                   TerminalType;
> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_ANSI,
> +  // UINT8                                   Reserved2;
> +  EFI_ACPI_RESERVED_BYTE,
> +  // UINT16                                  PciDeviceId;
> +  0xFFFF,
> +  // UINT16                                  PciVendorId;
> +  0xFFFF,
> +  // UINT8                                   PciBusNumber;
> +  0x00,
> +  // UINT8                                   PciDeviceNumber;
> +  0x00,
> +  // UINT8                                   PciFunctionNumber;
> +  0x00,
> +  // UINT32                                  PciFlags;
> +  0x00000000,
> +  // UINT8                                   PciSegment;
> +  0x00,
> +  // UINT32                                  Reserved3;
> +  EFI_ACPI_RESERVED_DWORD
> +};
> +
> +//
> +// Reference the table being generated to prevent the optimizer from removing the
> +// data structure from the executable
> +//
> +VOID* CONST ReferenceAcpiTable = &Spcr;
> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> index fb1e390..4c956f4 100644
> --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> @@ -12,6 +12,7 @@
>  *
>  **/
>
> +#include <Library/AcpiLib.h>
>  #include <Library/DebugLib.h>
>
>  EFI_STATUS
> @@ -28,6 +29,12 @@ ArmSgiPkgEntryPoint (
>  {
>    EFI_STATUS              Status;
>
> +  Status = LocateAndInstallAcpiFromFv (&gSgi575AcpiTablesiFileGuid);
> +  if (EFI_ERROR (Status)) {
> +    DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install ACPI tables\n"));
> +    return Status;
> +  }
> +
>    // Install Virtio Block IO.
>    if (FeaturePcdGet (PcdVirtioSupported) == TRUE) {
>      Status = InitVirtioBlockIo (ImageHandle);
> diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> new file mode 100644
> index 0000000..870ffe9
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> @@ -0,0 +1,41 @@
> +/** @file
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution. The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#ifndef __SGI_ACPI_HEADER__
> +#define __SGI_ACPI_HEADER__
> +
> +//
> +// ACPI table information used to initialize tables.
> +//
> +#define EFI_ACPI_ARM_OEM_ID           'A','R','M','L','T','D'   // OEMID 6 bytes long
> +#define EFI_ACPI_ARM_OEM_TABLE_ID     SIGNATURE_64('E','N','T','P','L','A','T','F') // OEM table id 8 bytes long
> +#define EFI_ACPI_ARM_OEM_REVISION     0x20140727
> +#define EFI_ACPI_ARM_CREATOR_ID       SIGNATURE_32('A','R','M',' ')
> +#define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099
> +
> +// A macro to initialise the common header part of EFI ACPI tables as defined by
> +// EFI_ACPI_DESCRIPTION_HEADER structure.
> +#define ARM_ACPI_HEADER(Signature, Type, Revision) {             \
> +    Signature,                      /* UINT32  Signature */       \
> +    sizeof (Type),                  /* UINT32  Length */          \
> +    Revision,                       /* UINT8   Revision */        \
> +    0,                              /* UINT8   Checksum */        \
> +    { EFI_ACPI_ARM_OEM_ID },        /* UINT8   OemId[6] */        \
> +    EFI_ACPI_ARM_OEM_TABLE_ID,      /* UINT64  OemTableId */      \
> +    EFI_ACPI_ARM_OEM_REVISION,      /* UINT32  OemRevision */     \
> +    EFI_ACPI_ARM_CREATOR_ID,        /* UINT32  CreatorId */       \
> +    EFI_ACPI_ARM_CREATOR_REVISION   /* UINT32  CreatorRevision */ \
> +  }
> +
> +#endif /* __SGI_ACPI_HEADER__ */
> --
> 2.7.4
>
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Re: [PATCH edk2-platforms v4 5/9] Platform/ARM/Sgi: add the initial set of acpi tables

[Ard Biesheuvel]

On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
> From: Daniil Egranov <daniil.egranov@arm.com>
>
> Add the initial version of Acpi tables for the SGI-575 platform which
> is required to boot the linux kernel up to a busybox prompt.
>

Please drop these references to linux or busybox.

If this collection of ACPI tables represents some specified minimum
(SBBR?), we should mention that. If anything is missing in that
respect, please add it instead.

> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
> ---
>  .../ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf    |  53 +++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc    |  90 +++++++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl     |  99 ++++++++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc    |  87 +++++++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc    | 123 +++++++++++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc    | 173 +++++++++++++++++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc    |  77 +++++++++
>  .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   |   7 +
>  Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h        |  41 +++++
>  9 files changed, 750 insertions(+)
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
>  create mode 100644 Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
>
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
> new file mode 100644
> index 0000000..2c9bd98
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
> @@ -0,0 +1,53 @@
> +## @file
> +#  ACPI table data and ASL sources required to boot the platform.
> +#
> +#  Copyright (c) 2018, ARM Ltd. All rights reserved.
> +#
> +#  This program and the accompanying materials are licensed and made available
> +#  under the terms and conditions of the BSD License which accompanies this
> +#  distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +##
> +
> +[Defines]
> +  INF_VERSION                    = 0x0001001A
> +  BASE_NAME                      = Sgi575AcpiTables
> +  FILE_GUID                      = c712719a-0aaf-438c-9cdd-35ab4d60207d  # gSgi575AcpiTablesiFileGuid
> +  MODULE_TYPE                    = USER_DEFINED
> +  VERSION_STRING                 = 1.0
> +
> +[Sources]
> +  Dbg2.aslc
> +  Dsdt.asl
> +  Fadt.aslc
> +  Gtdt.aslc
> +  Madt.aslc
> +  Spcr.aslc
> +
> +[Packages]
> +  ArmPkg/ArmPkg.dec
> +  ArmPlatformPkg/ArmPlatformPkg.dec
> +  EmbeddedPkg/EmbeddedPkg.dec
> +  MdeModulePkg/MdeModulePkg.dec
> +  MdePkg/MdePkg.dec
> +  Platform/ARM/SgiPkg/SgiPlatform.dec
> +  Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
> +

Do you really need all these packages?

> +[FixedPcd]
> +  gArmPlatformTokenSpaceGuid.PcdCoreCount
> +  gArmPlatformTokenSpaceGuid.PcdClusterCount
> +  gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
> +  gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
> +  gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
> +  gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
> +  gArmTokenSpaceGuid.PcdGicDistributorBase
> +  gArmTokenSpaceGuid.PcdGicRedistributorsBase
> +
> +  gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
> +  gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
> +  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
> +  gArmPlatformTokenSpaceGuid.PL011UartInterrupt
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
> new file mode 100644
> index 0000000..ed671f3
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
> @@ -0,0 +1,90 @@
> +/** @file
> +*  Debug Port Table 2 (DBG2)
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution. The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "SgiAcpiHeader.h"
> +#include <Library/AcpiLib.h>
> +#include <IndustryStandard/Acpi61.h>
> +#include <IndustryStandard/DebugPort2Table.h>
> +
> +#define SGI_DBG2_NUM_DEBUG_PORTS           1
> +#define SGI_DBG2_NUM_GAS                   1
> +#define SGI_DBG2_NS_STR_LENGTH             8
> +#define SGI_PL011_REGISTER_SPACE           0x1000
> +
> +#define NAME_STR_UART1     {'C', 'O', 'M', '1', '\0', '\0', '\0', '\0'}
> +
> +#pragma pack(1)
> +
> +typedef struct {
> +  EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
> +  EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE        BaseAddressRegister;
> +  UINT32                                        AddressSize;
> +  UINT8                                         NameSpaceString[SGI_DBG2_NS_STR_LENGTH];
> +} DBG2_DEBUG_DEVICE_INFORMATION;
> +
> +typedef struct {
> +  EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE       Description;
> +  DBG2_DEBUG_DEVICE_INFORMATION                 Dbg2DeviceInfo[SGI_DBG2_NUM_DEBUG_PORTS];
> +} DBG2_TABLE;
> +
> +#pragma pack()
> +
> +#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) {                                  \
> +  {                                                                                                                 \
> +    EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,         /* UINT8     Revision */                        \
> +    sizeof (DBG2_DEBUG_DEVICE_INFORMATION),                         /* UINT16    Length */                          \
> +    NumReg,                                                         /* UINT8     NumberofGenericAddressRegisters */ \
> +    SGI_DBG2_NS_STR_LENGTH,                                         /* UINT16    NameSpaceStringLength */           \
> +    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),     /* UINT16    NameSpaceStringOffset */           \
> +    0,                                                              /* UINT16    OemDataLength */                   \
> +    0,                                                              /* UINT16    OemDataOffset */                   \
> +    EFI_ACPI_DBG2_PORT_TYPE_SERIAL,                                 /* UINT16    Port Type */                       \
> +    SubType,                                                        /* UINT16    Port Subtype */                    \
> +    { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE },             /* UINT8     Reserved[2] */                     \
> +    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UINT16    BaseAddressRegister Offset */      \
> +    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)          /* UINT16    AddressSize Offset */              \
> +  },                                                                                                                \
> +  ARM_GAS32 (UartBase),                            /* EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
> +  UartAddrLen,                                     /* UINT32  AddressSize */                                        \
> +  UartNameStr                                      /* UINT8   NameSpaceString[MAX_DBG2_NAME_LEN] */                 \
> +}
> +
> +STATIC DBG2_TABLE Dbg2 = {
> +  {
> +    ARM_ACPI_HEADER (
> +      EFI_ACPI_6_1_DEBUG_PORT_2_TABLE_SIGNATURE,
> +      DBG2_TABLE,
> +      EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
> +    ),
> +    OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
> +    SGI_DBG2_NUM_DEBUG_PORTS
> +  },
> +  {
> +    // Kernel Debug Port
> +    DBG2_DEBUG_PORT_DDI (
> +      SGI_DBG2_NUM_GAS,
> +      EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART,
> +      FixedPcdGet64 (PcdSerialDbgRegisterBase),
> +      SGI_PL011_REGISTER_SPACE,
> +      NAME_STR_UART1
> +    ),
> +  }
> +};
> +
> +//
> +// Reference the table being generated to prevent the optimizer from removing
> +// the data structure from the executable
> +//
> +VOID* CONST ReferenceAcpiTable = &Dbg2;
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
> new file mode 100644
> index 0000000..ceeac5f
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
> @@ -0,0 +1,99 @@
> +/** @file
> +*  Differentiated System Description Table Fields (DSDT)
> +*
> +*  Copyright (c) 2018, ARM Ltd. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "SgiPlatform.h"
> +#include "SgiAcpiHeader.h"
> +
> +DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-SGI575", EFI_ACPI_ARM_OEM_REVISION) {
> +  Scope(_SB) {
> +
> +    Device(CP00) { // A75-0: Cluster 0, Cpu 0
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 0)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP01) { // A75-0: Cluster 0, Cpu 1
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 1)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP02) { // A75-0: Cluster 0, Cpu 2
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 2)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP03) { // A75-0: Cluster 0, Cpu 3
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 3)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP04) { // A75-0: Cluster 1, Cpu 0
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 4)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP05) { // A75-0: Cluster 1, Cpu 1
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 5)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP06) { // A75-0: Cluster 1, Cpu 2
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 6)
> +      Name(_STA, 0xF)
> +    }
> +
> +    Device(CP07) { // A75-0: Cluster 1, Cpu 3
> +      Name(_HID, "ACPI0007")
> +      Name(_UID, 7)
> +      Name(_STA, 0xF)
> +    }
> +
> +    // UART PL011
> +    Device(COM0) {
> +      Name(_HID, "ARMH0011")
> +      Name(_CID, "ARMH0011")
> +      Name(_UID, Zero)
> +      Name(_STA, 0xF)
> +      Name(_CRS, ResourceTemplate() {
> +        Memory32Fixed(ReadWrite, 0x7FF80000, 0x1000)
> +        Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }
> +      })
> +    }
> +
> +    // SMSC 91C111
> +    Device(ETH0) {
> +      Name(_HID, "LNRO0003")
> +      Name(_UID, Zero)
> +      Name(_STA, 0xF)
> +      Name(_CRS, ResourceTemplate() {
> +            Memory32Fixed(ReadWrite, 0x18000000, 0x1000)
> +            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }
> +      })
> +      Name(_DSD, Package() {
> +                 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> +                     Package() {
> +                     Package(2) {"reg-io-width", 4 },
> +                    }
> +      })
> +    }
> +  } // Scope(_SB)
> +}
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
> new file mode 100644
> index 0000000..ed96298
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
> @@ -0,0 +1,87 @@
> +/** @file
> +*  Fixed ACPI Description Table (FADT)
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "SgiAcpiHeader.h"
> +#include <Library/AcpiLib.h>
> +#include <IndustryStandard/Acpi.h>
> +
> +STATIC EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
> +  ARM_ACPI_HEADER (
> +    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
> +    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE,
> +    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
> +  ),
> +  0,                                                                        // UINT32     FirmwareCtrl
> +  0,                                                                        // UINT32     Dsdt
> +  EFI_ACPI_RESERVED_BYTE,                                                   // UINT8      Reserved0
> +  EFI_ACPI_6_1_PM_PROFILE_ENTERPRISE_SERVER,                                // UINT8      PreferredPmProfile
> +  0,                                                                        // UINT16     SciInt
> +  0,                                                                        // UINT32     SmiCmd
> +  0,                                                                        // UINT8      AcpiEnable
> +  0,                                                                        // UINT8      AcpiDisable
> +  0,                                                                        // UINT8      S4BiosReq
> +  0,                                                                        // UINT8      PstateCnt
> +  0,                                                                        // UINT32     Pm1aEvtBlk
> +  0,                                                                        // UINT32     Pm1bEvtBlk
> +  0,                                                                        // UINT32     Pm1aCntBlk
> +  0,                                                                        // UINT32     Pm1bCntBlk
> +  0,                                                                        // UINT32     Pm2CntBlk
> +  0,                                                                        // UINT32     PmTmrBlk
> +  0,                                                                        // UINT32     Gpe0Blk
> +  0,                                                                        // UINT32     Gpe1Blk
> +  0,                                                                        // UINT8      Pm1EvtLen
> +  0,                                                                        // UINT8      Pm1CntLen
> +  0,                                                                        // UINT8      Pm2CntLen
> +  0,                                                                        // UINT8      PmTmrLen
> +  0,                                                                        // UINT8      Gpe0BlkLen
> +  0,                                                                        // UINT8      Gpe1BlkLen
> +  0,                                                                        // UINT8      Gpe1Base
> +  0,                                                                        // UINT8      CstCnt
> +  0,                                                                        // UINT16     PLvl2Lat
> +  0,                                                                        // UINT16     PLvl3Lat
> +  0,                                                                        // UINT16     FlushSize
> +  0,                                                                        // UINT16     FlushStride
> +  0,                                                                        // UINT8      DutyOffset
> +  0,                                                                        // UINT8      DutyWidth
> +  0,                                                                        // UINT8      DayAlrm
> +  0,                                                                        // UINT8      MonAlrm
> +  0,                                                                        // UINT8      Century
> +  0,                                                                        // UINT16     IaPcBootArch
> +  0,                                                                        // UINT8      Reserved1
> +  EFI_ACPI_6_1_HW_REDUCED_ACPI | EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE,    // UINT32     Flags
> +  NULL_GAS,                                                                 // GAS        ResetReg
> +  0,                                                                        // UINT8      ResetValue
> +  EFI_ACPI_6_1_ARM_PSCI_COMPLIANT,                                          // UINT16     ArmBootArchFlags
> +  EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION,                 // UINT8      MinorRevision
> +  0,                                                                        // UINT64     XFirmwareCtrl
> +  0,                                                                        // UINT64     XDsdt
> +  NULL_GAS,                                                                 // GAS        XPm1aEvtBlk
> +  NULL_GAS,                                                                 // GAS        XPm1bEvtBlk
> +  NULL_GAS,                                                                 // GAS        XPm1aCntBlk
> +  NULL_GAS,                                                                 // GAS        XPm1bCntBlk
> +  NULL_GAS,                                                                 // GAS        XPm2CntBlk
> +  NULL_GAS,                                                                 // GAS        XPmTmrBlk
> +  NULL_GAS,                                                                 // GAS        XGpe0Blk
> +  NULL_GAS,                                                                 // GAS        XGpe1Blk
> +  NULL_GAS,                                                                 // GAS        SleepControlReg
> +  NULL_GAS,                                                                 // GAS        SleepStatusReg
> +  0                                                                         // UINT64     HypervisorVendorIdentity;
> +};
> +
> +//
> +// Reference the table being generated to prevent the optimizer from removing the
> +// data structure from the executable
> +//
> +VOID* CONST ReferenceAcpiTable = &Fadt;
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
> new file mode 100644
> index 0000000..862a960
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
> @@ -0,0 +1,123 @@
> +/** @file
> +*  Generic Timer Description Table (GTDT)
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "SgiAcpiHeader.h"
> +#include <Library/AcpiLib.h>
> +#include <Library/PcdLib.h>
> +#include <IndustryStandard/Acpi61.h>
> +
> +#define SGI_PLATFORM_WATCHDOG_COUNT       2
> +#define SGI_TIMER_FRAMES_COUNT            2
> +
> +#define SYSTEM_TIMER_BASE_ADDRESS         0xFFFFFFFFFFFFFFFF
> +#define GTDT_GLOBAL_FLAGS                 0
> +#define GTDT_GTIMER_FLAGS                 EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
> +
> +#define SGI_GT_BLOCK_CTL_BASE             0x2A810000
> +#define SGI_GT_BLOCK_FRAME1_CTL_BASE      0x2A820000
> +#define SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE  0xFFFFFFFFFFFFFFFF
> +#define SGI_GT_BLOCK_FRAME1_GSIV          0x5B
> +
> +#define SGI_GT_BLOCK_FRAME0_CTL_BASE      0x2A830000
> +#define SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE  0xFFFFFFFFFFFFFFFF
> +#define SGI_GT_BLOCK_FRAME0_GSIV          0x5C
> +

Alexei, could you comment on this part as well please?

> +#define SGI_GTX_TIMER_FLAGS               0
> +#define GTX_TIMER_SECURE                  EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER
> +#define GTX_TIMER_NON_SECURE              0
> +#define GTX_TIMER_SAVE_CONTEXT            EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY
> +#define SGI_GTX_COMMON_FLAGS_S            (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_SECURE)
> +#define SGI_GTX_COMMON_FLAGS_NS           (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_NON_SECURE)
> +
> +#pragma pack (1)
> +
> +typedef struct {
> +  EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE    Gtdt;
> +  EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE            GtBlock;
> +  EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE      Frames[SGI_TIMER_FRAMES_COUNT];
> +} EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES;
> +
> +#pragma pack ()
> +
> +STATIC EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
> +  {
> +    ARM_ACPI_HEADER (
> +      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
> +      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES,
> +      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
> +    ),
> +    SYSTEM_TIMER_BASE_ADDRESS,                    // UINT64  PhysicalAddress
> +    0,                                            // UINT32  Reserved
> +    FixedPcdGet32 (PcdArmArchTimerSecIntrNum),    // UINT32  SecurePL1TimerGSIV
> +    GTDT_GTIMER_FLAGS,                            // UINT32  SecurePL1TimerFlags
> +    FixedPcdGet32 (PcdArmArchTimerIntrNum),       // UINT32  NonSecurePL1TimerGSIV
> +    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL1TimerFlags
> +    FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),   // UINT32  VirtualTimerGSIV
> +    GTDT_GTIMER_FLAGS,                            // UINT32  VirtualTimerFlags
> +    FixedPcdGet32 (PcdArmArchTimerHypIntrNum),    // UINT32  NonSecurePL2TimerGSIV
> +    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL2TimerFlags
> +    0xFFFFFFFFFFFFFFFF,                           // UINT64  CntReadBasePhysicalAddress
> +    SGI_PLATFORM_WATCHDOG_COUNT,                  // UINT32  PlatformTimerCount
> +    sizeof (EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 PlatfromTimerOffset
> +  },
> +  {
> +    EFI_ACPI_6_1_GTDT_GT_BLOCK,                           // UINT8 Type
> +    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE) +        // UINT16 Length
> +    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE) *
> +    SGI_TIMER_FRAMES_COUNT,
> +    EFI_ACPI_RESERVED_BYTE,                               // UINT8 Reserved
> +    SGI_GT_BLOCK_CTL_BASE,                                // UINT64 CntCtlBase
> +    SGI_TIMER_FRAMES_COUNT,                               // UINT32 GTBlockTimerCount
> +    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE)          // UINT32 GTBlockTimerOffset
> +  },
> +  {
> +    {
> +      0,                                     // UINT8 GTFrameNumber
> +      {
> +        EFI_ACPI_RESERVED_BYTE,
> +        EFI_ACPI_RESERVED_BYTE,
> +        EFI_ACPI_RESERVED_BYTE
> +      },                                     // UINT8 Reserved[3]
> +      SGI_GT_BLOCK_FRAME0_CTL_BASE,          // UINT64 CntBaseX
> +      SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE,      // UINT64 CntEL0BaseX
> +      SGI_GT_BLOCK_FRAME0_GSIV,              // UINT32 GTxPhysicalTimerGSIV
> +      SGI_GTX_TIMER_FLAGS,                   // UINT32 GTxPhysicalTimerFlags
> +      0,                                     // UINT32 GTxVirtualTimerGSIV
> +      0,                                     // UINT32 GTxVirtualTimerFlags
> +      SGI_GTX_COMMON_FLAGS_NS                // UINT32 GTxCommonFlags
> +    },
> +    {
> +      1,                                     // UINT8 GTFrameNumber
> +      {
> +        EFI_ACPI_RESERVED_BYTE,
> +        EFI_ACPI_RESERVED_BYTE,
> +        EFI_ACPI_RESERVED_BYTE
> +      },                                     // UINT8 Reserved[3]
> +      SGI_GT_BLOCK_FRAME1_CTL_BASE,          // UINT64 CntBaseX
> +      SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE,      // UINT64 CntEL0BaseX
> +      SGI_GT_BLOCK_FRAME1_GSIV,              // UINT32 GTxPhysicalTimerGSIV
> +      SGI_GTX_TIMER_FLAGS,                   // UINT32 GTxPhysicalTimerFlags
> +      0,                                     // UINT32 GTxVirtualTimerGSIV
> +      0,                                     // UINT32 GTxVirtualTimerFlags
> +      SGI_GTX_COMMON_FLAGS_S                 // UINT32 GTxCommonFlags
> +    }
> +  },
> +};
> +
> +//
> +// Reference the table being generated to prevent the optimizer from removing the
> +// data structure from the executable
> +//
> +VOID* CONST ReferenceAcpiTable = &Gtdt;
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
> new file mode 100644
> index 0000000..4f98120
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
> @@ -0,0 +1,173 @@
> +/** @file
> +*  Multiple APIC Description Table (MADT)
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "SgiPlatform.h"
> +#include "SgiAcpiHeader.h"
> +#include <Library/AcpiLib.h>
> +#include <Library/ArmLib.h>
> +#include <Library/PcdLib.h>
> +#include <IndustryStandard/Acpi.h>
> +
> +#define CORES   (FixedPcdGet32 (PcdClusterCount) * \
> +                 FixedPcdGet32 (PcdCoreCount))
> +
> +// EFI_ACPI_6_1_GIC_STRUCTURE
> +#define EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,      \
> +  PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency)           \
> +  {                                                                            \
> +    EFI_ACPI_6_1_GIC,                     /* Type */                           \
> +    sizeof (EFI_ACPI_6_1_GIC_STRUCTURE),  /* Length */                         \
> +    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
> +    GicId,                                /* CPUInterfaceNumber */             \
> +    AcpiCpuUid,                           /* AcpiProcessorUid */               \
> +    Flags,                                /* Flags */                          \
> +    0,                                    /* ParkingProtocolVersion */         \
> +    PmuIrq,                               /* PerformanceInterruptGsiv */       \
> +    0,                                    /* ParkedAddress */                  \
> +    GicBase,                              /* PhysicalBaseAddress */            \
> +    GicVBase,                             /* GICV */                           \
> +    GicHBase,                             /* GICH */                           \
> +    GsivId,                               /* VGICMaintenanceInterrupt */       \
> +    GicRBase,                             /* GICRBaseAddress */                \
> +    Mpidr,                                /* MPIDR */                          \
> +    Efficiency,                           /* ProcessorPowerEfficiencyClass */  \
> +    {                                                                          \
> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[0] */                   \
> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[1] */                   \
> +      EFI_ACPI_RESERVED_BYTE              /* Reserved2[2] */                   \
> +    }                                                                          \
> +  }
> +
> +// EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE
> +#define EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase,            \
> +  GicDistVector, GicVersion)                                                   \
> +  {                                                                            \
> +    EFI_ACPI_6_1_GICD,                    /* Type */                           \
> +    sizeof (EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE),                           \
> +    EFI_ACPI_RESERVED_WORD,               /* Reserved1 */                      \
> +    GicDistHwId,                          /* GicId */                          \
> +    GicDistBase,                          /* PhysicalBaseAddress */            \
> +    GicDistVector,                        /* SystemVectorBase */               \
> +    GicVersion,                           /* GicVersion */                     \
> +    {                                                                          \
> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[0] */                   \
> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[1] */                   \
> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[2] */                   \
> +    }                                                                          \
> +  }
> +
> +// EFI_ACPI_6_1_GICR_STRUCTURE
> +#define EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength)  \
> +  {                                                                            \
> +    EFI_ACPI_6_1_GICR,                    /* Type */                           \
> +    sizeof (EFI_ACPI_6_1_GICR_STRUCTURE), /* Length */                         \
> +    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
> +    RedisRegionAddr,                      /* DiscoveryRangeBaseAddress */      \
> +    RedisDiscLength                       /* DiscoveryRangeLength */           \
> +  }
> +
> +// EFI_ACPI_6_1_GIC_ITS_STRUCTURE
> +#define EFI_ACPI_6_1_GIC_ITS_INIT(GicItsId, GicItsBase)                        \
> +  {                                                                            \
> +    EFI_ACPI_6_1_GIC_ITS,                 /* Type */                           \
> +    sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE),                                   \
> +    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
> +    GicItsId,                             /* GicItsId */                       \
> +    GicItsBase,                           /* PhysicalBaseAddress */            \
> +    EFI_ACPI_RESERVED_DWORD,              /* DiscoveryRangeLength */           \
> +  }
> +
> +//
> +// Multiple APIC Description Table
> +//
> +#pragma pack (1)
> +
> +typedef struct {
> +  EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
> +  EFI_ACPI_6_1_GIC_STRUCTURE                            GicInterfaces[CORES];
> +  EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;
> +  EFI_ACPI_6_1_GICR_STRUCTURE                           GicRedistributor;
> +  EFI_ACPI_6_1_GIC_ITS_STRUCTURE                        GicIts;
> +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
> +
> +#pragma pack ()
> +
> +STATIC EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
> +  {
> +    ARM_ACPI_HEADER (
> +      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
> +      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE,
> +      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
> +    ),
> +    // MADT specific fields
> +    0, // LocalApicAddress
> +    0, // Flags
> +  },
> +  {
> +    // Format: EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
> +    //                                          PmuIrq, GicBase, GicVBase,
> +    //                                          GicHBase, GsivId, GicRBase,
> +    //                                          Efficiency)
> +    // Note: The GIC Structure of the primary CPU must be the first entry
> +    // (see note in 5.2.12.14 GICC Structure of ACPI v6.1).
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-0
> +      0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-1
> +      0, 1, GET_MPID(0x0, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-2
> +      0, 2, GET_MPID(0x0, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-3
> +      0, 3, GET_MPID(0x0, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-4
> +      0, 4, GET_MPID(0x100, 0x00), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-5
> +      0, 5, GET_MPID(0x100, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-6
> +      0, 6, GET_MPID(0x100, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-7
> +      0, 7, GET_MPID(0x100, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
> +      FixedPcdGet32 (PcdGicDistributorBase),
> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> +  },
> +  // GIC Distributor Entry
> +  EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
> +                                    0, 3),
> +  // GIC Redistributor
> +  EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase),
> +                                      SIZE_1MB),
> +  // GIC ITS
> +  EFI_ACPI_6_1_GIC_ITS_INIT(0, 0x30040000),
> +};
> +
> +//
> +// Reference the table being generated to prevent the optimizer from removing
> +// the data structure from the executable
> +//
> +VOID* CONST ReferenceAcpiTable = &Madt;
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
> new file mode 100644
> index 0000000..10eaf27
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
> @@ -0,0 +1,77 @@
> +/** @file
> +*  Serial Port Console Redirection Table (SPCR)
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "SgiAcpiHeader.h"
> +#include <Library/AcpiLib.h>
> +#include <IndustryStandard/Acpi61.h>
> +#include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
> +
> +STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
> +  ARM_ACPI_HEADER (
> +    EFI_ACPI_6_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
> +    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE,
> +    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
> +  ),
> +  // UINT8                                   InterfaceType;
> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART,
> +  // UINT8                                   Reserved1[3];
> +  {
> +    EFI_ACPI_RESERVED_BYTE,
> +    EFI_ACPI_RESERVED_BYTE,
> +    EFI_ACPI_RESERVED_BYTE
> +  },
> +  // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE  BaseAddress;
> +  ARM_GAS32 (0x7FF80000),
> +  // UINT8                                   InterruptType;
> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC,
> +  // UINT8                                   Irq;
> +  0,
> +  // UINT32                                  GlobalSystemInterrupt;
> +  FixedPcdGet32 (PL011UartInterrupt),
> +  // UINT8                                   BaudRate;
> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200,
> +  // UINT8                                   Parity;
> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY,
> +  // UINT8                                   StopBits;
> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1,
> +  // UINT8                                   FlowControl;
> +  0,
> +  // UINT8                                   TerminalType;
> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_ANSI,
> +  // UINT8                                   Reserved2;
> +  EFI_ACPI_RESERVED_BYTE,
> +  // UINT16                                  PciDeviceId;
> +  0xFFFF,
> +  // UINT16                                  PciVendorId;
> +  0xFFFF,
> +  // UINT8                                   PciBusNumber;
> +  0x00,
> +  // UINT8                                   PciDeviceNumber;
> +  0x00,
> +  // UINT8                                   PciFunctionNumber;
> +  0x00,
> +  // UINT32                                  PciFlags;
> +  0x00000000,
> +  // UINT8                                   PciSegment;
> +  0x00,
> +  // UINT32                                  Reserved3;
> +  EFI_ACPI_RESERVED_DWORD
> +};
> +
> +//
> +// Reference the table being generated to prevent the optimizer from removing the
> +// data structure from the executable
> +//
> +VOID* CONST ReferenceAcpiTable = &Spcr;
> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> index fb1e390..4c956f4 100644
> --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> @@ -12,6 +12,7 @@
>  *
>  **/
>
> +#include <Library/AcpiLib.h>
>  #include <Library/DebugLib.h>
>
>  EFI_STATUS
> @@ -28,6 +29,12 @@ ArmSgiPkgEntryPoint (
>  {
>    EFI_STATUS              Status;
>
> +  Status = LocateAndInstallAcpiFromFv (&gSgi575AcpiTablesiFileGuid);
> +  if (EFI_ERROR (Status)) {
> +    DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install ACPI tables\n"));
> +    return Status;
> +  }
> +
>    // Install Virtio Block IO.
>    if (FeaturePcdGet (PcdVirtioSupported) == TRUE) {
>      Status = InitVirtioBlockIo (ImageHandle);
> diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> new file mode 100644
> index 0000000..870ffe9
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> @@ -0,0 +1,41 @@
> +/** @file
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution. The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#ifndef __SGI_ACPI_HEADER__
> +#define __SGI_ACPI_HEADER__
> +
> +//
> +// ACPI table information used to initialize tables.
> +//
> +#define EFI_ACPI_ARM_OEM_ID           'A','R','M','L','T','D'   // OEMID 6 bytes long
> +#define EFI_ACPI_ARM_OEM_TABLE_ID     SIGNATURE_64('E','N','T','P','L','A','T','F') // OEM table id 8 bytes long
> +#define EFI_ACPI_ARM_OEM_REVISION     0x20140727
> +#define EFI_ACPI_ARM_CREATOR_ID       SIGNATURE_32('A','R','M',' ')
> +#define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099
> +
> +// A macro to initialise the common header part of EFI ACPI tables as defined by
> +// EFI_ACPI_DESCRIPTION_HEADER structure.
> +#define ARM_ACPI_HEADER(Signature, Type, Revision) {             \
> +    Signature,                      /* UINT32  Signature */       \
> +    sizeof (Type),                  /* UINT32  Length */          \
> +    Revision,                       /* UINT8   Revision */        \
> +    0,                              /* UINT8   Checksum */        \
> +    { EFI_ACPI_ARM_OEM_ID },        /* UINT8   OemId[6] */        \
> +    EFI_ACPI_ARM_OEM_TABLE_ID,      /* UINT64  OemTableId */      \
> +    EFI_ACPI_ARM_OEM_REVISION,      /* UINT32  OemRevision */     \
> +    EFI_ACPI_ARM_CREATOR_ID,        /* UINT32  CreatorId */       \
> +    EFI_ACPI_ARM_CREATOR_REVISION   /* UINT32  CreatorRevision */ \
> +  }
> +
> +#endif /* __SGI_ACPI_HEADER__ */
> --
> 2.7.4
>

Re: [PATCH edk2-platforms v4 5/9] Platform/ARM/Sgi: add the initial set of acpi tables

[Alexei Fedorov]

> -----Original Message-----
> From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Sent: 21 May 2018 10:07
> To: Thomas Abraham <thomas.abraham@arm.com>; Alexei Fedorov
> <Alexei.Fedorov@arm.com>
> Cc: edk2-devel@lists.01.org; Leif Lindholm <leif.lindholm@linaro.org>; Daniil
> Egranov <Daniil.Egranov@arm.com>
> Subject: Re: [PATCH edk2-platforms v4 5/9] Platform/ARM/Sgi: add the initial
> set of acpi tables
>
> On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com>
> wrote:
> > From: Daniil Egranov <daniil.egranov@arm.com>
> >
> > Add the initial version of Acpi tables for the SGI-575 platform which
> > is required to boot the linux kernel up to a busybox prompt.
> >
>
> Please drop these references to linux or busybox.
>
> If this collection of ACPI tables represents some specified minimum (SBBR?), we
> should mention that. If anything is missing in that respect, please add it instead.
>
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
> > Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
> > ---
> >  .../ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf    |  53 +++++++
> >  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc    |  90 +++++++++++
> >  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl     |  99 ++++++++++++
> >  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc    |  87 +++++++++++
> >  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc    | 123 +++++++++++++++
> >  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc    | 173
> +++++++++++++++++++++
> >  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc    |  77 +++++++++
> >  .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   |   7 +
> >  Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h        |  41 +++++
> >  9 files changed, 750 insertions(+)
> >  create mode 100644
> > Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
> >  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
> >  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
> >  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
> >  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
> >  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
> >  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
> >  create mode 100644 Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> >
> > diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
> > b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
> > new file mode 100644
> > index 0000000..2c9bd98
> > --- /dev/null
> > +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
> > @@ -0,0 +1,53 @@
> > +## @file
> > +#  ACPI table data and ASL sources required to boot the platform.
> > +#
> > +#  Copyright (c) 2018, ARM Ltd. All rights reserved.
> > +#
> > +#  This program and the accompanying materials are licensed and made
> > +available #  under the terms and conditions of the BSD License which
> > +accompanies this #  distribution.  The full text of the license may
> > +be found at #  http://opensource.org/licenses/bsd-license.php
> > +#
> > +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> > +BASIS, #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND,
> EITHER EXPRESS OR IMPLIED.
> > +#
> > +##
> > +
> > +[Defines]
> > +  INF_VERSION                    = 0x0001001A
> > +  BASE_NAME                      = Sgi575AcpiTables
> > +  FILE_GUID                      = c712719a-0aaf-438c-9cdd-35ab4d60207d  #
> gSgi575AcpiTablesiFileGuid
> > +  MODULE_TYPE                    = USER_DEFINED
> > +  VERSION_STRING                 = 1.0
> > +
> > +[Sources]
> > +  Dbg2.aslc
> > +  Dsdt.asl
> > +  Fadt.aslc
> > +  Gtdt.aslc
> > +  Madt.aslc
> > +  Spcr.aslc
> > +
> > +[Packages]
> > +  ArmPkg/ArmPkg.dec
> > +  ArmPlatformPkg/ArmPlatformPkg.dec
> > +  EmbeddedPkg/EmbeddedPkg.dec
> > +  MdeModulePkg/MdeModulePkg.dec
> > +  MdePkg/MdePkg.dec
> > +  Platform/ARM/SgiPkg/SgiPlatform.dec
> > +  Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
> > +
>
> Do you really need all these packages?
>
> > +[FixedPcd]
> > +  gArmPlatformTokenSpaceGuid.PcdCoreCount
> > +  gArmPlatformTokenSpaceGuid.PcdClusterCount
> > +  gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
> > +  gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
> > +  gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
> > +  gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
> > +  gArmTokenSpaceGuid.PcdGicDistributorBase
> > +  gArmTokenSpaceGuid.PcdGicRedistributorsBase
> > +
> > +  gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
> > +  gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
> > +  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
> > +  gArmPlatformTokenSpaceGuid.PL011UartInterrupt
> > diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
> > b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
> > new file mode 100644
> > index 0000000..ed671f3
> > --- /dev/null
> > +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
> > @@ -0,0 +1,90 @@
> > +/** @file
> > +*  Debug Port Table 2 (DBG2)
> > +*
> > +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> > +*
> > +*  This program and the accompanying materials are licensed and made
> > +available
> > +*  under the terms and conditions of the BSD License which
> > +accompanies this
> > +*  distribution. The full text of the license may be found at
> > +*  http://opensource.org/licenses/bsd-license.php
> > +*
> > +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> > +BASIS,
> > +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> > +*
> > +**/
> > +
> > +#include "SgiAcpiHeader.h"
> > +#include <Library/AcpiLib.h>
> > +#include <IndustryStandard/Acpi61.h>
> > +#include <IndustryStandard/DebugPort2Table.h>
> > +
> > +#define SGI_DBG2_NUM_DEBUG_PORTS           1
> > +#define SGI_DBG2_NUM_GAS                   1
> > +#define SGI_DBG2_NS_STR_LENGTH             8
> > +#define SGI_PL011_REGISTER_SPACE           0x1000
> > +
> > +#define NAME_STR_UART1     {'C', 'O', 'M', '1', '\0', '\0', '\0', '\0'}
> > +
> > +#pragma pack(1)
> > +
> > +typedef struct {
> > +  EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
> > +  EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE        BaseAddressRegister;
> > +  UINT32                                        AddressSize;
> > +  UINT8
> NameSpaceString[SGI_DBG2_NS_STR_LENGTH];
> > +} DBG2_DEBUG_DEVICE_INFORMATION;
> > +
> > +typedef struct {
> > +  EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE       Description;
> > +  DBG2_DEBUG_DEVICE_INFORMATION
> Dbg2DeviceInfo[SGI_DBG2_NUM_DEBUG_PORTS];
> > +} DBG2_TABLE;
> > +
> > +#pragma pack()
> > +
> > +#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase,
> UartAddrLen, UartNameStr) {                                  \
> > +  {                                                                                                                 \
> > +    EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,
> /* UINT8     Revision */                        \
> > +    sizeof (DBG2_DEBUG_DEVICE_INFORMATION),                         /* UINT16
> Length */                          \
> > +    NumReg,                                                         /* UINT8
> NumberofGenericAddressRegisters */ \
> > +    SGI_DBG2_NS_STR_LENGTH,                                         /* UINT16
> NameSpaceStringLength */           \
> > +    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),
> /* UINT16    NameSpaceStringOffset */           \
> > +    0,                                                              /* UINT16    OemDataLength */
> \
> > +    0,                                                              /* UINT16    OemDataOffset */
> \
> > +    EFI_ACPI_DBG2_PORT_TYPE_SERIAL,                                 /* UINT16    Port
> Type */                       \
> > +    SubType,                                                        /* UINT16    Port Subtype */
> \
> > +    { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE },             /* UINT8
> Reserved[2] */                     \
> > +    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister),
> /* UINT16    BaseAddressRegister Offset */      \
> > +    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)          /*
> UINT16    AddressSize Offset */              \
> > +  },                                                                                                                \
> > +  ARM_GAS32 (UartBase),                            /*
> EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
> > +  UartAddrLen,                                     /* UINT32  AddressSize */
> \
> > +  UartNameStr                                      /* UINT8
> NameSpaceString[MAX_DBG2_NAME_LEN] */                 \
> > +}
> > +
> > +STATIC DBG2_TABLE Dbg2 = {
> > +  {
> > +    ARM_ACPI_HEADER (
> > +      EFI_ACPI_6_1_DEBUG_PORT_2_TABLE_SIGNATURE,
> > +      DBG2_TABLE,
> > +      EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
> > +    ),
> > +    OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
> > +    SGI_DBG2_NUM_DEBUG_PORTS
> > +  },
> > +  {
> > +    // Kernel Debug Port
> > +    DBG2_DEBUG_PORT_DDI (
> > +      SGI_DBG2_NUM_GAS,
> > +      EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART,
> > +      FixedPcdGet64 (PcdSerialDbgRegisterBase),
> > +      SGI_PL011_REGISTER_SPACE,
> > +      NAME_STR_UART1
> > +    ),
> > +  }
> > +};
> > +
> > +//
> > +// Reference the table being generated to prevent the optimizer from
> > +removing // the data structure from the executable //
> > +VOID* CONST ReferenceAcpiTable = &Dbg2;
> > diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
> > b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
> > new file mode 100644
> > index 0000000..ceeac5f
> > --- /dev/null
> > +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
> > @@ -0,0 +1,99 @@
> > +/** @file
> > +*  Differentiated System Description Table Fields (DSDT)
> > +*
> > +*  Copyright (c) 2018, ARM Ltd. All rights reserved.
> > +*
> > +*  This program and the accompanying materials are licensed and made
> > +available
> > +*  under the terms and conditions of the BSD License which
> > +accompanies this
> > +*  distribution.  The full text of the license may be found at
> > +*  http://opensource.org/licenses/bsd-license.php
> > +*
> > +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> > +BASIS,
> > +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> > +*
> > +**/
> > +
> > +#include "SgiPlatform.h"
> > +#include "SgiAcpiHeader.h"
> > +
> > +DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-SGI575",
> > +EFI_ACPI_ARM_OEM_REVISION) {
> > +  Scope(_SB) {
> > +
> > +    Device(CP00) { // A75-0: Cluster 0, Cpu 0
> > +      Name(_HID, "ACPI0007")
> > +      Name(_UID, 0)
> > +      Name(_STA, 0xF)
> > +    }
> > +
> > +    Device(CP01) { // A75-0: Cluster 0, Cpu 1
> > +      Name(_HID, "ACPI0007")
> > +      Name(_UID, 1)
> > +      Name(_STA, 0xF)
> > +    }
> > +
> > +    Device(CP02) { // A75-0: Cluster 0, Cpu 2
> > +      Name(_HID, "ACPI0007")
> > +      Name(_UID, 2)
> > +      Name(_STA, 0xF)
> > +    }
> > +
> > +    Device(CP03) { // A75-0: Cluster 0, Cpu 3
> > +      Name(_HID, "ACPI0007")
> > +      Name(_UID, 3)
> > +      Name(_STA, 0xF)
> > +    }
> > +
> > +    Device(CP04) { // A75-0: Cluster 1, Cpu 0
> > +      Name(_HID, "ACPI0007")
> > +      Name(_UID, 4)
> > +      Name(_STA, 0xF)
> > +    }
> > +
> > +    Device(CP05) { // A75-0: Cluster 1, Cpu 1
> > +      Name(_HID, "ACPI0007")
> > +      Name(_UID, 5)
> > +      Name(_STA, 0xF)
> > +    }
> > +
> > +    Device(CP06) { // A75-0: Cluster 1, Cpu 2
> > +      Name(_HID, "ACPI0007")
> > +      Name(_UID, 6)
> > +      Name(_STA, 0xF)
> > +    }
> > +
> > +    Device(CP07) { // A75-0: Cluster 1, Cpu 3
> > +      Name(_HID, "ACPI0007")
> > +      Name(_UID, 7)
> > +      Name(_STA, 0xF)
> > +    }
> > +
> > +    // UART PL011
> > +    Device(COM0) {
> > +      Name(_HID, "ARMH0011")
> > +      Name(_CID, "ARMH0011")
> > +      Name(_UID, Zero)
> > +      Name(_STA, 0xF)
> > +      Name(_CRS, ResourceTemplate() {
> > +        Memory32Fixed(ReadWrite, 0x7FF80000, 0x1000)
> > +        Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }
> > +      })
> > +    }
> > +
> > +    // SMSC 91C111
> > +    Device(ETH0) {
> > +      Name(_HID, "LNRO0003")
> > +      Name(_UID, Zero)
> > +      Name(_STA, 0xF)
> > +      Name(_CRS, ResourceTemplate() {
> > +            Memory32Fixed(ReadWrite, 0x18000000, 0x1000)
> > +            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }
> > +      })
> > +      Name(_DSD, Package() {
> > +                 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> > +                     Package() {
> > +                     Package(2) {"reg-io-width", 4 },
> > +                    }
> > +      })
> > +    }
> > +  } // Scope(_SB)
> > +}
> > diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
> > b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
> > new file mode 100644
> > index 0000000..ed96298
> > --- /dev/null
> > +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
> > @@ -0,0 +1,87 @@
> > +/** @file
> > +*  Fixed ACPI Description Table (FADT)
> > +*
> > +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> > +*
> > +*  This program and the accompanying materials are licensed and made
> > +available
> > +*  under the terms and conditions of the BSD License which
> > +accompanies this
> > +*  distribution.  The full text of the license may be found at
> > +*  http://opensource.org/licenses/bsd-license.php
> > +*
> > +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> > +BASIS,
> > +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> > +*
> > +**/
> > +
> > +#include "SgiAcpiHeader.h"
> > +#include <Library/AcpiLib.h>
> > +#include <IndustryStandard/Acpi.h>
> > +
> > +STATIC EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
> > +  ARM_ACPI_HEADER (
> > +    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
> > +    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE,
> > +    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
> > +  ),
> > +  0,                                                                        // UINT32     FirmwareCtrl
> > +  0,                                                                        // UINT32     Dsdt
> > +  EFI_ACPI_RESERVED_BYTE,                                                   // UINT8
> Reserved0
> > +  EFI_ACPI_6_1_PM_PROFILE_ENTERPRISE_SERVER,                                //
> UINT8      PreferredPmProfile
> > +  0,                                                                        // UINT16     SciInt
> > +  0,                                                                        // UINT32     SmiCmd
> > +  0,                                                                        // UINT8      AcpiEnable
> > +  0,                                                                        // UINT8      AcpiDisable
> > +  0,                                                                        // UINT8      S4BiosReq
> > +  0,                                                                        // UINT8      PstateCnt
> > +  0,                                                                        // UINT32     Pm1aEvtBlk
> > +  0,                                                                        // UINT32     Pm1bEvtBlk
> > +  0,                                                                        // UINT32     Pm1aCntBlk
> > +  0,                                                                        // UINT32     Pm1bCntBlk
> > +  0,                                                                        // UINT32     Pm2CntBlk
> > +  0,                                                                        // UINT32     PmTmrBlk
> > +  0,                                                                        // UINT32     Gpe0Blk
> > +  0,                                                                        // UINT32     Gpe1Blk
> > +  0,                                                                        // UINT8      Pm1EvtLen
> > +  0,                                                                        // UINT8      Pm1CntLen
> > +  0,                                                                        // UINT8      Pm2CntLen
> > +  0,                                                                        // UINT8      PmTmrLen
> > +  0,                                                                        // UINT8      Gpe0BlkLen
> > +  0,                                                                        // UINT8      Gpe1BlkLen
> > +  0,                                                                        // UINT8      Gpe1Base
> > +  0,                                                                        // UINT8      CstCnt
> > +  0,                                                                        // UINT16     PLvl2Lat
> > +  0,                                                                        // UINT16     PLvl3Lat
> > +  0,                                                                        // UINT16     FlushSize
> > +  0,                                                                        // UINT16     FlushStride
> > +  0,                                                                        // UINT8      DutyOffset
> > +  0,                                                                        // UINT8      DutyWidth
> > +  0,                                                                        // UINT8      DayAlrm
> > +  0,                                                                        // UINT8      MonAlrm
> > +  0,                                                                        // UINT8      Century
> > +  0,                                                                        // UINT16     IaPcBootArch
> > +  0,                                                                        // UINT8      Reserved1
> > +  EFI_ACPI_6_1_HW_REDUCED_ACPI |
> EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE,    // UINT32     Flags
> > +  NULL_GAS,                                                                 // GAS        ResetReg
> > +  0,                                                                        // UINT8      ResetValue
> > +  EFI_ACPI_6_1_ARM_PSCI_COMPLIANT,                                          // UINT16
> ArmBootArchFlags
> > +  EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION,
> // UINT8      MinorRevision
> > +  0,                                                                        // UINT64     XFirmwareCtrl
> > +  0,                                                                        // UINT64     XDsdt
> > +  NULL_GAS,                                                                 // GAS        XPm1aEvtBlk
> > +  NULL_GAS,                                                                 // GAS        XPm1bEvtBlk
> > +  NULL_GAS,                                                                 // GAS        XPm1aCntBlk
> > +  NULL_GAS,                                                                 // GAS        XPm1bCntBlk
> > +  NULL_GAS,                                                                 // GAS        XPm2CntBlk
> > +  NULL_GAS,                                                                 // GAS        XPmTmrBlk
> > +  NULL_GAS,                                                                 // GAS        XGpe0Blk
> > +  NULL_GAS,                                                                 // GAS        XGpe1Blk
> > +  NULL_GAS,                                                                 // GAS        SleepControlReg
> > +  NULL_GAS,                                                                 // GAS        SleepStatusReg
> > +  0                                                                         // UINT64
> HypervisorVendorIdentity;
> > +};
> > +
> > +//
> > +// Reference the table being generated to prevent the optimizer from
> > +removing the // data structure from the executable //
> > +VOID* CONST ReferenceAcpiTable = &Fadt;
> > diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
> > b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
> > new file mode 100644
> > index 0000000..862a960
> > --- /dev/null
> > +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
> > @@ -0,0 +1,123 @@
> > +/** @file
> > +*  Generic Timer Description Table (GTDT)
> > +*
> > +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> > +*
> > +*  This program and the accompanying materials are licensed and made
> > +available
> > +*  under the terms and conditions of the BSD License which
> > +accompanies this
> > +*  distribution.  The full text of the license may be found at
> > +*  http://opensource.org/licenses/bsd-license.php
> > +*
> > +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> > +BASIS,
> > +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> > +*
> > +**/
> > +
> > +#include "SgiAcpiHeader.h"
> > +#include <Library/AcpiLib.h>
> > +#include <Library/PcdLib.h>
> > +#include <IndustryStandard/Acpi61.h>
> > +
> > +#define SGI_PLATFORM_WATCHDOG_COUNT       2
> > +#define SGI_TIMER_FRAMES_COUNT            2
> > +
> > +#define SYSTEM_TIMER_BASE_ADDRESS         0xFFFFFFFFFFFFFFFF
> > +#define GTDT_GLOBAL_FLAGS                 0
> > +#define GTDT_GTIMER_FLAGS
> EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
> > +
> > +#define SGI_GT_BLOCK_CTL_BASE             0x2A810000
> > +#define SGI_GT_BLOCK_FRAME1_CTL_BASE      0x2A820000
> > +#define SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE  0xFFFFFFFFFFFFFFFF
> > +#define SGI_GT_BLOCK_FRAME1_GSIV          0x5B
> > +
> > +#define SGI_GT_BLOCK_FRAME0_CTL_BASE      0x2A830000
> > +#define SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE  0xFFFFFFFFFFFFFFFF
> > +#define SGI_GT_BLOCK_FRAME0_GSIV          0x5C
> > +
>
> Alexei, could you comment on this part as well please?
>
Yes, this is correct for SGI platform.

I've already asked the question about SGI_PLATFORM_WATCHDOG_COUNT used as a total number of
 Platform Timer Structures, but with no SBSA Generic Watchdog entries defined in the table.


> > +#define SGI_GTX_TIMER_FLAGS               0
> > +#define GTX_TIMER_SECURE
> EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER
> > +#define GTX_TIMER_NON_SECURE              0
> > +#define GTX_TIMER_SAVE_CONTEXT
> EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY
> > +#define SGI_GTX_COMMON_FLAGS_S            (GTX_TIMER_SAVE_CONTEXT |
> GTX_TIMER_SECURE)
> > +#define SGI_GTX_COMMON_FLAGS_NS           (GTX_TIMER_SAVE_CONTEXT |
> GTX_TIMER_NON_SECURE)
> > +
> > +#pragma pack (1)
> > +
> > +typedef struct {
> > +  EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE    Gtdt;
> > +  EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE            GtBlock;
> > +  EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE
> Frames[SGI_TIMER_FRAMES_COUNT];
> > +} EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES;
> > +
> > +#pragma pack ()
> > +
> > +STATIC EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
> > +  {
> > +    ARM_ACPI_HEADER (
> > +      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
> > +      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES,
> > +      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
> > +    ),
> > +    SYSTEM_TIMER_BASE_ADDRESS,                    // UINT64  PhysicalAddress
> > +    0,                                            // UINT32  Reserved
> > +    FixedPcdGet32 (PcdArmArchTimerSecIntrNum),    // UINT32
> SecurePL1TimerGSIV
> > +    GTDT_GTIMER_FLAGS,                            // UINT32  SecurePL1TimerFlags
> > +    FixedPcdGet32 (PcdArmArchTimerIntrNum),       // UINT32
> NonSecurePL1TimerGSIV
> > +    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL1TimerFlags
> > +    FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),   // UINT32
> VirtualTimerGSIV
> > +    GTDT_GTIMER_FLAGS,                            // UINT32  VirtualTimerFlags
> > +    FixedPcdGet32 (PcdArmArchTimerHypIntrNum),    // UINT32
> NonSecurePL2TimerGSIV
> > +    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL2TimerFlags
> > +    0xFFFFFFFFFFFFFFFF,                           // UINT64
> CntReadBasePhysicalAddress
> > +    SGI_PLATFORM_WATCHDOG_COUNT,                  // UINT32
> PlatformTimerCount
> > +    sizeof (EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32
> > +PlatfromTimerOffset
> > +  },
> > +  {
> > +    EFI_ACPI_6_1_GTDT_GT_BLOCK,                           // UINT8 Type
> > +    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE) +        // UINT16
> Length
> > +    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE) *
> > +    SGI_TIMER_FRAMES_COUNT,
> > +    EFI_ACPI_RESERVED_BYTE,                               // UINT8 Reserved
> > +    SGI_GT_BLOCK_CTL_BASE,                                // UINT64 CntCtlBase
> > +    SGI_TIMER_FRAMES_COUNT,                               // UINT32
> GTBlockTimerCount
> > +    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE)          // UINT32
> GTBlockTimerOffset
> > +  },
> > +  {
> > +    {
> > +      0,                                     // UINT8 GTFrameNumber
> > +      {
> > +        EFI_ACPI_RESERVED_BYTE,
> > +        EFI_ACPI_RESERVED_BYTE,
> > +        EFI_ACPI_RESERVED_BYTE
> > +      },                                     // UINT8 Reserved[3]
> > +      SGI_GT_BLOCK_FRAME0_CTL_BASE,          // UINT64 CntBaseX
> > +      SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE,      // UINT64 CntEL0BaseX
> > +      SGI_GT_BLOCK_FRAME0_GSIV,              // UINT32 GTxPhysicalTimerGSIV
> > +      SGI_GTX_TIMER_FLAGS,                   // UINT32 GTxPhysicalTimerFlags
> > +      0,                                     // UINT32 GTxVirtualTimerGSIV
> > +      0,                                     // UINT32 GTxVirtualTimerFlags
> > +      SGI_GTX_COMMON_FLAGS_NS                // UINT32 GTxCommonFlags
> > +    },
> > +    {
> > +      1,                                     // UINT8 GTFrameNumber
> > +      {
> > +        EFI_ACPI_RESERVED_BYTE,
> > +        EFI_ACPI_RESERVED_BYTE,
> > +        EFI_ACPI_RESERVED_BYTE
> > +      },                                     // UINT8 Reserved[3]
> > +      SGI_GT_BLOCK_FRAME1_CTL_BASE,          // UINT64 CntBaseX
> > +      SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE,      // UINT64 CntEL0BaseX
> > +      SGI_GT_BLOCK_FRAME1_GSIV,              // UINT32 GTxPhysicalTimerGSIV
> > +      SGI_GTX_TIMER_FLAGS,                   // UINT32 GTxPhysicalTimerFlags
> > +      0,                                     // UINT32 GTxVirtualTimerGSIV
> > +      0,                                     // UINT32 GTxVirtualTimerFlags
> > +      SGI_GTX_COMMON_FLAGS_S                 // UINT32 GTxCommonFlags
> > +    }
> > +  },
> > +};
> > +
> > +//
> > +// Reference the table being generated to prevent the optimizer from
> > +removing the // data structure from the executable //
> > +VOID* CONST ReferenceAcpiTable = &Gtdt;
> > diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
> > b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
> > new file mode 100644
> > index 0000000..4f98120
> > --- /dev/null
> > +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
> > @@ -0,0 +1,173 @@
> > +/** @file
> > +*  Multiple APIC Description Table (MADT)
> > +*
> > +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> > +*
> > +*  This program and the accompanying materials are licensed and made
> > +available
> > +*  under the terms and conditions of the BSD License which
> > +accompanies this
> > +*  distribution.  The full text of the license may be found at
> > +*  http://opensource.org/licenses/bsd-license.php
> > +*
> > +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> > +BASIS,
> > +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> > +*
> > +**/
> > +
> > +#include "SgiPlatform.h"
> > +#include "SgiAcpiHeader.h"
> > +#include <Library/AcpiLib.h>
> > +#include <Library/ArmLib.h>
> > +#include <Library/PcdLib.h>
> > +#include <IndustryStandard/Acpi.h>
> > +
> > +#define CORES   (FixedPcdGet32 (PcdClusterCount) * \
> > +                 FixedPcdGet32 (PcdCoreCount))
> > +
> > +// EFI_ACPI_6_1_GIC_STRUCTURE
> > +#define EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr,
> Flags,      \
> > +  PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency)           \
> > +  {                                                                            \
> > +    EFI_ACPI_6_1_GIC,                     /* Type */                           \
> > +    sizeof (EFI_ACPI_6_1_GIC_STRUCTURE),  /* Length */                         \
> > +    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
> > +    GicId,                                /* CPUInterfaceNumber */             \
> > +    AcpiCpuUid,                           /* AcpiProcessorUid */               \
> > +    Flags,                                /* Flags */                          \
> > +    0,                                    /* ParkingProtocolVersion */         \
> > +    PmuIrq,                               /* PerformanceInterruptGsiv */       \
> > +    0,                                    /* ParkedAddress */                  \
> > +    GicBase,                              /* PhysicalBaseAddress */            \
> > +    GicVBase,                             /* GICV */                           \
> > +    GicHBase,                             /* GICH */                           \
> > +    GsivId,                               /* VGICMaintenanceInterrupt */       \
> > +    GicRBase,                             /* GICRBaseAddress */                \
> > +    Mpidr,                                /* MPIDR */                          \
> > +    Efficiency,                           /* ProcessorPowerEfficiencyClass */  \
> > +    {                                                                          \
> > +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[0] */                   \
> > +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[1] */                   \
> > +      EFI_ACPI_RESERVED_BYTE              /* Reserved2[2] */                   \
> > +    }                                                                          \
> > +  }
> > +
> > +// EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE
> > +#define EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase,
> \
> > +  GicDistVector, GicVersion)                                                   \
> > +  {                                                                            \
> > +    EFI_ACPI_6_1_GICD,                    /* Type */                           \
> > +    sizeof (EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE),                           \
> > +    EFI_ACPI_RESERVED_WORD,               /* Reserved1 */                      \
> > +    GicDistHwId,                          /* GicId */                          \
> > +    GicDistBase,                          /* PhysicalBaseAddress */            \
> > +    GicDistVector,                        /* SystemVectorBase */               \
> > +    GicVersion,                           /* GicVersion */                     \
> > +    {                                                                          \
> > +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[0] */                   \
> > +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[1] */                   \
> > +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[2] */                   \
> > +    }                                                                          \
> > +  }
> > +
> > +// EFI_ACPI_6_1_GICR_STRUCTURE
> > +#define EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr,
> RedisDiscLength)  \
> > +  {                                                                            \
> > +    EFI_ACPI_6_1_GICR,                    /* Type */                           \
> > +    sizeof (EFI_ACPI_6_1_GICR_STRUCTURE), /* Length */                         \
> > +    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
> > +    RedisRegionAddr,                      /* DiscoveryRangeBaseAddress */      \
> > +    RedisDiscLength                       /* DiscoveryRangeLength */           \
> > +  }
> > +
> > +// EFI_ACPI_6_1_GIC_ITS_STRUCTURE
> > +#define EFI_ACPI_6_1_GIC_ITS_INIT(GicItsId, GicItsBase)                        \
> > +  {                                                                            \
> > +    EFI_ACPI_6_1_GIC_ITS,                 /* Type */                           \
> > +    sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE),                                   \
> > +    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
> > +    GicItsId,                             /* GicItsId */                       \
> > +    GicItsBase,                           /* PhysicalBaseAddress */            \
> > +    EFI_ACPI_RESERVED_DWORD,              /* DiscoveryRangeLength */           \
> > +  }
> > +
> > +//
> > +// Multiple APIC Description Table
> > +//
> > +#pragma pack (1)
> > +
> > +typedef struct {
> > +  EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
> > +  EFI_ACPI_6_1_GIC_STRUCTURE                            GicInterfaces[CORES];
> > +  EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;
> > +  EFI_ACPI_6_1_GICR_STRUCTURE                           GicRedistributor;
> > +  EFI_ACPI_6_1_GIC_ITS_STRUCTURE                        GicIts;
> > +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
> > +
> > +#pragma pack ()
> > +
> > +STATIC EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
> > +  {
> > +    ARM_ACPI_HEADER (
> > +      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
> > +      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE,
> > +      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
> > +    ),
> > +    // MADT specific fields
> > +    0, // LocalApicAddress
> > +    0, // Flags
> > +  },
> > +  {
> > +    // Format: EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid,
> Mpidr, Flags,
> > +    //                                          PmuIrq, GicBase, GicVBase,
> > +    //                                          GicHBase, GsivId, GicRBase,
> > +    //                                          Efficiency)
> > +    // Note: The GIC Structure of the primary CPU must be the first entry
> > +    // (see note in 5.2.12.14 GICC Structure of ACPI v6.1).
> > +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-0
> > +      0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_1_GIC_ENABLED, 23,
> > +      FixedPcdGet32 (PcdGicDistributorBase),
> > +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> > +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-1
> > +      0, 1, GET_MPID(0x0, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
> > +      FixedPcdGet32 (PcdGicDistributorBase),
> > +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> > +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-2
> > +      0, 2, GET_MPID(0x0, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
> > +      FixedPcdGet32 (PcdGicDistributorBase),
> > +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> > +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-3
> > +      0, 3, GET_MPID(0x0, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
> > +      FixedPcdGet32 (PcdGicDistributorBase),
> > +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency
> > +*/),
> > +
> > +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-4
> > +      0, 4, GET_MPID(0x100, 0x00), EFI_ACPI_6_1_GIC_ENABLED, 23,
> > +      FixedPcdGet32 (PcdGicDistributorBase),
> > +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> > +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-5
> > +      0, 5, GET_MPID(0x100, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
> > +      FixedPcdGet32 (PcdGicDistributorBase),
> > +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> > +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-6
> > +      0, 6, GET_MPID(0x100, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
> > +      FixedPcdGet32 (PcdGicDistributorBase),
> > +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
> > +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-7
> > +      0, 7, GET_MPID(0x100, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
> > +      FixedPcdGet32 (PcdGicDistributorBase),
> > +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency
> > +*/),
> > +  },
> > +  // GIC Distributor Entry
> > +  EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32
> (PcdGicDistributorBase),
> > +                                    0, 3),
> > +  // GIC Redistributor
> > +  EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32
> (PcdGicRedistributorsBase),
> > +                                      SIZE_1MB),
> > +  // GIC ITS
> > +  EFI_ACPI_6_1_GIC_ITS_INIT(0, 0x30040000), };
> > +
> > +//
> > +// Reference the table being generated to prevent the optimizer from
> > +removing // the data structure from the executable //
> > +VOID* CONST ReferenceAcpiTable = &Madt;
> > diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
> > b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
> > new file mode 100644
> > index 0000000..10eaf27
> > --- /dev/null
> > +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
> > @@ -0,0 +1,77 @@
> > +/** @file
> > +*  Serial Port Console Redirection Table (SPCR)
> > +*
> > +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> > +*
> > +*  This program and the accompanying materials are licensed and made
> > +available
> > +*  under the terms and conditions of the BSD License which
> > +accompanies this
> > +*  distribution.  The full text of the license may be found at
> > +*  http://opensource.org/licenses/bsd-license.php
> > +*
> > +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> > +BASIS,
> > +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> > +*
> > +**/
> > +
> > +#include "SgiAcpiHeader.h"
> > +#include <Library/AcpiLib.h>
> > +#include <IndustryStandard/Acpi61.h>
> > +#include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
> > +
> > +STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
> > +  ARM_ACPI_HEADER (
> > +
> EFI_ACPI_6_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
> > +    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE,
> > +    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
> > +  ),
> > +  // UINT8                                   InterfaceType;
> > +
> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_AR
> M_PL011_UART,
> > +  // UINT8                                   Reserved1[3];
> > +  {
> > +    EFI_ACPI_RESERVED_BYTE,
> > +    EFI_ACPI_RESERVED_BYTE,
> > +    EFI_ACPI_RESERVED_BYTE
> > +  },
> > +  // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE  BaseAddress;
> > +  ARM_GAS32 (0x7FF80000),
> > +  // UINT8                                   InterruptType;
> > +
> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GI
> C,
> > +  // UINT8                                   Irq;
> > +  0,
> > +  // UINT32                                  GlobalSystemInterrupt;
> > +  FixedPcdGet32 (PL011UartInterrupt),
> > +  // UINT8                                   BaudRate;
> > +
> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200,
> > +  // UINT8                                   Parity;
> > +
> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY,
> > +  // UINT8                                   StopBits;
> > +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1,
> > +  // UINT8                                   FlowControl;
> > +  0,
> > +  // UINT8                                   TerminalType;
> > +
> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_AN
> SI,
> > +  // UINT8                                   Reserved2;
> > +  EFI_ACPI_RESERVED_BYTE,
> > +  // UINT16                                  PciDeviceId;
> > +  0xFFFF,
> > +  // UINT16                                  PciVendorId;
> > +  0xFFFF,
> > +  // UINT8                                   PciBusNumber;
> > +  0x00,
> > +  // UINT8                                   PciDeviceNumber;
> > +  0x00,
> > +  // UINT8                                   PciFunctionNumber;
> > +  0x00,
> > +  // UINT32                                  PciFlags;
> > +  0x00000000,
> > +  // UINT8                                   PciSegment;
> > +  0x00,
> > +  // UINT32                                  Reserved3;
> > +  EFI_ACPI_RESERVED_DWORD
> > +};
> > +
> > +//
> > +// Reference the table being generated to prevent the optimizer from
> > +removing the // data structure from the executable //
> > +VOID* CONST ReferenceAcpiTable = &Spcr;
> > diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> > b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> > index fb1e390..4c956f4 100644
> > --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> > +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> > @@ -12,6 +12,7 @@
> >  *
> >  **/
> >
> > +#include <Library/AcpiLib.h>
> >  #include <Library/DebugLib.h>
> >
> >  EFI_STATUS
> > @@ -28,6 +29,12 @@ ArmSgiPkgEntryPoint (  {
> >    EFI_STATUS              Status;
> >
> > +  Status = LocateAndInstallAcpiFromFv (&gSgi575AcpiTablesiFileGuid);
> > + if (EFI_ERROR (Status)) {
> > +    DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install ACPI tables\n"));
> > +    return Status;
> > +  }
> > +
> >    // Install Virtio Block IO.
> >    if (FeaturePcdGet (PcdVirtioSupported) == TRUE) {
> >      Status = InitVirtioBlockIo (ImageHandle); diff --git
> > a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> > b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> > new file mode 100644
> > index 0000000..870ffe9
> > --- /dev/null
> > +++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> > @@ -0,0 +1,41 @@
> > +/** @file
> > +*
> > +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> > +*
> > +*  This program and the accompanying materials are licensed and made
> > +available
> > +*  under the terms and conditions of the BSD License which
> > +accompanies this
> > +*  distribution. The full text of the license may be found at
> > +*  http://opensource.org/licenses/bsd-license.php
> > +*
> > +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> > +BASIS,
> > +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> > +*
> > +**/
> > +
> > +#ifndef __SGI_ACPI_HEADER__
> > +#define __SGI_ACPI_HEADER__
> > +
> > +//
> > +// ACPI table information used to initialize tables.
> > +//
> > +#define EFI_ACPI_ARM_OEM_ID           'A','R','M','L','T','D'   // OEMID 6 bytes
> long
> > +#define EFI_ACPI_ARM_OEM_TABLE_ID
> SIGNATURE_64('E','N','T','P','L','A','T','F') // OEM table id 8 bytes long
> > +#define EFI_ACPI_ARM_OEM_REVISION     0x20140727
> > +#define EFI_ACPI_ARM_CREATOR_ID       SIGNATURE_32('A','R','M',' ')
> > +#define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099
> > +
> > +// A macro to initialise the common header part of EFI ACPI tables as
> > +defined by // EFI_ACPI_DESCRIPTION_HEADER structure.
> > +#define ARM_ACPI_HEADER(Signature, Type, Revision) {             \
> > +    Signature,                      /* UINT32  Signature */       \
> > +    sizeof (Type),                  /* UINT32  Length */          \
> > +    Revision,                       /* UINT8   Revision */        \
> > +    0,                              /* UINT8   Checksum */        \
> > +    { EFI_ACPI_ARM_OEM_ID },        /* UINT8   OemId[6] */        \
> > +    EFI_ACPI_ARM_OEM_TABLE_ID,      /* UINT64  OemTableId */      \
> > +    EFI_ACPI_ARM_OEM_REVISION,      /* UINT32  OemRevision */     \
> > +    EFI_ACPI_ARM_CREATOR_ID,        /* UINT32  CreatorId */       \
> > +    EFI_ACPI_ARM_CREATOR_REVISION   /* UINT32  CreatorRevision */ \
> > +  }
> > +
> > +#endif /* __SGI_ACPI_HEADER__ */
> > --
> > 2.7.4
> >
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

Re: [PATCH edk2-platforms v4 5/9] Platform/ARM/Sgi: add the initial set of acpi tables

[Thomas Abraham]

On Mon, May 21, 2018 at 2:36 PM, Ard Biesheuvel
<ard.biesheuvel@linaro.org> wrote:
> On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
>> From: Daniil Egranov <daniil.egranov@arm.com>
>>
>> Add the initial version of Acpi tables for the SGI-575 platform which
>> is required to boot the linux kernel up to a busybox prompt.
>>
>
> Please drop these references to linux or busybox.
>
> If this collection of ACPI tables represents some specified minimum
> (SBBR?), we should mention that. If anything is missing in that
> respect, please add it instead.

Okay.

>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
>> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
>> ---
>>  .../ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf    |  53 +++++++
>>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc    |  90 +++++++++++
>>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl     |  99 ++++++++++++
>>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc    |  87 +++++++++++
>>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc    | 123 +++++++++++++++
>>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc    | 173 +++++++++++++++++++++
>>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc    |  77 +++++++++
>>  .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   |   7 +
>>  Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h        |  41 +++++
>>  9 files changed, 750 insertions(+)
>>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
>>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
>>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
>>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
>>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
>>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
>>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
>>  create mode 100644 Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
>>
>> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
>> new file mode 100644
>> index 0000000..2c9bd98
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
>> @@ -0,0 +1,53 @@
>> +## @file
>> +#  ACPI table data and ASL sources required to boot the platform.
>> +#
>> +#  Copyright (c) 2018, ARM Ltd. All rights reserved.
>> +#
>> +#  This program and the accompanying materials are licensed and made available
>> +#  under the terms and conditions of the BSD License which accompanies this
>> +#  distribution.  The full text of the license may be found at
>> +#  http://opensource.org/licenses/bsd-license.php
>> +#
>> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +##
>> +
>> +[Defines]
>> +  INF_VERSION                    = 0x0001001A
>> +  BASE_NAME                      = Sgi575AcpiTables
>> +  FILE_GUID                      = c712719a-0aaf-438c-9cdd-35ab4d60207d  # gSgi575AcpiTablesiFileGuid
>> +  MODULE_TYPE                    = USER_DEFINED
>> +  VERSION_STRING                 = 1.0
>> +
>> +[Sources]
>> +  Dbg2.aslc
>> +  Dsdt.asl
>> +  Fadt.aslc
>> +  Gtdt.aslc
>> +  Madt.aslc
>> +  Spcr.aslc
>> +
>> +[Packages]
>> +  ArmPkg/ArmPkg.dec
>> +  ArmPlatformPkg/ArmPlatformPkg.dec
>> +  EmbeddedPkg/EmbeddedPkg.dec
>> +  MdeModulePkg/MdeModulePkg.dec
>> +  MdePkg/MdePkg.dec
>> +  Platform/ARM/SgiPkg/SgiPlatform.dec
>> +  Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
>> +
>
> Do you really need all these packages?

Not all, will clean it up.

>
>> +[FixedPcd]
>> +  gArmPlatformTokenSpaceGuid.PcdCoreCount
>> +  gArmPlatformTokenSpaceGuid.PcdClusterCount
>> +  gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
>> +  gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
>> +  gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
>> +  gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
>> +  gArmTokenSpaceGuid.PcdGicDistributorBase
>> +  gArmTokenSpaceGuid.PcdGicRedistributorsBase
>> +
>> +  gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
>> +  gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
>> +  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
>> +  gArmPlatformTokenSpaceGuid.PL011UartInterrupt
>> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
>> new file mode 100644
>> index 0000000..ed671f3
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
>> @@ -0,0 +1,90 @@
>> +/** @file
>> +*  Debug Port Table 2 (DBG2)
>> +*
>> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
>> +*
>> +*  This program and the accompanying materials are licensed and made available
>> +*  under the terms and conditions of the BSD License which accompanies this
>> +*  distribution. The full text of the license may be found at
>> +*  http://opensource.org/licenses/bsd-license.php
>> +*
>> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#include "SgiAcpiHeader.h"
>> +#include <Library/AcpiLib.h>
>> +#include <IndustryStandard/Acpi61.h>
>> +#include <IndustryStandard/DebugPort2Table.h>
>> +
>> +#define SGI_DBG2_NUM_DEBUG_PORTS           1
>> +#define SGI_DBG2_NUM_GAS                   1
>> +#define SGI_DBG2_NS_STR_LENGTH             8
>> +#define SGI_PL011_REGISTER_SPACE           0x1000
>> +
>> +#define NAME_STR_UART1     {'C', 'O', 'M', '1', '\0', '\0', '\0', '\0'}
>> +
>> +#pragma pack(1)
>> +
>> +typedef struct {
>> +  EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
>> +  EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE        BaseAddressRegister;
>> +  UINT32                                        AddressSize;
>> +  UINT8                                         NameSpaceString[SGI_DBG2_NS_STR_LENGTH];
>> +} DBG2_DEBUG_DEVICE_INFORMATION;
>> +
>> +typedef struct {
>> +  EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE       Description;
>> +  DBG2_DEBUG_DEVICE_INFORMATION                 Dbg2DeviceInfo[SGI_DBG2_NUM_DEBUG_PORTS];
>> +} DBG2_TABLE;
>> +
>> +#pragma pack()
>> +
>> +#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) {                                  \
>> +  {                                                                                                                 \
>> +    EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION,         /* UINT8     Revision */                        \
>> +    sizeof (DBG2_DEBUG_DEVICE_INFORMATION),                         /* UINT16    Length */                          \
>> +    NumReg,                                                         /* UINT8     NumberofGenericAddressRegisters */ \
>> +    SGI_DBG2_NS_STR_LENGTH,                                         /* UINT16    NameSpaceStringLength */           \
>> +    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString),     /* UINT16    NameSpaceStringOffset */           \
>> +    0,                                                              /* UINT16    OemDataLength */                   \
>> +    0,                                                              /* UINT16    OemDataOffset */                   \
>> +    EFI_ACPI_DBG2_PORT_TYPE_SERIAL,                                 /* UINT16    Port Type */                       \
>> +    SubType,                                                        /* UINT16    Port Subtype */                    \
>> +    { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE },             /* UINT8     Reserved[2] */                     \
>> +    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UINT16    BaseAddressRegister Offset */      \
>> +    OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize)          /* UINT16    AddressSize Offset */              \
>> +  },                                                                                                                \
>> +  ARM_GAS32 (UartBase),                            /* EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
>> +  UartAddrLen,                                     /* UINT32  AddressSize */                                        \
>> +  UartNameStr                                      /* UINT8   NameSpaceString[MAX_DBG2_NAME_LEN] */                 \
>> +}
>> +
>> +STATIC DBG2_TABLE Dbg2 = {
>> +  {
>> +    ARM_ACPI_HEADER (
>> +      EFI_ACPI_6_1_DEBUG_PORT_2_TABLE_SIGNATURE,
>> +      DBG2_TABLE,
>> +      EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
>> +    ),
>> +    OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
>> +    SGI_DBG2_NUM_DEBUG_PORTS
>> +  },
>> +  {
>> +    // Kernel Debug Port
>> +    DBG2_DEBUG_PORT_DDI (
>> +      SGI_DBG2_NUM_GAS,
>> +      EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART,
>> +      FixedPcdGet64 (PcdSerialDbgRegisterBase),
>> +      SGI_PL011_REGISTER_SPACE,
>> +      NAME_STR_UART1
>> +    ),
>> +  }
>> +};
>> +
>> +//
>> +// Reference the table being generated to prevent the optimizer from removing
>> +// the data structure from the executable
>> +//
>> +VOID* CONST ReferenceAcpiTable = &Dbg2;
>> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
>> new file mode 100644
>> index 0000000..ceeac5f
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
>> @@ -0,0 +1,99 @@
>> +/** @file
>> +*  Differentiated System Description Table Fields (DSDT)
>> +*
>> +*  Copyright (c) 2018, ARM Ltd. All rights reserved.
>> +*
>> +*  This program and the accompanying materials are licensed and made available
>> +*  under the terms and conditions of the BSD License which accompanies this
>> +*  distribution.  The full text of the license may be found at
>> +*  http://opensource.org/licenses/bsd-license.php
>> +*
>> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#include "SgiPlatform.h"
>> +#include "SgiAcpiHeader.h"
>> +
>> +DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-SGI575", EFI_ACPI_ARM_OEM_REVISION) {
>> +  Scope(_SB) {
>> +
>> +    Device(CP00) { // A75-0: Cluster 0, Cpu 0
>> +      Name(_HID, "ACPI0007")
>> +      Name(_UID, 0)
>> +      Name(_STA, 0xF)
>> +    }
>> +
>> +    Device(CP01) { // A75-0: Cluster 0, Cpu 1
>> +      Name(_HID, "ACPI0007")
>> +      Name(_UID, 1)
>> +      Name(_STA, 0xF)
>> +    }
>> +
>> +    Device(CP02) { // A75-0: Cluster 0, Cpu 2
>> +      Name(_HID, "ACPI0007")
>> +      Name(_UID, 2)
>> +      Name(_STA, 0xF)
>> +    }
>> +
>> +    Device(CP03) { // A75-0: Cluster 0, Cpu 3
>> +      Name(_HID, "ACPI0007")
>> +      Name(_UID, 3)
>> +      Name(_STA, 0xF)
>> +    }
>> +
>> +    Device(CP04) { // A75-0: Cluster 1, Cpu 0
>> +      Name(_HID, "ACPI0007")
>> +      Name(_UID, 4)
>> +      Name(_STA, 0xF)
>> +    }
>> +
>> +    Device(CP05) { // A75-0: Cluster 1, Cpu 1
>> +      Name(_HID, "ACPI0007")
>> +      Name(_UID, 5)
>> +      Name(_STA, 0xF)
>> +    }
>> +
>> +    Device(CP06) { // A75-0: Cluster 1, Cpu 2
>> +      Name(_HID, "ACPI0007")
>> +      Name(_UID, 6)
>> +      Name(_STA, 0xF)
>> +    }
>> +
>> +    Device(CP07) { // A75-0: Cluster 1, Cpu 3
>> +      Name(_HID, "ACPI0007")
>> +      Name(_UID, 7)
>> +      Name(_STA, 0xF)
>> +    }
>> +
>> +    // UART PL011
>> +    Device(COM0) {
>> +      Name(_HID, "ARMH0011")
>> +      Name(_CID, "ARMH0011")
>> +      Name(_UID, Zero)
>> +      Name(_STA, 0xF)
>> +      Name(_CRS, ResourceTemplate() {
>> +        Memory32Fixed(ReadWrite, 0x7FF80000, 0x1000)
>> +        Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }
>> +      })
>> +    }
>> +
>> +    // SMSC 91C111
>> +    Device(ETH0) {
>> +      Name(_HID, "LNRO0003")
>> +      Name(_UID, Zero)
>> +      Name(_STA, 0xF)
>> +      Name(_CRS, ResourceTemplate() {
>> +            Memory32Fixed(ReadWrite, 0x18000000, 0x1000)
>> +            Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }
>> +      })
>> +      Name(_DSD, Package() {
>> +                 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
>> +                     Package() {
>> +                     Package(2) {"reg-io-width", 4 },
>> +                    }
>> +      })
>> +    }
>> +  } // Scope(_SB)
>> +}
>> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
>> new file mode 100644
>> index 0000000..ed96298
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
>> @@ -0,0 +1,87 @@
>> +/** @file
>> +*  Fixed ACPI Description Table (FADT)
>> +*
>> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
>> +*
>> +*  This program and the accompanying materials are licensed and made available
>> +*  under the terms and conditions of the BSD License which accompanies this
>> +*  distribution.  The full text of the license may be found at
>> +*  http://opensource.org/licenses/bsd-license.php
>> +*
>> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#include "SgiAcpiHeader.h"
>> +#include <Library/AcpiLib.h>
>> +#include <IndustryStandard/Acpi.h>
>> +
>> +STATIC EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
>> +  ARM_ACPI_HEADER (
>> +    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
>> +    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE,
>> +    EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
>> +  ),
>> +  0,                                                                        // UINT32     FirmwareCtrl
>> +  0,                                                                        // UINT32     Dsdt
>> +  EFI_ACPI_RESERVED_BYTE,                                                   // UINT8      Reserved0
>> +  EFI_ACPI_6_1_PM_PROFILE_ENTERPRISE_SERVER,                                // UINT8      PreferredPmProfile
>> +  0,                                                                        // UINT16     SciInt
>> +  0,                                                                        // UINT32     SmiCmd
>> +  0,                                                                        // UINT8      AcpiEnable
>> +  0,                                                                        // UINT8      AcpiDisable
>> +  0,                                                                        // UINT8      S4BiosReq
>> +  0,                                                                        // UINT8      PstateCnt
>> +  0,                                                                        // UINT32     Pm1aEvtBlk
>> +  0,                                                                        // UINT32     Pm1bEvtBlk
>> +  0,                                                                        // UINT32     Pm1aCntBlk
>> +  0,                                                                        // UINT32     Pm1bCntBlk
>> +  0,                                                                        // UINT32     Pm2CntBlk
>> +  0,                                                                        // UINT32     PmTmrBlk
>> +  0,                                                                        // UINT32     Gpe0Blk
>> +  0,                                                                        // UINT32     Gpe1Blk
>> +  0,                                                                        // UINT8      Pm1EvtLen
>> +  0,                                                                        // UINT8      Pm1CntLen
>> +  0,                                                                        // UINT8      Pm2CntLen
>> +  0,                                                                        // UINT8      PmTmrLen
>> +  0,                                                                        // UINT8      Gpe0BlkLen
>> +  0,                                                                        // UINT8      Gpe1BlkLen
>> +  0,                                                                        // UINT8      Gpe1Base
>> +  0,                                                                        // UINT8      CstCnt
>> +  0,                                                                        // UINT16     PLvl2Lat
>> +  0,                                                                        // UINT16     PLvl3Lat
>> +  0,                                                                        // UINT16     FlushSize
>> +  0,                                                                        // UINT16     FlushStride
>> +  0,                                                                        // UINT8      DutyOffset
>> +  0,                                                                        // UINT8      DutyWidth
>> +  0,                                                                        // UINT8      DayAlrm
>> +  0,                                                                        // UINT8      MonAlrm
>> +  0,                                                                        // UINT8      Century
>> +  0,                                                                        // UINT16     IaPcBootArch
>> +  0,                                                                        // UINT8      Reserved1
>> +  EFI_ACPI_6_1_HW_REDUCED_ACPI | EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE,    // UINT32     Flags
>> +  NULL_GAS,                                                                 // GAS        ResetReg
>> +  0,                                                                        // UINT8      ResetValue
>> +  EFI_ACPI_6_1_ARM_PSCI_COMPLIANT,                                          // UINT16     ArmBootArchFlags
>> +  EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION,                 // UINT8      MinorRevision
>> +  0,                                                                        // UINT64     XFirmwareCtrl
>> +  0,                                                                        // UINT64     XDsdt
>> +  NULL_GAS,                                                                 // GAS        XPm1aEvtBlk
>> +  NULL_GAS,                                                                 // GAS        XPm1bEvtBlk
>> +  NULL_GAS,                                                                 // GAS        XPm1aCntBlk
>> +  NULL_GAS,                                                                 // GAS        XPm1bCntBlk
>> +  NULL_GAS,                                                                 // GAS        XPm2CntBlk
>> +  NULL_GAS,                                                                 // GAS        XPmTmrBlk
>> +  NULL_GAS,                                                                 // GAS        XGpe0Blk
>> +  NULL_GAS,                                                                 // GAS        XGpe1Blk
>> +  NULL_GAS,                                                                 // GAS        SleepControlReg
>> +  NULL_GAS,                                                                 // GAS        SleepStatusReg
>> +  0                                                                         // UINT64     HypervisorVendorIdentity;
>> +};
>> +
>> +//
>> +// Reference the table being generated to prevent the optimizer from removing the
>> +// data structure from the executable
>> +//
>> +VOID* CONST ReferenceAcpiTable = &Fadt;
>> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
>> new file mode 100644
>> index 0000000..862a960
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
>> @@ -0,0 +1,123 @@
>> +/** @file
>> +*  Generic Timer Description Table (GTDT)
>> +*
>> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
>> +*
>> +*  This program and the accompanying materials are licensed and made available
>> +*  under the terms and conditions of the BSD License which accompanies this
>> +*  distribution.  The full text of the license may be found at
>> +*  http://opensource.org/licenses/bsd-license.php
>> +*
>> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#include "SgiAcpiHeader.h"
>> +#include <Library/AcpiLib.h>
>> +#include <Library/PcdLib.h>
>> +#include <IndustryStandard/Acpi61.h>
>> +
>> +#define SGI_PLATFORM_WATCHDOG_COUNT       2
>> +#define SGI_TIMER_FRAMES_COUNT            2
>> +
>> +#define SYSTEM_TIMER_BASE_ADDRESS         0xFFFFFFFFFFFFFFFF
>> +#define GTDT_GLOBAL_FLAGS                 0
>> +#define GTDT_GTIMER_FLAGS                 EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
>> +
>> +#define SGI_GT_BLOCK_CTL_BASE             0x2A810000
>> +#define SGI_GT_BLOCK_FRAME1_CTL_BASE      0x2A820000
>> +#define SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE  0xFFFFFFFFFFFFFFFF
>> +#define SGI_GT_BLOCK_FRAME1_GSIV          0x5B
>> +
>> +#define SGI_GT_BLOCK_FRAME0_CTL_BASE      0x2A830000
>> +#define SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE  0xFFFFFFFFFFFFFFFF
>> +#define SGI_GT_BLOCK_FRAME0_GSIV          0x5C
>> +
>
> Alexei, could you comment on this part as well please?
>
>> +#define SGI_GTX_TIMER_FLAGS               0
>> +#define GTX_TIMER_SECURE                  EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER
>> +#define GTX_TIMER_NON_SECURE              0
>> +#define GTX_TIMER_SAVE_CONTEXT            EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY
>> +#define SGI_GTX_COMMON_FLAGS_S            (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_SECURE)
>> +#define SGI_GTX_COMMON_FLAGS_NS           (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_NON_SECURE)
>> +
>> +#pragma pack (1)
>> +
>> +typedef struct {
>> +  EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE    Gtdt;
>> +  EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE            GtBlock;
>> +  EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE      Frames[SGI_TIMER_FRAMES_COUNT];
>> +} EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES;
>> +
>> +#pragma pack ()
>> +
>> +STATIC EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
>> +  {
>> +    ARM_ACPI_HEADER (
>> +      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
>> +      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES,
>> +      EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
>> +    ),
>> +    SYSTEM_TIMER_BASE_ADDRESS,                    // UINT64  PhysicalAddress
>> +    0,                                            // UINT32  Reserved
>> +    FixedPcdGet32 (PcdArmArchTimerSecIntrNum),    // UINT32  SecurePL1TimerGSIV
>> +    GTDT_GTIMER_FLAGS,                            // UINT32  SecurePL1TimerFlags
>> +    FixedPcdGet32 (PcdArmArchTimerIntrNum),       // UINT32  NonSecurePL1TimerGSIV
>> +    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL1TimerFlags
>> +    FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),   // UINT32  VirtualTimerGSIV
>> +    GTDT_GTIMER_FLAGS,                            // UINT32  VirtualTimerFlags
>> +    FixedPcdGet32 (PcdArmArchTimerHypIntrNum),    // UINT32  NonSecurePL2TimerGSIV
>> +    GTDT_GTIMER_FLAGS,                            // UINT32  NonSecurePL2TimerFlags
>> +    0xFFFFFFFFFFFFFFFF,                           // UINT64  CntReadBasePhysicalAddress
>> +    SGI_PLATFORM_WATCHDOG_COUNT,                  // UINT32  PlatformTimerCount
>> +    sizeof (EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 PlatfromTimerOffset
>> +  },
>> +  {
>> +    EFI_ACPI_6_1_GTDT_GT_BLOCK,                           // UINT8 Type
>> +    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE) +        // UINT16 Length
>> +    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE) *
>> +    SGI_TIMER_FRAMES_COUNT,
>> +    EFI_ACPI_RESERVED_BYTE,                               // UINT8 Reserved
>> +    SGI_GT_BLOCK_CTL_BASE,                                // UINT64 CntCtlBase
>> +    SGI_TIMER_FRAMES_COUNT,                               // UINT32 GTBlockTimerCount
>> +    sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE)          // UINT32 GTBlockTimerOffset
>> +  },
>> +  {
>> +    {
>> +      0,                                     // UINT8 GTFrameNumber
>> +      {
>> +        EFI_ACPI_RESERVED_BYTE,
>> +        EFI_ACPI_RESERVED_BYTE,
>> +        EFI_ACPI_RESERVED_BYTE
>> +      },                                     // UINT8 Reserved[3]
>> +      SGI_GT_BLOCK_FRAME0_CTL_BASE,          // UINT64 CntBaseX
>> +      SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE,      // UINT64 CntEL0BaseX
>> +      SGI_GT_BLOCK_FRAME0_GSIV,              // UINT32 GTxPhysicalTimerGSIV
>> +      SGI_GTX_TIMER_FLAGS,                   // UINT32 GTxPhysicalTimerFlags
>> +      0,                                     // UINT32 GTxVirtualTimerGSIV
>> +      0,                                     // UINT32 GTxVirtualTimerFlags
>> +      SGI_GTX_COMMON_FLAGS_NS                // UINT32 GTxCommonFlags
>> +    },
>> +    {
>> +      1,                                     // UINT8 GTFrameNumber
>> +      {
>> +        EFI_ACPI_RESERVED_BYTE,
>> +        EFI_ACPI_RESERVED_BYTE,
>> +        EFI_ACPI_RESERVED_BYTE
>> +      },                                     // UINT8 Reserved[3]
>> +      SGI_GT_BLOCK_FRAME1_CTL_BASE,          // UINT64 CntBaseX
>> +      SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE,      // UINT64 CntEL0BaseX
>> +      SGI_GT_BLOCK_FRAME1_GSIV,              // UINT32 GTxPhysicalTimerGSIV
>> +      SGI_GTX_TIMER_FLAGS,                   // UINT32 GTxPhysicalTimerFlags
>> +      0,                                     // UINT32 GTxVirtualTimerGSIV
>> +      0,                                     // UINT32 GTxVirtualTimerFlags
>> +      SGI_GTX_COMMON_FLAGS_S                 // UINT32 GTxCommonFlags
>> +    }
>> +  },
>> +};
>> +
>> +//
>> +// Reference the table being generated to prevent the optimizer from removing the
>> +// data structure from the executable
>> +//
>> +VOID* CONST ReferenceAcpiTable = &Gtdt;
>> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
>> new file mode 100644
>> index 0000000..4f98120
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
>> @@ -0,0 +1,173 @@
>> +/** @file
>> +*  Multiple APIC Description Table (MADT)
>> +*
>> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
>> +*
>> +*  This program and the accompanying materials are licensed and made available
>> +*  under the terms and conditions of the BSD License which accompanies this
>> +*  distribution.  The full text of the license may be found at
>> +*  http://opensource.org/licenses/bsd-license.php
>> +*
>> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#include "SgiPlatform.h"
>> +#include "SgiAcpiHeader.h"
>> +#include <Library/AcpiLib.h>
>> +#include <Library/ArmLib.h>
>> +#include <Library/PcdLib.h>
>> +#include <IndustryStandard/Acpi.h>
>> +
>> +#define CORES   (FixedPcdGet32 (PcdClusterCount) * \
>> +                 FixedPcdGet32 (PcdCoreCount))
>> +
>> +// EFI_ACPI_6_1_GIC_STRUCTURE
>> +#define EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,      \
>> +  PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency)           \
>> +  {                                                                            \
>> +    EFI_ACPI_6_1_GIC,                     /* Type */                           \
>> +    sizeof (EFI_ACPI_6_1_GIC_STRUCTURE),  /* Length */                         \
>> +    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
>> +    GicId,                                /* CPUInterfaceNumber */             \
>> +    AcpiCpuUid,                           /* AcpiProcessorUid */               \
>> +    Flags,                                /* Flags */                          \
>> +    0,                                    /* ParkingProtocolVersion */         \
>> +    PmuIrq,                               /* PerformanceInterruptGsiv */       \
>> +    0,                                    /* ParkedAddress */                  \
>> +    GicBase,                              /* PhysicalBaseAddress */            \
>> +    GicVBase,                             /* GICV */                           \
>> +    GicHBase,                             /* GICH */                           \
>> +    GsivId,                               /* VGICMaintenanceInterrupt */       \
>> +    GicRBase,                             /* GICRBaseAddress */                \
>> +    Mpidr,                                /* MPIDR */                          \
>> +    Efficiency,                           /* ProcessorPowerEfficiencyClass */  \
>> +    {                                                                          \
>> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[0] */                   \
>> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[1] */                   \
>> +      EFI_ACPI_RESERVED_BYTE              /* Reserved2[2] */                   \
>> +    }                                                                          \
>> +  }
>> +
>> +// EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE
>> +#define EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase,            \
>> +  GicDistVector, GicVersion)                                                   \
>> +  {                                                                            \
>> +    EFI_ACPI_6_1_GICD,                    /* Type */                           \
>> +    sizeof (EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE),                           \
>> +    EFI_ACPI_RESERVED_WORD,               /* Reserved1 */                      \
>> +    GicDistHwId,                          /* GicId */                          \
>> +    GicDistBase,                          /* PhysicalBaseAddress */            \
>> +    GicDistVector,                        /* SystemVectorBase */               \
>> +    GicVersion,                           /* GicVersion */                     \
>> +    {                                                                          \
>> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[0] */                   \
>> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[1] */                   \
>> +      EFI_ACPI_RESERVED_BYTE,             /* Reserved2[2] */                   \
>> +    }                                                                          \
>> +  }
>> +
>> +// EFI_ACPI_6_1_GICR_STRUCTURE
>> +#define EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength)  \
>> +  {                                                                            \
>> +    EFI_ACPI_6_1_GICR,                    /* Type */                           \
>> +    sizeof (EFI_ACPI_6_1_GICR_STRUCTURE), /* Length */                         \
>> +    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
>> +    RedisRegionAddr,                      /* DiscoveryRangeBaseAddress */      \
>> +    RedisDiscLength                       /* DiscoveryRangeLength */           \
>> +  }
>> +
>> +// EFI_ACPI_6_1_GIC_ITS_STRUCTURE
>> +#define EFI_ACPI_6_1_GIC_ITS_INIT(GicItsId, GicItsBase)                        \
>> +  {                                                                            \
>> +    EFI_ACPI_6_1_GIC_ITS,                 /* Type */                           \
>> +    sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE),                                   \
>> +    EFI_ACPI_RESERVED_WORD,               /* Reserved */                       \
>> +    GicItsId,                             /* GicItsId */                       \
>> +    GicItsBase,                           /* PhysicalBaseAddress */            \
>> +    EFI_ACPI_RESERVED_DWORD,              /* DiscoveryRangeLength */           \
>> +  }
>> +
>> +//
>> +// Multiple APIC Description Table
>> +//
>> +#pragma pack (1)
>> +
>> +typedef struct {
>> +  EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
>> +  EFI_ACPI_6_1_GIC_STRUCTURE                            GicInterfaces[CORES];
>> +  EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;
>> +  EFI_ACPI_6_1_GICR_STRUCTURE                           GicRedistributor;
>> +  EFI_ACPI_6_1_GIC_ITS_STRUCTURE                        GicIts;
>> +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
>> +
>> +#pragma pack ()
>> +
>> +STATIC EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
>> +  {
>> +    ARM_ACPI_HEADER (
>> +      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
>> +      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE,
>> +      EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
>> +    ),
>> +    // MADT specific fields
>> +    0, // LocalApicAddress
>> +    0, // Flags
>> +  },
>> +  {
>> +    // Format: EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
>> +    //                                          PmuIrq, GicBase, GicVBase,
>> +    //                                          GicHBase, GsivId, GicRBase,
>> +    //                                          Efficiency)
>> +    // Note: The GIC Structure of the primary CPU must be the first entry
>> +    // (see note in 5.2.12.14 GICC Structure of ACPI v6.1).
>> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-0
>> +      0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_1_GIC_ENABLED, 23,
>> +      FixedPcdGet32 (PcdGicDistributorBase),
>> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
>> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-1
>> +      0, 1, GET_MPID(0x0, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
>> +      FixedPcdGet32 (PcdGicDistributorBase),
>> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
>> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-2
>> +      0, 2, GET_MPID(0x0, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
>> +      FixedPcdGet32 (PcdGicDistributorBase),
>> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
>> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-3
>> +      0, 3, GET_MPID(0x0, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
>> +      FixedPcdGet32 (PcdGicDistributorBase),
>> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
>> +
>> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-4
>> +      0, 4, GET_MPID(0x100, 0x00), EFI_ACPI_6_1_GIC_ENABLED, 23,
>> +      FixedPcdGet32 (PcdGicDistributorBase),
>> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
>> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-5
>> +      0, 5, GET_MPID(0x100, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
>> +      FixedPcdGet32 (PcdGicDistributorBase),
>> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
>> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-6
>> +      0, 6, GET_MPID(0x100, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
>> +      FixedPcdGet32 (PcdGicDistributorBase),
>> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
>> +    EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-7
>> +      0, 7, GET_MPID(0x100, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
>> +      FixedPcdGet32 (PcdGicDistributorBase),
>> +      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
>> +  },
>> +  // GIC Distributor Entry
>> +  EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
>> +                                    0, 3),
>> +  // GIC Redistributor
>> +  EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase),
>> +                                      SIZE_1MB),
>> +  // GIC ITS
>> +  EFI_ACPI_6_1_GIC_ITS_INIT(0, 0x30040000),
>> +};
>> +
>> +//
>> +// Reference the table being generated to prevent the optimizer from removing
>> +// the data structure from the executable
>> +//
>> +VOID* CONST ReferenceAcpiTable = &Madt;
>> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
>> new file mode 100644
>> index 0000000..10eaf27
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
>> @@ -0,0 +1,77 @@
>> +/** @file
>> +*  Serial Port Console Redirection Table (SPCR)
>> +*
>> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
>> +*
>> +*  This program and the accompanying materials are licensed and made available
>> +*  under the terms and conditions of the BSD License which accompanies this
>> +*  distribution.  The full text of the license may be found at
>> +*  http://opensource.org/licenses/bsd-license.php
>> +*
>> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#include "SgiAcpiHeader.h"
>> +#include <Library/AcpiLib.h>
>> +#include <IndustryStandard/Acpi61.h>
>> +#include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
>> +
>> +STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
>> +  ARM_ACPI_HEADER (
>> +    EFI_ACPI_6_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
>> +    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE,
>> +    EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
>> +  ),
>> +  // UINT8                                   InterfaceType;
>> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART,
>> +  // UINT8                                   Reserved1[3];
>> +  {
>> +    EFI_ACPI_RESERVED_BYTE,
>> +    EFI_ACPI_RESERVED_BYTE,
>> +    EFI_ACPI_RESERVED_BYTE
>> +  },
>> +  // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE  BaseAddress;
>> +  ARM_GAS32 (0x7FF80000),
>> +  // UINT8                                   InterruptType;
>> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC,
>> +  // UINT8                                   Irq;
>> +  0,
>> +  // UINT32                                  GlobalSystemInterrupt;
>> +  FixedPcdGet32 (PL011UartInterrupt),
>> +  // UINT8                                   BaudRate;
>> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200,
>> +  // UINT8                                   Parity;
>> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY,
>> +  // UINT8                                   StopBits;
>> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1,
>> +  // UINT8                                   FlowControl;
>> +  0,
>> +  // UINT8                                   TerminalType;
>> +  EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_ANSI,
>> +  // UINT8                                   Reserved2;
>> +  EFI_ACPI_RESERVED_BYTE,
>> +  // UINT16                                  PciDeviceId;
>> +  0xFFFF,
>> +  // UINT16                                  PciVendorId;
>> +  0xFFFF,
>> +  // UINT8                                   PciBusNumber;
>> +  0x00,
>> +  // UINT8                                   PciDeviceNumber;
>> +  0x00,
>> +  // UINT8                                   PciFunctionNumber;
>> +  0x00,
>> +  // UINT32                                  PciFlags;
>> +  0x00000000,
>> +  // UINT8                                   PciSegment;
>> +  0x00,
>> +  // UINT32                                  Reserved3;
>> +  EFI_ACPI_RESERVED_DWORD
>> +};
>> +
>> +//
>> +// Reference the table being generated to prevent the optimizer from removing the
>> +// data structure from the executable
>> +//
>> +VOID* CONST ReferenceAcpiTable = &Spcr;
>> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>> index fb1e390..4c956f4 100644
>> --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>> @@ -12,6 +12,7 @@
>>  *
>>  **/
>>
>> +#include <Library/AcpiLib.h>
>>  #include <Library/DebugLib.h>
>>
>>  EFI_STATUS
>> @@ -28,6 +29,12 @@ ArmSgiPkgEntryPoint (
>>  {
>>    EFI_STATUS              Status;
>>
>> +  Status = LocateAndInstallAcpiFromFv (&gSgi575AcpiTablesiFileGuid);
>> +  if (EFI_ERROR (Status)) {
>> +    DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install ACPI tables\n"));
>> +    return Status;
>> +  }
>> +
>>    // Install Virtio Block IO.
>>    if (FeaturePcdGet (PcdVirtioSupported) == TRUE) {
>>      Status = InitVirtioBlockIo (ImageHandle);
>> diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
>> new file mode 100644
>> index 0000000..870ffe9
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
>> @@ -0,0 +1,41 @@
>> +/** @file
>> +*
>> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
>> +*
>> +*  This program and the accompanying materials are licensed and made available
>> +*  under the terms and conditions of the BSD License which accompanies this
>> +*  distribution. The full text of the license may be found at
>> +*  http://opensource.org/licenses/bsd-license.php
>> +*
>> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#ifndef __SGI_ACPI_HEADER__
>> +#define __SGI_ACPI_HEADER__
>> +
>> +//
>> +// ACPI table information used to initialize tables.
>> +//
>> +#define EFI_ACPI_ARM_OEM_ID           'A','R','M','L','T','D'   // OEMID 6 bytes long
>> +#define EFI_ACPI_ARM_OEM_TABLE_ID     SIGNATURE_64('E','N','T','P','L','A','T','F') // OEM table id 8 bytes long
>> +#define EFI_ACPI_ARM_OEM_REVISION     0x20140727
>> +#define EFI_ACPI_ARM_CREATOR_ID       SIGNATURE_32('A','R','M',' ')
>> +#define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099
>> +
>> +// A macro to initialise the common header part of EFI ACPI tables as defined by
>> +// EFI_ACPI_DESCRIPTION_HEADER structure.
>> +#define ARM_ACPI_HEADER(Signature, Type, Revision) {             \
>> +    Signature,                      /* UINT32  Signature */       \
>> +    sizeof (Type),                  /* UINT32  Length */          \
>> +    Revision,                       /* UINT8   Revision */        \
>> +    0,                              /* UINT8   Checksum */        \
>> +    { EFI_ACPI_ARM_OEM_ID },        /* UINT8   OemId[6] */        \
>> +    EFI_ACPI_ARM_OEM_TABLE_ID,      /* UINT64  OemTableId */      \
>> +    EFI_ACPI_ARM_OEM_REVISION,      /* UINT32  OemRevision */     \
>> +    EFI_ACPI_ARM_CREATOR_ID,        /* UINT32  CreatorId */       \
>> +    EFI_ACPI_ARM_CREATOR_REVISION   /* UINT32  CreatorRevision */ \
>> +  }
>> +
>> +#endif /* __SGI_ACPI_HEADER__ */
>> --
>> 2.7.4
>>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel

[PATCH edk2-platforms v4 6/9] Platform/ARM/Sgi: add initial support for ARM SGI platform

[Thomas Abraham]

From: Vishwanatha HG <vishwanatha.hg@arm.com>

Add the initial support for ARM's System Guidance for Infrastructure
(SGI) platforms. SGI-575 is the supported platform in this initial
implementation and can be extented to include support for upcoming
SGI platforms as well.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vishwanatha HG <vishwanatha.hg@arm.com>
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
---
 Platform/ARM/SgiPkg/SgiPlatform.dec |  37 +++++
 Platform/ARM/SgiPkg/SgiPlatform.dsc | 251 +++++++++++++++++++++++++++++
 Platform/ARM/SgiPkg/SgiPlatform.fdf | 306 ++++++++++++++++++++++++++++++++++++
 3 files changed, 594 insertions(+)
 create mode 100644 Platform/ARM/SgiPkg/SgiPlatform.dec
 create mode 100644 Platform/ARM/SgiPkg/SgiPlatform.dsc
 create mode 100644 Platform/ARM/SgiPkg/SgiPlatform.fdf

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
new file mode 100644
index 0000000..d995937
--- /dev/null
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -0,0 +1,37 @@
+#
+#  Copyright (c) 2018, ARM Limited. All rights reserved.
+#
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+[Defines]
+  DEC_SPECIFICATION              = 0x0001001A
+  PACKAGE_NAME                   = SgiPkg
+  PACKAGE_GUID                   = e6e0f26c-0df9-4f6c-a382-37ded896c6e9
+  PACKAGE_VERSION                = 0.1
+
+################################################################################
+#
+# Include Section - list of Include Paths that are provided by this package.
+#                   Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+################################################################################
+[Includes.common]
+  Include                        # Root include for the package
+
+[Guids.common]
+  gArmSgiTokenSpaceGuid      = { 0x577d6941, 0xaea1, 0x40b4, { 0x90, 0x93, 0x2a, 0x86, 0x61, 0x72, 0x5a, 0x57 } }
+  gSgi575AcpiTablesiFileGuid = { 0xc712719a, 0x0aaf, 0x438c, { 0x9c, 0xdd, 0x35, 0xab, 0x4d, 0x60, 0x20, 0x7d } }
+
+[PcdsFeatureFlag.common]
+  # Set this PCD to TRUE to enable virtio support.
+  gArmSgiTokenSpaceGuid.PcdVirtioSupported|TRUE|BOOLEAN|0x00000001
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
new file mode 100644
index 0000000..c5f220e
--- /dev/null
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
@@ -0,0 +1,251 @@
+#
+#  Copyright (c) 2018, ARM Limited. All rights reserved.
+#
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+  PLATFORM_NAME                  = ArmSgi
+  PLATFORM_GUID                  = 3a6b2eae-0275-4b6e-a5d1-bd2ba1ce1fae
+  PLATFORM_VERSION               = 0.1
+  DSC_SPECIFICATION              = 0x0001001B
+  OUTPUT_DIRECTORY               = Build/$(PLATFORM_NAME)
+  SUPPORTED_ARCHITECTURES        = AARCH64|ARM
+  BUILD_TARGETS                  = NOOPT|DEBUG|RELEASE
+  SKUID_IDENTIFIER               = DEFAULT
+  FLASH_DEFINITION               = Platform/ARM/SgiPkg/SgiPlatform.fdf
+  BUILD_NUMBER                   = 1
+
+!include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
+
+[LibraryClasses.common]
+  ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
+  ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
+  ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
+  ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
+  ArmPlatformLib|Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
+  BasePathLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
+  EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf
+  NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf
+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+  TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
+
+  # Virtio Support
+  VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
+  VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
+  FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+
+[LibraryClasses.common.SEC]
+  HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
+  MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+  PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+
+[LibraryClasses.common.PEI_CORE, LibraryClasses.common.PEIM]
+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+  HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
+  MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+  PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
+  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+  PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+  ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
+
+[LibraryClasses.common.PEI_CORE]
+  PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
+
+[LibraryClasses.common.PEIM]
+  PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
+
+[LibraryClasses.common.DXE_CORE]
+  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
+  HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
+  MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+
+[LibraryClasses.common.DXE_DRIVER]
+  FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
+
+[LibraryClasses.common.DXE_RUNTIME_DRIVER]
+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+!if $(TARGET) != RELEASE
+  DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf
+!endif
+
+[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION, LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_DRIVER]
+  PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFeatureFlag.common]
+  gArmSgiTokenSpaceGuid.PcdVirtioSupported|TRUE
+
+[PcdsFixedAtBuild.common]
+  gArmTokenSpaceGuid.PcdVFPEnabled|1
+
+  # NV Storage PCDs. Use base of 0x08000000 for NOR0, 0xC0000000 for NOR 1
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0C000000
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x01400000
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0D400000
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x01400000
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0E800000
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x01400000
+
+  # Stacks for MPCores in Normal World
+  gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x80000000
+  gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x40000
+  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x0
+
+  # System Memory (1GB - 16MB of Trusted DRAM at the top of the 32bit address space)
+  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
+  gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F000000
+
+  # GIC Base Addresses
+  gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
+  gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
+
+  ## PL011 - Serial Terminal
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
+  gArmPlatformTokenSpaceGuid.PL011UartInteger|4
+  gArmPlatformTokenSpaceGuid.PL011UartFractional|0
+
+  ## PL011 - Serial Debug UART
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x7FF80000
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|7372800
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|115200
+  gArmPlatformTokenSpaceGuid.PL011UartInterrupt|147
+
+  ## PL031 RealTimeClock
+  gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
+
+  # List of Device Paths that support BootMonFs
+  gArmBootMonFsTokenSpaceGuid.PcdBootMonFsSupportedDevicePaths|L"VenHw(E7223039-5836-41E1-B542-D7EC736C5E59)"
+
+  # ARM OS Loader
+  gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3
+
+  # ARM Architectural Timer Frequency
+  gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|100000000
+  gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000
+  gEmbeddedTokenSpaceGuid.PcdTimerPeriod|1000
+
+  # ARM Cores and Clusters
+  gArmPlatformTokenSpaceGuid.PcdCoreCount|4
+  gArmPlatformTokenSpaceGuid.PcdClusterCount|2
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+[Components.common]
+  #
+  # PEI Phase modules
+  #
+  ArmPkg/Drivers/CpuPei/CpuPei.inf
+  ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
+  ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+  ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+  MdeModulePkg/Core/Pei/PeiMain.inf
+  MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
+    <LibraryClasses>
+      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  }
+  MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
+  MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
+    <LibraryClasses>
+      NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+  }
+
+  #
+  # DXE
+  #
+  MdeModulePkg/Core/Dxe/DxeMain.inf {
+    <LibraryClasses>
+      NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
+    <PcdsFixedAtBuild>
+      gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F
+  }
+
+  #
+  # Architectural Protocols
+  #
+  ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+  ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+  ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+  ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
+  ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
+  EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+  EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+  EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+  OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
+
+  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+  MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
+    <LibraryClasses>
+      NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+      NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
+      BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+  }
+  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+
+  #
+  # ACPI Support
+  #
+  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
+  Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
+  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+
+  #
+  # platform driver
+  #
+  Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
+
+  #
+  # FAT filesystem + GPT/MBR partitioning
+  #
+  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+
+  #
+  # Bds
+  #
+  MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+  MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  MdeModulePkg/Application/UiApp/UiApp.inf {
+    <LibraryClasses>
+      NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
+      NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
+      NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
+      PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+  }
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
new file mode 100644
index 0000000..d4fae50
--- /dev/null
+++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
@@ -0,0 +1,306 @@
+#
+#  Copyright (c) 2018, ARM Limited. All rights reserved.
+#
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+################################################################################
+#
+# FD Section
+# The [FD] Section is made up of the definition statements and a
+# description of what goes into  the Flash Device Image.  Each FD section
+# defines one flash "device" image.  A flash device image may be one of
+# the following: Removable media bootable image (like a boot floppy
+# image,) an Option ROM image (that would be "flashed" into an add-in
+# card,) a System "Flash"  image (that would be burned into a system's
+# flash) or an Update ("Capsule") image that will be used to update and
+# existing system flash.
+#
+################################################################################
+
+[FD.BL33_AP_UEFI]
+BaseAddress   = 0xE0000000|gArmTokenSpaceGuid.PcdFdBaseAddress
+Size          = 0x000F0000|gArmTokenSpaceGuid.PcdFdSize
+ErasePolarity = 1
+
+# This one is tricky, it must be: BlockSize * NumBlocks = Size
+BlockSize     = 0x00001000
+NumBlocks     = 0xF0
+
+################################################################################
+#
+# Following are lists of FD Region layout which correspond to the locations of
+# different images within the flash device.
+#
+# Regions must be defined in ascending order and may not overlap.
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required)
+# followed by the pipe "|" character, followed by the size of the region, also
+# in hex with the leading "0x" characters. Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+#
+################################################################################
+
+0x00000000|0x000F0000
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
+FV = FVMAIN_COMPACT
+
+################################################################################
+#
+# FV Section
+#
+# [FV] section is used to define what components or modules are placed within a
+# flash device file. This section also defines order the components and modules
+# are positioned within the image. The [FV] section consists of define
+# statements, set statements and module statements.
+#
+################################################################################
+
+[FV.FvMain]
+FvNameGuid         = 89cc2ab6-b847-475f-93e2-819603c3d15a
+BlockSize          = 0x40
+NumBlocks          = 0      # This FV gets compressed so make it just big enough
+FvAlignment        = 8      # FV alignment and FV attributes setting.
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF MdeModulePkg/Core/Dxe/DxeMain.inf
+
+  #
+  # PI DXE Drivers producing Architectural Protocols (EFI Services)
+  #
+  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+  INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+  INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+
+  #
+  # ACPI Support
+  #
+  INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+  INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
+  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+
+  #
+  # Multiple Console IO support
+  #
+  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+  INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+
+  INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+  INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
+  INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+
+  # NOR Flash driver
+  INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
+  INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
+
+  INF Platform/ARM/Drivers/BootMonFs/BootMonFs.inf
+  INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
+
+  #
+  # FAT filesystem + GPT/MBR partitioning
+  #
+  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+  INF FatBinPkg/EnhancedFatDxe/Fat.inf
+  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+
+  # FV FileSystem
+  INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
+
+  #
+  # UEFI applications
+  #
+  INF  ShellPkg/Application/Shell/Shell.inf
+
+  #
+  # Platform driver
+  #
+  INF Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
+
+  #
+  # Bds
+  #
+  INF MdeModulePkg/Application/UiApp/UiApp.inf
+  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+  INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+  INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+
+[FV.FVMAIN_COMPACT]
+FvAlignment        = 16
+BlockSize          = 0x1000
+NumBlocks          = 0xf0
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF ArmPkg/Drivers/CpuPei/CpuPei.inf
+  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
+  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+  INF MdeModulePkg/Core/Pei/PeiMain.inf
+  INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
+  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+
+  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+      SECTION FV_IMAGE = FVMAIN
+    }
+  }
+
+################################################################################
+#
+# Rules are use with the [FV] section's module INF type to define
+# how an FFS file is created for a given INF file. The following Rule are the default
+# rules for the different module type. User can add the customized rules to define the
+# content of the FFS file.
+#
+################################################################################
+
+############################################################################
+# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   #
+############################################################################
+#
+#[Rule.Common.DXE_DRIVER]
+#  FILE DRIVER = $(NAMED_GUID) {
+#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+#    COMPRESS PI_STD {
+#      GUIDED {
+#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
+#        UI       STRING="$(MODULE_NAME)" Optional
+#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+#      }
+#    }
+#  }
+#
+############################################################################
+
+#
+# These SEC rules are used for ArmPlatformPkg/PrePeiCore module.
+# ArmPlatformPkg/PrePeiCore is declared as a SEC module to make GenFv patch
+# the UEFI Firmware to jump to ArmPlatformPkg/PrePeiCore entrypoint
+#
+
+[Rule.Common.SEC]
+  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED {
+    TE  TE Align = Auto                 $(INF_OUTPUT)/$(MODULE_NAME).efi
+  }
+
+[Rule.Common.PEI_CORE]
+  FILE PEI_CORE = $(NAMED_GUID) FIXED {
+    TE  TE Align = Auto                 $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI  STRING ="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.PEIM]
+  FILE PEIM = $(NAMED_GUID) FIXED {
+     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
+     TE  TE Align = Auto                $(INF_OUTPUT)/$(MODULE_NAME).efi
+     UI  STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.PEIM.TIANOCOMPRESSED]
+  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
+    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
+    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
+      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
+      UI        STRING="$(MODULE_NAME)" Optional
+    }
+  }
+
+[Rule.Common.DXE_CORE]
+  FILE DXE_CORE = $(NAMED_GUID) {
+    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI       STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.UEFI_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.DXE_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.DXE_RUNTIME_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.UEFI_APPLICATION]
+  FILE APPLICATION = $(NAMED_GUID) {
+    UI     STRING ="$(MODULE_NAME)" Optional
+    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi
+  }
+
+[Rule.Common.UEFI_DRIVER.BINARY]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX DXE_DEPEX Optional      |.depex
+    PE32      PE32                    |.efi
+    UI        STRING="$(MODULE_NAME)" Optional
+    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+  }
+
+[Rule.Common.UEFI_APPLICATION.BINARY]
+  FILE APPLICATION = $(NAMED_GUID) {
+    PE32      PE32                    |.efi
+    UI        STRING="$(MODULE_NAME)" Optional
+    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+  }
+
+[Rule.Common.USER_DEFINED.ACPITABLE]
+  FILE FREEFORM = $(NAMED_GUID) {
+    RAW ACPI               |.acpi
+    RAW ASL                |.aml
+  }
-- 
2.7.4

Re: [PATCH edk2-platforms v4 6/9] Platform/ARM/Sgi: add initial support for ARM SGI platform

[Ard Biesheuvel]

On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
> From: Vishwanatha HG <vishwanatha.hg@arm.com>
>
> Add the initial support for ARM's System Guidance for Infrastructure
> (SGI) platforms. SGI-575 is the supported platform in this initial
> implementation and can be extented to include support for upcoming
> SGI platforms as well.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Vishwanatha HG <vishwanatha.hg@arm.com>
> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
> ---
>  Platform/ARM/SgiPkg/SgiPlatform.dec |  37 +++++
>  Platform/ARM/SgiPkg/SgiPlatform.dsc | 251 +++++++++++++++++++++++++++++
>  Platform/ARM/SgiPkg/SgiPlatform.fdf | 306 ++++++++++++++++++++++++++++++++++++
>  3 files changed, 594 insertions(+)
>  create mode 100644 Platform/ARM/SgiPkg/SgiPlatform.dec
>  create mode 100644 Platform/ARM/SgiPkg/SgiPlatform.dsc
>  create mode 100644 Platform/ARM/SgiPkg/SgiPlatform.fdf
>
> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
> new file mode 100644
> index 0000000..d995937
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
> @@ -0,0 +1,37 @@
> +#
> +#  Copyright (c) 2018, ARM Limited. All rights reserved.
> +#
> +#  This program and the accompanying materials are licensed and made available
> +#  under the terms and conditions of the BSD License which accompanies this
> +#  distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +[Defines]
> +  DEC_SPECIFICATION              = 0x0001001A
> +  PACKAGE_NAME                   = SgiPkg
> +  PACKAGE_GUID                   = e6e0f26c-0df9-4f6c-a382-37ded896c6e9
> +  PACKAGE_VERSION                = 0.1
> +
> +################################################################################
> +#
> +# Include Section - list of Include Paths that are provided by this package.
> +#                   Comments are used for Keywords and Module Types.
> +#
> +# Supported Module Types:
> +#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
> +#
> +################################################################################
> +[Includes.common]
> +  Include                        # Root include for the package
> +
> +[Guids.common]
> +  gArmSgiTokenSpaceGuid      = { 0x577d6941, 0xaea1, 0x40b4, { 0x90, 0x93, 0x2a, 0x86, 0x61, 0x72, 0x5a, 0x57 } }
> +  gSgi575AcpiTablesiFileGuid = { 0xc712719a, 0x0aaf, 0x438c, { 0x9c, 0xdd, 0x35, 0xab, 0x4d, 0x60, 0x20, 0x7d } }
> +
> +[PcdsFeatureFlag.common]
> +  # Set this PCD to TRUE to enable virtio support.
> +  gArmSgiTokenSpaceGuid.PcdVirtioSupported|TRUE|BOOLEAN|0x00000001
> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
> new file mode 100644
> index 0000000..c5f220e
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
> @@ -0,0 +1,251 @@
> +#
> +#  Copyright (c) 2018, ARM Limited. All rights reserved.
> +#
> +#  This program and the accompanying materials are licensed and made available
> +#  under the terms and conditions of the BSD License which accompanies this
> +#  distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +################################################################################
> +#
> +# Defines Section - statements that will be processed to create a Makefile.
> +#
> +################################################################################
> +[Defines]
> +  PLATFORM_NAME                  = ArmSgi
> +  PLATFORM_GUID                  = 3a6b2eae-0275-4b6e-a5d1-bd2ba1ce1fae
> +  PLATFORM_VERSION               = 0.1
> +  DSC_SPECIFICATION              = 0x0001001B
> +  OUTPUT_DIRECTORY               = Build/$(PLATFORM_NAME)
> +  SUPPORTED_ARCHITECTURES        = AARCH64|ARM
> +  BUILD_TARGETS                  = NOOPT|DEBUG|RELEASE
> +  SKUID_IDENTIFIER               = DEFAULT
> +  FLASH_DEFINITION               = Platform/ARM/SgiPkg/SgiPlatform.fdf
> +  BUILD_NUMBER                   = 1
> +
> +!include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
> +
> +[LibraryClasses.common]
> +  ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
> +  ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
> +  ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
> +  ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
> +  ArmPlatformLib|Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
> +  BasePathLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
> +  EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf
> +  NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf
> +  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
> +  TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
> +
> +  # Virtio Support
> +  VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
> +  VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
> +  FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
> +
> +[LibraryClasses.common.SEC]
> +  HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
> +  MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
> +  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
> +  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
> +  PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
> +
> +[LibraryClasses.common.PEI_CORE, LibraryClasses.common.PEIM]
> +  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
> +  HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
> +  MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
> +  PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
> +  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
> +  PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
> +  ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
> +
> +[LibraryClasses.common.PEI_CORE]
> +  PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
> +
> +[LibraryClasses.common.PEIM]
> +  PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
> +
> +[LibraryClasses.common.DXE_CORE]
> +  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
> +  HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
> +  MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
> +  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
> +
> +[LibraryClasses.common.DXE_DRIVER]
> +  FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
> +
> +[LibraryClasses.common.DXE_RUNTIME_DRIVER]
> +  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
> +  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
> +!if $(TARGET) != RELEASE
> +  DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibSerialPort.inf
> +!endif
> +
> +[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION, LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_DRIVER]
> +  PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
> +
> +################################################################################
> +#
> +# Pcd Section - list of all EDK II PCD Entries defined by this Platform
> +#
> +################################################################################
> +
> +[PcdsFeatureFlag.common]
> +  gArmSgiTokenSpaceGuid.PcdVirtioSupported|TRUE
> +
> +[PcdsFixedAtBuild.common]
> +  gArmTokenSpaceGuid.PcdVFPEnabled|1
> +
> +  # NV Storage PCDs. Use base of 0x08000000 for NOR0, 0xC0000000 for NOR 1
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0C000000
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x01400000
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0D400000
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x01400000
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0E800000
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x01400000
> +
> +  # Stacks for MPCores in Normal World
> +  gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x80000000
> +  gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x40000
> +  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x0
> +
> +  # System Memory (1GB - 16MB of Trusted DRAM at the top of the 32bit address space)
> +  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
> +  gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F000000
> +
> +  # GIC Base Addresses
> +  gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
> +  gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
> +
> +  ## PL011 - Serial Terminal
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000
> +  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
> +  gArmPlatformTokenSpaceGuid.PL011UartInteger|4
> +  gArmPlatformTokenSpaceGuid.PL011UartFractional|0
> +
> +  ## PL011 - Serial Debug UART
> +  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x7FF80000
> +  gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|7372800
> +  gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|115200
> +  gArmPlatformTokenSpaceGuid.PL011UartInterrupt|147
> +
> +  ## PL031 RealTimeClock
> +  gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
> +
> +  # List of Device Paths that support BootMonFs
> +  gArmBootMonFsTokenSpaceGuid.PcdBootMonFsSupportedDevicePaths|L"VenHw(E7223039-5836-41E1-B542-D7EC736C5E59)"
> +
> +  # ARM OS Loader
> +  gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3
> +
> +  # ARM Architectural Timer Frequency
> +  gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|100000000
> +  gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000
> +  gEmbeddedTokenSpaceGuid.PcdTimerPeriod|1000
> +
> +  # ARM Cores and Clusters
> +  gArmPlatformTokenSpaceGuid.PcdCoreCount|4
> +  gArmPlatformTokenSpaceGuid.PcdClusterCount|2
> +
> +################################################################################
> +#
> +# Components Section - list of all EDK II Modules needed by this Platform
> +#
> +################################################################################
> +[Components.common]
> +  #
> +  # PEI Phase modules
> +  #
> +  ArmPkg/Drivers/CpuPei/CpuPei.inf
> +  ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
> +  ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
> +  ArmPlatformPkg/PlatformPei/PlatformPeim.inf
> +  MdeModulePkg/Core/Pei/PeiMain.inf
> +  MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
> +    <LibraryClasses>
> +      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
> +  }
> +  MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
> +  MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
> +  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
> +    <LibraryClasses>
> +      NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
> +  }
> +
> +  #
> +  # DXE
> +  #
> +  MdeModulePkg/Core/Dxe/DxeMain.inf {
> +    <LibraryClasses>
> +      NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
> +    <PcdsFixedAtBuild>
> +      gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F
> +  }
> +
> +  #
> +  # Architectural Protocols
> +  #
> +  ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> +  ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> +  ArmPkg/Drivers/TimerDxe/TimerDxe.inf
> +  ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
> +  ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
> +  EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
> +  EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
> +  EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
> +  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
> +  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
> +  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
> +  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
> +  OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
> +
> +  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
> +  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
> +  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
> +  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
> +  MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
> +  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
> +    <LibraryClasses>
> +      NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
> +      NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
> +      BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
> +  }
> +  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
> +
> +  #
> +  # ACPI Support
> +  #
> +  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
> +  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

Do you need this driver? You are using your own file GUID for the ACPI
tables so I don't think this driver does anything meaningful.

> +  Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
> +  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
> +
> +  #
> +  # platform driver
> +  #
> +  Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> +
> +  #
> +  # FAT filesystem + GPT/MBR partitioning
> +  #
> +  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
> +  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
> +  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
> +
> +  #
> +  # Bds
> +  #
> +  MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
> +  MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> +  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> +  MdeModulePkg/Application/UiApp/UiApp.inf {
> +    <LibraryClasses>
> +      NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
> +      NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
> +      NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
> +      PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
> +  }
> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
> new file mode 100644
> index 0000000..d4fae50
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
> @@ -0,0 +1,306 @@
> +#
> +#  Copyright (c) 2018, ARM Limited. All rights reserved.
> +#
> +#  This program and the accompanying materials are licensed and made available
> +#  under the terms and conditions of the BSD License which accompanies this
> +#  distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +################################################################################
> +#
> +# FD Section
> +# The [FD] Section is made up of the definition statements and a
> +# description of what goes into  the Flash Device Image.  Each FD section
> +# defines one flash "device" image.  A flash device image may be one of
> +# the following: Removable media bootable image (like a boot floppy
> +# image,) an Option ROM image (that would be "flashed" into an add-in
> +# card,) a System "Flash"  image (that would be burned into a system's
> +# flash) or an Update ("Capsule") image that will be used to update and
> +# existing system flash.
> +#
> +################################################################################
> +
> +[FD.BL33_AP_UEFI]
> +BaseAddress   = 0xE0000000|gArmTokenSpaceGuid.PcdFdBaseAddress
> +Size          = 0x000F0000|gArmTokenSpaceGuid.PcdFdSize
> +ErasePolarity = 1
> +
> +# This one is tricky, it must be: BlockSize * NumBlocks = Size
> +BlockSize     = 0x00001000
> +NumBlocks     = 0xF0
> +
> +################################################################################
> +#
> +# Following are lists of FD Region layout which correspond to the locations of
> +# different images within the flash device.
> +#
> +# Regions must be defined in ascending order and may not overlap.
> +#
> +# A Layout Region start with a eight digit hex offset (leading "0x" required)
> +# followed by the pipe "|" character, followed by the size of the region, also
> +# in hex with the leading "0x" characters. Like:
> +# Offset|Size
> +# PcdOffsetCName|PcdSizeCName
> +# RegionType <FV, DATA, or FILE>
> +#
> +################################################################################
> +
> +0x00000000|0x000F0000
> +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
> +FV = FVMAIN_COMPACT
> +
> +################################################################################
> +#
> +# FV Section
> +#
> +# [FV] section is used to define what components or modules are placed within a
> +# flash device file. This section also defines order the components and modules
> +# are positioned within the image. The [FV] section consists of define
> +# statements, set statements and module statements.
> +#
> +################################################################################
> +
> +[FV.FvMain]
> +FvNameGuid         = 89cc2ab6-b847-475f-93e2-819603c3d15a
> +BlockSize          = 0x40
> +NumBlocks          = 0      # This FV gets compressed so make it just big enough
> +FvAlignment        = 8      # FV alignment and FV attributes setting.
> +ERASE_POLARITY     = 1
> +MEMORY_MAPPED      = TRUE
> +STICKY_WRITE       = TRUE
> +LOCK_CAP           = TRUE
> +LOCK_STATUS        = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP  = TRUE
> +WRITE_STATUS       = TRUE
> +WRITE_LOCK_CAP     = TRUE
> +WRITE_LOCK_STATUS  = TRUE
> +READ_DISABLED_CAP  = TRUE
> +READ_ENABLED_CAP   = TRUE
> +READ_STATUS        = TRUE
> +READ_LOCK_CAP      = TRUE
> +READ_LOCK_STATUS   = TRUE
> +
> +  INF MdeModulePkg/Core/Dxe/DxeMain.inf
> +
> +  #
> +  # PI DXE Drivers producing Architectural Protocols (EFI Services)
> +  #
> +  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> +  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
> +  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
> +  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
> +  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
> +  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
> +  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
> +  INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
> +  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
> +  INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
> +
> +  #
> +  # ACPI Support
> +  #
> +  INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
> +  INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
> +  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
> +
> +  #
> +  # Multiple Console IO support
> +  #
> +  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
> +  INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
> +
> +  INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> +  INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
> +  INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
> +
> +  # NOR Flash driver
> +  INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
> +  INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
> +
> +  INF Platform/ARM/Drivers/BootMonFs/BootMonFs.inf
> +  INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
> +
> +  #
> +  # FAT filesystem + GPT/MBR partitioning
> +  #
> +  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
> +  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
> +  INF FatBinPkg/EnhancedFatDxe/Fat.inf
> +  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
> +
> +  # FV FileSystem
> +  INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
> +
> +  #
> +  # UEFI applications
> +  #
> +  INF  ShellPkg/Application/Shell/Shell.inf
> +
> +  #
> +  # Platform driver
> +  #
> +  INF Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> +
> +  #
> +  # Bds
> +  #
> +  INF MdeModulePkg/Application/UiApp/UiApp.inf
> +  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
> +  INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> +  INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> +  INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +
> +[FV.FVMAIN_COMPACT]
> +FvAlignment        = 16
> +BlockSize          = 0x1000
> +NumBlocks          = 0xf0
> +ERASE_POLARITY     = 1
> +MEMORY_MAPPED      = TRUE
> +STICKY_WRITE       = TRUE
> +LOCK_CAP           = TRUE
> +LOCK_STATUS        = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP  = TRUE
> +WRITE_STATUS       = TRUE
> +WRITE_LOCK_CAP     = TRUE
> +WRITE_LOCK_STATUS  = TRUE
> +READ_DISABLED_CAP  = TRUE
> +READ_ENABLED_CAP   = TRUE
> +READ_STATUS        = TRUE
> +READ_LOCK_CAP      = TRUE
> +READ_LOCK_STATUS   = TRUE
> +
> +  INF ArmPkg/Drivers/CpuPei/CpuPei.inf
> +  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
> +  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
> +  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
> +  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
> +  INF MdeModulePkg/Core/Pei/PeiMain.inf
> +  INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
> +  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
> +  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
> +
> +  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
> +    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
> +      SECTION FV_IMAGE = FVMAIN
> +    }
> +  }
> +
> +################################################################################
> +#
> +# Rules are use with the [FV] section's module INF type to define
> +# how an FFS file is created for a given INF file. The following Rule are the default
> +# rules for the different module type. User can add the customized rules to define the
> +# content of the FFS file.
> +#
> +################################################################################
> +
> +############################################################################
> +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   #
> +############################################################################
> +#
> +#[Rule.Common.DXE_DRIVER]
> +#  FILE DRIVER = $(NAMED_GUID) {
> +#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
> +#    COMPRESS PI_STD {
> +#      GUIDED {
> +#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
> +#        UI       STRING="$(MODULE_NAME)" Optional
> +#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
> +#      }
> +#    }
> +#  }
> +#
> +############################################################################
> +
> +#
> +# These SEC rules are used for ArmPlatformPkg/PrePeiCore module.
> +# ArmPlatformPkg/PrePeiCore is declared as a SEC module to make GenFv patch
> +# the UEFI Firmware to jump to ArmPlatformPkg/PrePeiCore entrypoint
> +#
> +
> +[Rule.Common.SEC]
> +  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED {
> +    TE  TE Align = Auto                 $(INF_OUTPUT)/$(MODULE_NAME).efi
> +  }
> +
> +[Rule.Common.PEI_CORE]
> +  FILE PEI_CORE = $(NAMED_GUID) FIXED {
> +    TE  TE Align = Auto                 $(INF_OUTPUT)/$(MODULE_NAME).efi
> +    UI  STRING ="$(MODULE_NAME)" Optional
> +  }
> +
> +[Rule.Common.PEIM]
> +  FILE PEIM = $(NAMED_GUID) FIXED {
> +     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
> +     TE  TE Align = Auto                $(INF_OUTPUT)/$(MODULE_NAME).efi
> +     UI  STRING="$(MODULE_NAME)" Optional
> +  }
> +
> +[Rule.Common.PEIM.TIANOCOMPRESSED]
> +  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
> +    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
> +    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
> +      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
> +      UI        STRING="$(MODULE_NAME)" Optional
> +    }
> +  }
> +
> +[Rule.Common.DXE_CORE]
> +  FILE DXE_CORE = $(NAMED_GUID) {
> +    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi
> +    UI       STRING="$(MODULE_NAME)" Optional
> +  }
> +
> +[Rule.Common.UEFI_DRIVER]
> +  FILE DRIVER = $(NAMED_GUID) {
> +    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
> +    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
> +    UI           STRING="$(MODULE_NAME)" Optional
> +  }
> +
> +[Rule.Common.DXE_DRIVER]
> +  FILE DRIVER = $(NAMED_GUID) {
> +    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
> +    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
> +    UI           STRING="$(MODULE_NAME)" Optional
> +  }
> +
> +[Rule.Common.DXE_RUNTIME_DRIVER]
> +  FILE DRIVER = $(NAMED_GUID) {
> +    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
> +    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
> +    UI           STRING="$(MODULE_NAME)" Optional
> +  }
> +
> +[Rule.Common.UEFI_APPLICATION]
> +  FILE APPLICATION = $(NAMED_GUID) {
> +    UI     STRING ="$(MODULE_NAME)" Optional
> +    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi
> +  }
> +
> +[Rule.Common.UEFI_DRIVER.BINARY]
> +  FILE DRIVER = $(NAMED_GUID) {
> +    DXE_DEPEX DXE_DEPEX Optional      |.depex
> +    PE32      PE32                    |.efi
> +    UI        STRING="$(MODULE_NAME)" Optional
> +    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
> +  }
> +
> +[Rule.Common.UEFI_APPLICATION.BINARY]
> +  FILE APPLICATION = $(NAMED_GUID) {
> +    PE32      PE32                    |.efi
> +    UI        STRING="$(MODULE_NAME)" Optional
> +    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
> +  }
> +
> +[Rule.Common.USER_DEFINED.ACPITABLE]
> +  FILE FREEFORM = $(NAMED_GUID) {
> +    RAW ACPI               |.acpi
> +    RAW ASL                |.aml
> +  }
> --
> 2.7.4
>

[PATCH edk2-platforms v4 7/9] Platform/ARM/Sgi: add support for smsc91x ethernet controller

[Thomas Abraham]

From: Daniil Egranov <daniil.egranov@arm.com>

SGI platforms include a SMSC9118 ethernet controller. Enable support
for this controller.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
---
 Platform/ARM/SgiPkg/Include/SgiPlatform.h                |  4 ++++
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c |  8 +++++++-
 Platform/ARM/SgiPkg/SgiPlatform.dsc                      |  6 ++++++
 Platform/ARM/SgiPkg/SgiPlatform.fdf                      | 16 ++++++++++++++++
 4 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index 441a467..00ca7e9 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -27,6 +27,10 @@
 #define SGI_EXP_SMC_CS1_BASE                      0x0C000000
 #define SGI_EXP_SMC_CS1_SZ                        SIZE_64MB
 
+// Expansion AXI - SMSC 91C111 (Ethernet)
+#define SGI_EXP_SMSC91X_BASE                      0x18000000
+#define SGI_EXP_SMSC91X_SZ                        SIZE_64MB
+
 // Expansion AXI - System peripherals
 #define SGI_EXP_SYS_PERIPH_BASE                   0x1C000000
 #define SGI_EXP_SYS_PERIPH_SZ                     SIZE_2MB
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
index 9be71fb..f038559 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
@@ -22,7 +22,7 @@
 #include <SgiPlatform.h>
 
 // Total number of descriptors, including the final "end-of-table" descriptor.
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  8
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  9
 
 /**
   Returns the Virtual Memory Map of the platform.
@@ -63,6 +63,12 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[Index].Length          = SIZE_64MB;
   VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
 
+  // Expansion AXI - SMSC 91X (Ethernet)
+  VirtualMemoryTable[++Index].PhysicalBase  = SGI_EXP_SMSC91X_BASE;
+  VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_SMSC91X_BASE;
+  VirtualMemoryTable[Index].Length          = SGI_EXP_SMSC91X_SZ;
+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
   // Expansion AXI - System Peripherals
   VirtualMemoryTable[++Index].PhysicalBase  = SGI_EXP_SYS_PERIPH_BASE;
   VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_SYS_PERIPH_BASE;
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
index c5f220e..f11c1f3 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
@@ -150,6 +150,9 @@
   gArmPlatformTokenSpaceGuid.PcdCoreCount|4
   gArmPlatformTokenSpaceGuid.PcdClusterCount|2
 
+  # Ethernet
+  gEmbeddedTokenSpaceGuid.PcdLan91xDxeBaseAddress|0x18000000
+
 ################################################################################
 #
 # Components Section - list of all EDK II Modules needed by this Platform
@@ -249,3 +252,6 @@
       NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
       PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
   }
+
+  # SMSC LAN 91C111
+  EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.inf
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
index d4fae50..6f6e6aa 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
+++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
@@ -155,6 +155,22 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
   INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 
+  #
+  # Networking stack
+  #
+  INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
+  INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
+  INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
+  INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
+  INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
+  INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
+  INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
+  INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
+  INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
+  INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
+  INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
+  INF EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.inf
+
 [FV.FVMAIN_COMPACT]
 FvAlignment        = 16
 BlockSize          = 0x1000
-- 
2.7.4

Re: [PATCH edk2-platforms v4 7/9] Platform/ARM/Sgi: add support for smsc91x ethernet controller

[Ard Biesheuvel]

On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
> From: Daniil Egranov <daniil.egranov@arm.com>
>
> SGI platforms include a SMSC9118 ethernet controller. Enable support
> for this controller.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
> ---
>  Platform/ARM/SgiPkg/Include/SgiPlatform.h                |  4 ++++
>  Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c |  8 +++++++-
>  Platform/ARM/SgiPkg/SgiPlatform.dsc                      |  6 ++++++
>  Platform/ARM/SgiPkg/SgiPlatform.fdf                      | 16 ++++++++++++++++
>  4 files changed, 33 insertions(+), 1 deletion(-)
>
> diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> index 441a467..00ca7e9 100644
> --- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> +++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> @@ -27,6 +27,10 @@
>  #define SGI_EXP_SMC_CS1_BASE                      0x0C000000
>  #define SGI_EXP_SMC_CS1_SZ                        SIZE_64MB
>
> +// Expansion AXI - SMSC 91C111 (Ethernet)
> +#define SGI_EXP_SMSC91X_BASE                      0x18000000
> +#define SGI_EXP_SMSC91X_SZ                        SIZE_64MB
> +
>  // Expansion AXI - System peripherals
>  #define SGI_EXP_SYS_PERIPH_BASE                   0x1C000000
>  #define SGI_EXP_SYS_PERIPH_SZ                     SIZE_2MB
> diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
> index 9be71fb..f038559 100644
> --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
> +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
> @@ -22,7 +22,7 @@
>  #include <SgiPlatform.h>
>
>  // Total number of descriptors, including the final "end-of-table" descriptor.
> -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  8
> +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  9
>
>  /**
>    Returns the Virtual Memory Map of the platform.
> @@ -63,6 +63,12 @@ ArmPlatformGetVirtualMemoryMap (
>    VirtualMemoryTable[Index].Length          = SIZE_64MB;
>    VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>
> +  // Expansion AXI - SMSC 91X (Ethernet)
> +  VirtualMemoryTable[++Index].PhysicalBase  = SGI_EXP_SMSC91X_BASE;
> +  VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_SMSC91X_BASE;
> +  VirtualMemoryTable[Index].Length          = SGI_EXP_SMSC91X_SZ;
> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
>    // Expansion AXI - System Peripherals
>    VirtualMemoryTable[++Index].PhysicalBase  = SGI_EXP_SYS_PERIPH_BASE;
>    VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_SYS_PERIPH_BASE;
> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
> index c5f220e..f11c1f3 100644
> --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
> +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
> @@ -150,6 +150,9 @@
>    gArmPlatformTokenSpaceGuid.PcdCoreCount|4
>    gArmPlatformTokenSpaceGuid.PcdClusterCount|2
>
> +  # Ethernet
> +  gEmbeddedTokenSpaceGuid.PcdLan91xDxeBaseAddress|0x18000000
> +
>  ################################################################################
>  #
>  # Components Section - list of all EDK II Modules needed by this Platform
> @@ -249,3 +252,6 @@
>        NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
>        PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
>    }
> +
> +  # SMSC LAN 91C111
> +  EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.inf
> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
> index d4fae50..6f6e6aa 100644
> --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
> +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
> @@ -155,6 +155,22 @@ READ_LOCK_STATUS   = TRUE
>    INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
>    INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
>
> +  #
> +  # Networking stack
> +  #
> +  INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
> +  INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
> +  INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
> +  INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
> +  INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
> +  INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
> +  INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
> +  INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
> +  INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
> +  INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
> +  INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
> +  INF EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.inf
> +


Don't you need to add these to the .DSC as well?

>  [FV.FVMAIN_COMPACT]
>  FvAlignment        = 16
>  BlockSize          = 0x1000
> --
> 2.7.4
>

Re: [PATCH edk2-platforms v4 7/9] Platform/ARM/Sgi: add support for smsc91x ethernet controller

[Thomas Abraham]

On Mon, May 21, 2018 at 2:39 PM, Ard Biesheuvel
<ard.biesheuvel@linaro.org> wrote:
> On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
>> From: Daniil Egranov <daniil.egranov@arm.com>
>>
>> SGI platforms include a SMSC9118 ethernet controller. Enable support
>> for this controller.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
>> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
>> ---
>>  Platform/ARM/SgiPkg/Include/SgiPlatform.h                |  4 ++++
>>  Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c |  8 +++++++-
>>  Platform/ARM/SgiPkg/SgiPlatform.dsc                      |  6 ++++++
>>  Platform/ARM/SgiPkg/SgiPlatform.fdf                      | 16 ++++++++++++++++
>>  4 files changed, 33 insertions(+), 1 deletion(-)
>>
>> diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
>> index 441a467..00ca7e9 100644
>> --- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
>> +++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
>> @@ -27,6 +27,10 @@
>>  #define SGI_EXP_SMC_CS1_BASE                      0x0C000000
>>  #define SGI_EXP_SMC_CS1_SZ                        SIZE_64MB
>>
>> +// Expansion AXI - SMSC 91C111 (Ethernet)
>> +#define SGI_EXP_SMSC91X_BASE                      0x18000000
>> +#define SGI_EXP_SMSC91X_SZ                        SIZE_64MB
>> +
>>  // Expansion AXI - System peripherals
>>  #define SGI_EXP_SYS_PERIPH_BASE                   0x1C000000
>>  #define SGI_EXP_SYS_PERIPH_SZ                     SIZE_2MB
>> diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
>> index 9be71fb..f038559 100644
>> --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
>> +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
>> @@ -22,7 +22,7 @@
>>  #include <SgiPlatform.h>
>>
>>  // Total number of descriptors, including the final "end-of-table" descriptor.
>> -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  8
>> +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  9
>>
>>  /**
>>    Returns the Virtual Memory Map of the platform.
>> @@ -63,6 +63,12 @@ ArmPlatformGetVirtualMemoryMap (
>>    VirtualMemoryTable[Index].Length          = SIZE_64MB;
>>    VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>>
>> +  // Expansion AXI - SMSC 91X (Ethernet)
>> +  VirtualMemoryTable[++Index].PhysicalBase  = SGI_EXP_SMSC91X_BASE;
>> +  VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_SMSC91X_BASE;
>> +  VirtualMemoryTable[Index].Length          = SGI_EXP_SMSC91X_SZ;
>> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>> +
>>    // Expansion AXI - System Peripherals
>>    VirtualMemoryTable[++Index].PhysicalBase  = SGI_EXP_SYS_PERIPH_BASE;
>>    VirtualMemoryTable[Index].VirtualBase     = SGI_EXP_SYS_PERIPH_BASE;
>> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
>> index c5f220e..f11c1f3 100644
>> --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
>> +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
>> @@ -150,6 +150,9 @@
>>    gArmPlatformTokenSpaceGuid.PcdCoreCount|4
>>    gArmPlatformTokenSpaceGuid.PcdClusterCount|2
>>
>> +  # Ethernet
>> +  gEmbeddedTokenSpaceGuid.PcdLan91xDxeBaseAddress|0x18000000
>> +
>>  ################################################################################
>>  #
>>  # Components Section - list of all EDK II Modules needed by this Platform
>> @@ -249,3 +252,6 @@
>>        NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
>>        PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
>>    }
>> +
>> +  # SMSC LAN 91C111
>> +  EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.inf
>> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
>> index d4fae50..6f6e6aa 100644
>> --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
>> +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
>> @@ -155,6 +155,22 @@ READ_LOCK_STATUS   = TRUE
>>    INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
>>    INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
>>
>> +  #
>> +  # Networking stack
>> +  #
>> +  INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
>> +  INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
>> +  INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
>> +  INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
>> +  INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
>> +  INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
>> +  INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
>> +  INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
>> +  INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
>> +  INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
>> +  INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
>> +  INF EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.inf
>> +
>
>
> Don't you need to add these to the .DSC as well?

These are part of the Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
file which the SgiPlatform.dsc file includes. So these are not added
in the SgiPlatform.dsc file.

Thanks,
Thomas.

>
>>  [FV.FVMAIN_COMPACT]
>>  FvAlignment        = 16
>>  BlockSize          = 0x1000
>> --
>> 2.7.4
>>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel

[PATCH edk2-platforms v4 8/9] Platform/ARM/Sgi: implement PciHostBridgeLib support

[Thomas Abraham]

SGI platforms include a PCIe root complex to which a AHCI controller
is attached as an endpoint. So implement the PciHostBridgeLib glue
layer and enable support for PCIe and AHCI controllers.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
---
 .../Library/PciHostBridgeLib/PciHostBridgeLib.c    | 189 +++++++++++++++++++++
 .../Library/PciHostBridgeLib/PciHostBridgeLib.inf  |  63 +++++++
 .../SgiPkg/Library/PlatformLib/PlatformLibMem.c    |  20 ++-
 Platform/ARM/SgiPkg/SgiPlatform.dec                |   4 +
 Platform/ARM/SgiPkg/SgiPlatform.dsc                |  48 ++++++
 Platform/ARM/SgiPkg/SgiPlatform.fdf                |  20 +++
 6 files changed, 343 insertions(+), 1 deletion(-)
 create mode 100644 Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
 create mode 100644 Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf

diff --git a/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
new file mode 100644
index 0000000..f8bf9fc
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
@@ -0,0 +1,189 @@
+/** @file
+*  PCI Host Bridge Library instance for ARM SGI platforms
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <PiDxe.h>
+#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/PciHostBridgeLib.h>
+#include <Protocol/PciHostBridgeResourceAllocation.h>
+#include <Protocol/PciRootBridgeIo.h>
+
+GLOBAL_REMOVE_IF_UNREFERENCED
+CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
+  L"Mem", L"I/O", L"Bus"
+};
+
+#pragma pack(1)
+typedef struct {
+  ACPI_HID_DEVICE_PATH     AcpiDevicePath;
+  EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
+#pragma pack ()
+
+STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath = {
+  {
+    {
+      ACPI_DEVICE_PATH,
+      ACPI_DP,
+      {
+        (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
+        (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
+      }
+    },
+    EISA_PNP_ID (0x0A08), // PCIe
+    0
+  }, {
+    END_DEVICE_PATH_TYPE,
+    END_ENTIRE_DEVICE_PATH_SUBTYPE,
+    {
+      END_DEVICE_PATH_LENGTH,
+      0
+    }
+  }
+};
+
+STATIC PCI_ROOT_BRIDGE mPciRootBridge[] = {
+  {
+    0,                                              // Segment
+    0,                                              // Supports
+    0,                                              // Attributes
+    FALSE,                                          // DmaAbove4G
+    FALSE,                                          // NoExtendedConfigSpace
+    FALSE,                                          // ResourceAssigned
+    EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM |          // AllocationAttributes
+    EFI_PCI_HOST_BRIDGE_MEM64_DECODE,
+    {
+      // Bus
+      FixedPcdGet32 (PcdPciBusMin),
+      FixedPcdGet32 (PcdPciBusMax)
+    }, {
+      // Io
+      FixedPcdGet64 (PcdPciIoBase),
+      FixedPcdGet64 (PcdPciIoBase) + FixedPcdGet64 (PcdPciIoSize) - 1
+    }, {
+      // Mem
+      FixedPcdGet32 (PcdPciMmio32Base),
+      FixedPcdGet32 (PcdPciMmio32Base) + FixedPcdGet32 (PcdPciMmio32Size) - 1
+    }, {
+      // MemAbove4G
+      FixedPcdGet64 (PcdPciMmio64Base),
+      FixedPcdGet64 (PcdPciMmio64Base) + FixedPcdGet64 (PcdPciMmio64Size) - 1
+    }, {
+      // PMem
+      MAX_UINT64,
+      0
+    }, {
+      // PMemAbove4G
+      MAX_UINT64,
+      0
+    },
+    (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath
+  },
+};
+
+/**
+  Return all the root bridge instances in an array.
+
+  @param Count  Return the count of root bridge instances.
+
+  @return All the root bridge instances in an array.
+          The array should be passed into PciHostBridgeFreeRootBridges()
+          when it's not used.
+**/
+PCI_ROOT_BRIDGE *
+EFIAPI
+PciHostBridgeGetRootBridges (
+  UINTN *Count
+  )
+{
+  *Count = ARRAY_SIZE (mPciRootBridge);
+  return mPciRootBridge;
+}
+
+/**
+  Free the root bridge instances array returned from PciHostBridgeGetRootBridges().
+
+  @param Bridges The root bridge instances array.
+  @param Count   The count of the array.
+**/
+VOID
+EFIAPI
+PciHostBridgeFreeRootBridges (
+  PCI_ROOT_BRIDGE *Bridges,
+  UINTN           Count
+  )
+{
+  return;
+}
+
+/**
+  Inform the platform that the resource conflict happens.
+
+  @param HostBridgeHandle Handle of the Host Bridge.
+  @param Configuration    Pointer to PCI I/O and PCI memory resource
+                          descriptors. The Configuration contains the resources
+                          for all the root bridges. The resource for each root
+                          bridge is terminated with END descriptor and an
+                          additional END is appended indicating the end of the
+                          entire resources. The resource descriptor field
+                          values follow the description in
+                          EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
+                          .SubmitResources().
+**/
+VOID
+EFIAPI
+PciHostBridgeResourceConflict (
+  EFI_HANDLE                        HostBridgeHandle,
+  VOID                              *Configuration
+  )
+{
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
+  UINTN                             RootBridgeIndex;
+  DEBUG ((DEBUG_ERROR, "PciHostBridge: Resource conflict happens!\n"));
+
+  RootBridgeIndex = 0;
+  Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
+  while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
+    DEBUG ((DEBUG_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));
+    for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
+      ASSERT (Descriptor->ResType <
+              (sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) /
+               sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])
+               )
+              );
+      DEBUG ((DEBUG_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
+              mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],
+              Descriptor->AddrLen, Descriptor->AddrRangeMax
+              ));
+      if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
+        DEBUG ((DEBUG_ERROR, "     Granularity/SpecificFlag = %ld / %02x%s\n",
+                Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
+                ((Descriptor->SpecificFlag &
+                  EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE
+                  ) != 0) ? L" (Prefetchable)" : L""
+                ));
+      }
+    }
+    //
+    // Skip the END descriptor for root bridge
+    //
+    ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
+    Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(
+                   (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1
+                   );
+  }
+}
diff --git a/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf b/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
new file mode 100644
index 0000000..16c2295
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
@@ -0,0 +1,63 @@
+## @file
+#  PCI Host Bridge Library instance for ARM SGI platforms.
+#
+#  Copyright (c) 2016, Intel Corporation. All rights reserved.
+#  Copyright (c) 2017, ARM Limited. All rights reserved.
+#
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution. The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+#  IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = PciHostBridgeLib
+  FILE_GUID                      = 6879CEAD-DC94-42EB-895C-096D36B8083C
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = PciHostBridgeLib|DXE_DRIVER
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+#  VALID_ARCHITECTURES           = AARCH64 ARM
+#
+
+[Sources]
+  PciHostBridgeLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  DevicePathLib
+  IoLib
+  MemoryAllocationLib
+  UefiBootServicesTableLib
+
+[FixedPcd]
+  gArmTokenSpaceGuid.PcdPciBusMin
+  gArmTokenSpaceGuid.PcdPciBusMax
+  gArmTokenSpaceGuid.PcdPciIoBase
+  gArmTokenSpaceGuid.PcdPciIoSize
+  gArmTokenSpaceGuid.PcdPciMmio32Base
+  gArmTokenSpaceGuid.PcdPciMmio32Size
+  gArmTokenSpaceGuid.PcdPciMmio32Translation
+  gArmTokenSpaceGuid.PcdPciMmio64Base
+  gArmTokenSpaceGuid.PcdPciMmio64Size
+
+[Protocols]
+  gEfiCpuIo2ProtocolGuid          ## CONSUMES
+
+[Depex]
+  gEfiCpuIo2ProtocolGuid
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
index f038559..e3e4d2a 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
@@ -22,7 +22,7 @@
 #include <SgiPlatform.h>
 
 // Total number of descriptors, including the final "end-of-table" descriptor.
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  9
+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  12
 
 /**
   Returns the Virtual Memory Map of the platform.
@@ -99,6 +99,24 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemorySize);
   VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
 
+  // PCI Configuration Space
+  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet32 (PcdPciConfigurationSpaceBaseAddress);
+  VirtualMemoryTable[Index].VirtualBase     = PcdGet32 (PcdPciConfigurationSpaceBaseAddress);
+  VirtualMemoryTable[Index].Length          = PcdGet32 (PcdPciConfigurationSpaceSize);
+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+  // PCI Memory Space
+  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet32 (PcdPciMmio32Base);
+  VirtualMemoryTable[Index].VirtualBase     = PcdGet32 (PcdPciMmio32Base);
+  VirtualMemoryTable[Index].Length          = PcdGet32 (PcdPciMmio32Size);
+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
+  // 64-bit PCI Memory Space
+  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdPciMmio64Base);
+  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdPciMmio64Base);
+  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdPciMmio64Size);
+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+
   // End of Table
   VirtualMemoryTable[++Index].PhysicalBase  = 0;
   VirtualMemoryTable[Index].VirtualBase     = 0;
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index d995937..0772c0b 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -35,3 +35,7 @@
 [PcdsFeatureFlag.common]
   # Set this PCD to TRUE to enable virtio support.
   gArmSgiTokenSpaceGuid.PcdVirtioSupported|TRUE|BOOLEAN|0x00000001
+
+[PcdsFixedAtBuild.common]
+  gArmSgiTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress|0x60000000|UINT32|0x00000011
+  gArmSgiTokenSpaceGuid.PcdPciConfigurationSpaceSize|0x01FF0000|UINT32|0x00000012
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
index f11c1f3..06c4c3d 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
@@ -76,6 +76,10 @@
 
 [LibraryClasses.common.DXE_DRIVER]
   FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
+  PciHostBridgeLib|Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
+  PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
+  PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+  PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
 
 [LibraryClasses.common.DXE_RUNTIME_DRIVER]
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
@@ -120,6 +124,24 @@
   gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
   gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
 
+  #
+  # PCIe
+  #
+  gArmTokenSpaceGuid.PcdPciBusMin|0
+  gArmTokenSpaceGuid.PcdPciBusMax|255
+  gArmTokenSpaceGuid.PcdPciIoBase|0x0
+  gArmTokenSpaceGuid.PcdPciIoSize|0x00800000
+  gArmTokenSpaceGuid.PcdPciIoTranslation|0x77800000
+  gArmTokenSpaceGuid.PcdPciMmio32Base|0x70000000
+  gArmTokenSpaceGuid.PcdPciMmio32Size|0x07800000
+  gArmTokenSpaceGuid.PcdPciMmio32Translation|0x0
+  gArmTokenSpaceGuid.PcdPciMmio64Base|0x500000000
+  gArmTokenSpaceGuid.PcdPciMmio64Size|0x300000000
+  gArmTokenSpaceGuid.PcdPciMmio64Translation|0x0
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x60000000
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|24
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40
+
   ## PL011 - Serial Terminal
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
@@ -237,6 +259,7 @@
   MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
   MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
   MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+  FatPkg/EnhancedFatDxe/Fat.inf
 
   #
   # Bds
@@ -255,3 +278,28 @@
 
   # SMSC LAN 91C111
   EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.inf
+
+  #
+  # Required by PCI
+  #
+  ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
+
+  #
+  # PCI Support
+  #
+  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+  MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
+    <PcdsFixedAtBuild>
+      gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8010004F
+  }
+
+  #
+  # AHCI Support
+  #
+  MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+  MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+
+  #
+  # SATA Controller
+  #
+  MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
index 6f6e6aa..17cdf48 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
+++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
@@ -108,6 +108,26 @@ READ_LOCK_STATUS   = TRUE
   INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
   INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 
+  # Required by PCI
+  INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
+
+  #
+  # PCI Support
+  #
+  INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+  INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
+
+  #
+  # AHCI Support
+  #
+  INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+  INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+
+  #
+  # SATA Controller
+  #
+  INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
+
   #
   # Multiple Console IO support
   #
-- 
2.7.4

Re: [PATCH edk2-platforms v4 8/9] Platform/ARM/Sgi: implement PciHostBridgeLib support

[Ard Biesheuvel]

On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
> SGI platforms include a PCIe root complex to which a AHCI controller
> is attached as an endpoint. So implement the PciHostBridgeLib glue
> layer and enable support for PCIe and AHCI controllers.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
> ---
>  .../Library/PciHostBridgeLib/PciHostBridgeLib.c    | 189 +++++++++++++++++++++
>  .../Library/PciHostBridgeLib/PciHostBridgeLib.inf  |  63 +++++++
>  .../SgiPkg/Library/PlatformLib/PlatformLibMem.c    |  20 ++-
>  Platform/ARM/SgiPkg/SgiPlatform.dec                |   4 +
>  Platform/ARM/SgiPkg/SgiPlatform.dsc                |  48 ++++++
>  Platform/ARM/SgiPkg/SgiPlatform.fdf                |  20 +++
>  6 files changed, 343 insertions(+), 1 deletion(-)
>  create mode 100644 Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
>  create mode 100644 Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
>
> diff --git a/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
> new file mode 100644
> index 0000000..f8bf9fc
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
> @@ -0,0 +1,189 @@
> +/** @file
> +*  PCI Host Bridge Library instance for ARM SGI platforms
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include <PiDxe.h>
> +#include <Library/DebugLib.h>
> +#include <Library/DevicePathLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/PciHostBridgeLib.h>
> +#include <Protocol/PciHostBridgeResourceAllocation.h>
> +#include <Protocol/PciRootBridgeIo.h>
> +
> +GLOBAL_REMOVE_IF_UNREFERENCED
> +CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
> +  L"Mem", L"I/O", L"Bus"
> +};
> +

You can make this

STATIC CHAR16 CONST * CONST

afaict

> +#pragma pack(1)
> +typedef struct {
> +  ACPI_HID_DEVICE_PATH     AcpiDevicePath;
> +  EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
> +} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
> +#pragma pack ()
> +
> +STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath = {
> +  {
> +    {
> +      ACPI_DEVICE_PATH,
> +      ACPI_DP,
> +      {
> +        (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
> +        (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
> +      }
> +    },
> +    EISA_PNP_ID (0x0A08), // PCIe
> +    0
> +  }, {
> +    END_DEVICE_PATH_TYPE,
> +    END_ENTIRE_DEVICE_PATH_SUBTYPE,
> +    {
> +      END_DEVICE_PATH_LENGTH,
> +      0
> +    }
> +  }
> +};
> +
> +STATIC PCI_ROOT_BRIDGE mPciRootBridge[] = {
> +  {
> +    0,                                              // Segment
> +    0,                                              // Supports
> +    0,                                              // Attributes
> +    FALSE,                                          // DmaAbove4G

Is 64-bit DMA not supported by this PCIe controller?

> +    FALSE,                                          // NoExtendedConfigSpace
> +    FALSE,                                          // ResourceAssigned
> +    EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM |          // AllocationAttributes
> +    EFI_PCI_HOST_BRIDGE_MEM64_DECODE,
> +    {
> +      // Bus
> +      FixedPcdGet32 (PcdPciBusMin),
> +      FixedPcdGet32 (PcdPciBusMax)
> +    }, {
> +      // Io
> +      FixedPcdGet64 (PcdPciIoBase),
> +      FixedPcdGet64 (PcdPciIoBase) + FixedPcdGet64 (PcdPciIoSize) - 1
> +    }, {
> +      // Mem
> +      FixedPcdGet32 (PcdPciMmio32Base),
> +      FixedPcdGet32 (PcdPciMmio32Base) + FixedPcdGet32 (PcdPciMmio32Size) - 1
> +    }, {
> +      // MemAbove4G
> +      FixedPcdGet64 (PcdPciMmio64Base),
> +      FixedPcdGet64 (PcdPciMmio64Base) + FixedPcdGet64 (PcdPciMmio64Size) - 1
> +    }, {
> +      // PMem
> +      MAX_UINT64,
> +      0
> +    }, {
> +      // PMemAbove4G
> +      MAX_UINT64,
> +      0
> +    },
> +    (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath
> +  },
> +};
> +
> +/**
> +  Return all the root bridge instances in an array.
> +
> +  @param Count  Return the count of root bridge instances.
> +
> +  @return All the root bridge instances in an array.
> +          The array should be passed into PciHostBridgeFreeRootBridges()
> +          when it's not used.
> +**/
> +PCI_ROOT_BRIDGE *
> +EFIAPI
> +PciHostBridgeGetRootBridges (
> +  UINTN *Count
> +  )
> +{
> +  *Count = ARRAY_SIZE (mPciRootBridge);
> +  return mPciRootBridge;
> +}
> +
> +/**
> +  Free the root bridge instances array returned from PciHostBridgeGetRootBridges().
> +
> +  @param Bridges The root bridge instances array.
> +  @param Count   The count of the array.
> +**/
> +VOID
> +EFIAPI
> +PciHostBridgeFreeRootBridges (
> +  PCI_ROOT_BRIDGE *Bridges,
> +  UINTN           Count
> +  )
> +{
> +  return;

Please drop this redundant return

> +}
> +
> +/**
> +  Inform the platform that the resource conflict happens.
> +
> +  @param HostBridgeHandle Handle of the Host Bridge.
> +  @param Configuration    Pointer to PCI I/O and PCI memory resource
> +                          descriptors. The Configuration contains the resources
> +                          for all the root bridges. The resource for each root
> +                          bridge is terminated with END descriptor and an
> +                          additional END is appended indicating the end of the
> +                          entire resources. The resource descriptor field
> +                          values follow the description in
> +                          EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
> +                          .SubmitResources().
> +**/
> +VOID
> +EFIAPI
> +PciHostBridgeResourceConflict (
> +  EFI_HANDLE                        HostBridgeHandle,
> +  VOID                              *Configuration
> +  )
> +{
> +  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
> +  UINTN                             RootBridgeIndex;
> +  DEBUG ((DEBUG_ERROR, "PciHostBridge: Resource conflict happens!\n"));
> +
> +  RootBridgeIndex = 0;
> +  Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
> +  while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
> +    DEBUG ((DEBUG_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));
> +    for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
> +      ASSERT (Descriptor->ResType <
> +              (sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) /
> +               sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])
> +               )
> +              );
> +      DEBUG ((DEBUG_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
> +              mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],
> +              Descriptor->AddrLen, Descriptor->AddrRangeMax
> +              ));
> +      if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
> +        DEBUG ((DEBUG_ERROR, "     Granularity/SpecificFlag = %ld / %02x%s\n",
> +                Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
> +                ((Descriptor->SpecificFlag &
> +                  EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE
> +                  ) != 0) ? L" (Prefetchable)" : L""
> +                ));
> +      }
> +    }
> +    //
> +    // Skip the END descriptor for root bridge
> +    //
> +    ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
> +    Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(
> +                   (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1
> +                   );
> +  }
> +}
> diff --git a/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf b/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
> new file mode 100644
> index 0000000..16c2295
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
> @@ -0,0 +1,63 @@
> +## @file
> +#  PCI Host Bridge Library instance for ARM SGI platforms.
> +#
> +#  Copyright (c) 2016, Intel Corporation. All rights reserved.
> +#  Copyright (c) 2017, ARM Limited. All rights reserved.
> +#
> +#  This program and the accompanying materials are licensed and made available
> +#  under the terms and conditions of the BSD License which accompanies this
> +#  distribution. The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> +#  IMPLIED.
> +#
> +##
> +
> +[Defines]
> +  INF_VERSION                    = 0x00010005
> +  BASE_NAME                      = PciHostBridgeLib
> +  FILE_GUID                      = 6879CEAD-DC94-42EB-895C-096D36B8083C
> +  MODULE_TYPE                    = DXE_DRIVER
> +  VERSION_STRING                 = 1.0
> +  LIBRARY_CLASS                  = PciHostBridgeLib|DXE_DRIVER
> +
> +#
> +# The following information is for reference only and not required by the build
> +# tools.
> +#
> +#  VALID_ARCHITECTURES           = AARCH64 ARM
> +#
> +
> +[Sources]
> +  PciHostBridgeLib.c
> +
> +[Packages]
> +  MdePkg/MdePkg.dec
> +  MdeModulePkg/MdeModulePkg.dec
> +  ArmPkg/ArmPkg.dec
> +
> +[LibraryClasses]
> +  BaseLib
> +  DebugLib
> +  DevicePathLib
> +  IoLib
> +  MemoryAllocationLib
> +  UefiBootServicesTableLib
> +
> +[FixedPcd]
> +  gArmTokenSpaceGuid.PcdPciBusMin
> +  gArmTokenSpaceGuid.PcdPciBusMax
> +  gArmTokenSpaceGuid.PcdPciIoBase
> +  gArmTokenSpaceGuid.PcdPciIoSize
> +  gArmTokenSpaceGuid.PcdPciMmio32Base
> +  gArmTokenSpaceGuid.PcdPciMmio32Size
> +  gArmTokenSpaceGuid.PcdPciMmio32Translation
> +  gArmTokenSpaceGuid.PcdPciMmio64Base
> +  gArmTokenSpaceGuid.PcdPciMmio64Size
> +
> +[Protocols]
> +  gEfiCpuIo2ProtocolGuid          ## CONSUMES
> +
> +[Depex]
> +  gEfiCpuIo2ProtocolGuid
> diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
> index f038559..e3e4d2a 100644
> --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
> +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
> @@ -22,7 +22,7 @@
>  #include <SgiPlatform.h>
>
>  // Total number of descriptors, including the final "end-of-table" descriptor.
> -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  9
> +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  12
>
>  /**
>    Returns the Virtual Memory Map of the platform.
> @@ -99,6 +99,24 @@ ArmPlatformGetVirtualMemoryMap (
>    VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemorySize);
>    VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
>
> +  // PCI Configuration Space
> +  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet32 (PcdPciConfigurationSpaceBaseAddress);
> +  VirtualMemoryTable[Index].VirtualBase     = PcdGet32 (PcdPciConfigurationSpaceBaseAddress);
> +  VirtualMemoryTable[Index].Length          = PcdGet32 (PcdPciConfigurationSpaceSize);
> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
> +  // PCI Memory Space
> +  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet32 (PcdPciMmio32Base);
> +  VirtualMemoryTable[Index].VirtualBase     = PcdGet32 (PcdPciMmio32Base);
> +  VirtualMemoryTable[Index].Length          = PcdGet32 (PcdPciMmio32Size);
> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
> +  // 64-bit PCI Memory Space
> +  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdPciMmio64Base);
> +  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdPciMmio64Base);
> +  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdPciMmio64Size);
> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +

You can drop the MMIO mappings here: the PCI host bridge driver will
take care of this (but keep the one for the config space)

>    // End of Table
>    VirtualMemoryTable[++Index].PhysicalBase  = 0;
>    VirtualMemoryTable[Index].VirtualBase     = 0;
> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
> index d995937..0772c0b 100644
> --- a/Platform/ARM/SgiPkg/SgiPlatform.dec
> +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
> @@ -35,3 +35,7 @@
>  [PcdsFeatureFlag.common]
>    # Set this PCD to TRUE to enable virtio support.
>    gArmSgiTokenSpaceGuid.PcdVirtioSupported|TRUE|BOOLEAN|0x00000001
> +
> +[PcdsFixedAtBuild.common]
> +  gArmSgiTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress|0x60000000|UINT32|0x00000011
> +  gArmSgiTokenSpaceGuid.PcdPciConfigurationSpaceSize|0x01FF0000|UINT32|0x00000012

Please drop these PCDs. You already have
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress for the former, and
for the latter, you can use

(PcdPciBusMax - PcdPciBusMin + 1) * SIZE_1MB


> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
> index f11c1f3..06c4c3d 100644
> --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
> +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
> @@ -76,6 +76,10 @@
>
>  [LibraryClasses.common.DXE_DRIVER]
>    FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
> +  PciHostBridgeLib|Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
> +  PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
> +  PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
> +  PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
>
>  [LibraryClasses.common.DXE_RUNTIME_DRIVER]
>    BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
> @@ -120,6 +124,24 @@
>    gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
>    gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
>
> +  #
> +  # PCIe
> +  #
> +  gArmTokenSpaceGuid.PcdPciBusMin|0
> +  gArmTokenSpaceGuid.PcdPciBusMax|255
> +  gArmTokenSpaceGuid.PcdPciIoBase|0x0
> +  gArmTokenSpaceGuid.PcdPciIoSize|0x00800000
> +  gArmTokenSpaceGuid.PcdPciIoTranslation|0x77800000
> +  gArmTokenSpaceGuid.PcdPciMmio32Base|0x70000000
> +  gArmTokenSpaceGuid.PcdPciMmio32Size|0x07800000
> +  gArmTokenSpaceGuid.PcdPciMmio32Translation|0x0
> +  gArmTokenSpaceGuid.PcdPciMmio64Base|0x500000000
> +  gArmTokenSpaceGuid.PcdPciMmio64Size|0x300000000
> +  gArmTokenSpaceGuid.PcdPciMmio64Translation|0x0
> +  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x60000000
> +  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|24
> +  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40
> +
>    ## PL011 - Serial Terminal
>    gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000
>    gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
> @@ -237,6 +259,7 @@
>    MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
>    MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
>    MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
> +  FatPkg/EnhancedFatDxe/Fat.inf
>
>    #
>    # Bds
> @@ -255,3 +278,28 @@
>
>    # SMSC LAN 91C111
>    EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.inf
> +
> +  #
> +  # Required by PCI
> +  #
> +  ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
> +
> +  #
> +  # PCI Support
> +  #
> +  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
> +  MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
> +    <PcdsFixedAtBuild>
> +      gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8010004F
> +  }
> +
> +  #
> +  # AHCI Support
> +  #
> +  MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
> +  MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
> +
> +  #
> +  # SATA Controller
> +  #
> +  MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
> index 6f6e6aa..17cdf48 100644
> --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
> +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
> @@ -108,6 +108,26 @@ READ_LOCK_STATUS   = TRUE
>    INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
>    INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
>
> +  # Required by PCI
> +  INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
> +
> +  #
> +  # PCI Support
> +  #
> +  INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
> +  INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
> +
> +  #
> +  # AHCI Support
> +  #
> +  INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
> +  INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
> +
> +  #
> +  # SATA Controller
> +  #
> +  INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
> +
>    #
>    # Multiple Console IO support
>    #
> --
> 2.7.4
>

Re: [PATCH edk2-platforms v4 8/9] Platform/ARM/Sgi: implement PciHostBridgeLib support

[Thomas Abraham]

On Mon, May 21, 2018 at 2:46 PM, Ard Biesheuvel
<ard.biesheuvel@linaro.org> wrote:
> On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
>> SGI platforms include a PCIe root complex to which a AHCI controller
>> is attached as an endpoint. So implement the PciHostBridgeLib glue
>> layer and enable support for PCIe and AHCI controllers.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
>> ---
>>  .../Library/PciHostBridgeLib/PciHostBridgeLib.c    | 189 +++++++++++++++++++++
>>  .../Library/PciHostBridgeLib/PciHostBridgeLib.inf  |  63 +++++++
>>  .../SgiPkg/Library/PlatformLib/PlatformLibMem.c    |  20 ++-
>>  Platform/ARM/SgiPkg/SgiPlatform.dec                |   4 +
>>  Platform/ARM/SgiPkg/SgiPlatform.dsc                |  48 ++++++
>>  Platform/ARM/SgiPkg/SgiPlatform.fdf                |  20 +++
>>  6 files changed, 343 insertions(+), 1 deletion(-)
>>  create mode 100644 Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
>>  create mode 100644 Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
>>
>> diff --git a/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
>> new file mode 100644
>> index 0000000..f8bf9fc
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
>> @@ -0,0 +1,189 @@
>> +/** @file
>> +*  PCI Host Bridge Library instance for ARM SGI platforms
>> +*
>> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
>> +*
>> +*  This program and the accompanying materials are licensed and made available
>> +*  under the terms and conditions of the BSD License which accompanies this
>> +*  distribution.  The full text of the license may be found at
>> +*  http://opensource.org/licenses/bsd-license.php
>> +*
>> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#include <PiDxe.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/DevicePathLib.h>
>> +#include <Library/MemoryAllocationLib.h>
>> +#include <Library/PcdLib.h>
>> +#include <Library/PciHostBridgeLib.h>
>> +#include <Protocol/PciHostBridgeResourceAllocation.h>
>> +#include <Protocol/PciRootBridgeIo.h>
>> +
>> +GLOBAL_REMOVE_IF_UNREFERENCED
>> +CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
>> +  L"Mem", L"I/O", L"Bus"
>> +};
>> +
>
> You can make this
>
> STATIC CHAR16 CONST * CONST
>
> afaict
>
>> +#pragma pack(1)
>> +typedef struct {
>> +  ACPI_HID_DEVICE_PATH     AcpiDevicePath;
>> +  EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
>> +} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
>> +#pragma pack ()
>> +
>> +STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath = {
>> +  {
>> +    {
>> +      ACPI_DEVICE_PATH,
>> +      ACPI_DP,
>> +      {
>> +        (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
>> +        (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
>> +      }
>> +    },
>> +    EISA_PNP_ID (0x0A08), // PCIe
>> +    0
>> +  }, {
>> +    END_DEVICE_PATH_TYPE,
>> +    END_ENTIRE_DEVICE_PATH_SUBTYPE,
>> +    {
>> +      END_DEVICE_PATH_LENGTH,
>> +      0
>> +    }
>> +  }
>> +};
>> +
>> +STATIC PCI_ROOT_BRIDGE mPciRootBridge[] = {
>> +  {
>> +    0,                                              // Segment
>> +    0,                                              // Supports
>> +    0,                                              // Attributes
>> +    FALSE,                                          // DmaAbove4G
>
> Is 64-bit DMA not supported by this PCIe controller?

Yes, it does. Will fix it in the next version.

>
>> +    FALSE,                                          // NoExtendedConfigSpace
>> +    FALSE,                                          // ResourceAssigned
>> +    EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM |          // AllocationAttributes
>> +    EFI_PCI_HOST_BRIDGE_MEM64_DECODE,
>> +    {
>> +      // Bus
>> +      FixedPcdGet32 (PcdPciBusMin),
>> +      FixedPcdGet32 (PcdPciBusMax)
>> +    }, {
>> +      // Io
>> +      FixedPcdGet64 (PcdPciIoBase),
>> +      FixedPcdGet64 (PcdPciIoBase) + FixedPcdGet64 (PcdPciIoSize) - 1
>> +    }, {
>> +      // Mem
>> +      FixedPcdGet32 (PcdPciMmio32Base),
>> +      FixedPcdGet32 (PcdPciMmio32Base) + FixedPcdGet32 (PcdPciMmio32Size) - 1
>> +    }, {
>> +      // MemAbove4G
>> +      FixedPcdGet64 (PcdPciMmio64Base),
>> +      FixedPcdGet64 (PcdPciMmio64Base) + FixedPcdGet64 (PcdPciMmio64Size) - 1
>> +    }, {
>> +      // PMem
>> +      MAX_UINT64,
>> +      0
>> +    }, {
>> +      // PMemAbove4G
>> +      MAX_UINT64,
>> +      0
>> +    },
>> +    (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath
>> +  },
>> +};
>> +
>> +/**
>> +  Return all the root bridge instances in an array.
>> +
>> +  @param Count  Return the count of root bridge instances.
>> +
>> +  @return All the root bridge instances in an array.
>> +          The array should be passed into PciHostBridgeFreeRootBridges()
>> +          when it's not used.
>> +**/
>> +PCI_ROOT_BRIDGE *
>> +EFIAPI
>> +PciHostBridgeGetRootBridges (
>> +  UINTN *Count
>> +  )
>> +{
>> +  *Count = ARRAY_SIZE (mPciRootBridge);
>> +  return mPciRootBridge;
>> +}
>> +
>> +/**
>> +  Free the root bridge instances array returned from PciHostBridgeGetRootBridges().
>> +
>> +  @param Bridges The root bridge instances array.
>> +  @param Count   The count of the array.
>> +**/
>> +VOID
>> +EFIAPI
>> +PciHostBridgeFreeRootBridges (
>> +  PCI_ROOT_BRIDGE *Bridges,
>> +  UINTN           Count
>> +  )
>> +{
>> +  return;
>
> Please drop this redundant return
>
>> +}
>> +
>> +/**
>> +  Inform the platform that the resource conflict happens.
>> +
>> +  @param HostBridgeHandle Handle of the Host Bridge.
>> +  @param Configuration    Pointer to PCI I/O and PCI memory resource
>> +                          descriptors. The Configuration contains the resources
>> +                          for all the root bridges. The resource for each root
>> +                          bridge is terminated with END descriptor and an
>> +                          additional END is appended indicating the end of the
>> +                          entire resources. The resource descriptor field
>> +                          values follow the description in
>> +                          EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
>> +                          .SubmitResources().
>> +**/
>> +VOID
>> +EFIAPI
>> +PciHostBridgeResourceConflict (
>> +  EFI_HANDLE                        HostBridgeHandle,
>> +  VOID                              *Configuration
>> +  )
>> +{
>> +  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
>> +  UINTN                             RootBridgeIndex;
>> +  DEBUG ((DEBUG_ERROR, "PciHostBridge: Resource conflict happens!\n"));
>> +
>> +  RootBridgeIndex = 0;
>> +  Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
>> +  while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
>> +    DEBUG ((DEBUG_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));
>> +    for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
>> +      ASSERT (Descriptor->ResType <
>> +              (sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) /
>> +               sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])
>> +               )
>> +              );
>> +      DEBUG ((DEBUG_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
>> +              mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],
>> +              Descriptor->AddrLen, Descriptor->AddrRangeMax
>> +              ));
>> +      if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
>> +        DEBUG ((DEBUG_ERROR, "     Granularity/SpecificFlag = %ld / %02x%s\n",
>> +                Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
>> +                ((Descriptor->SpecificFlag &
>> +                  EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE
>> +                  ) != 0) ? L" (Prefetchable)" : L""
>> +                ));
>> +      }
>> +    }
>> +    //
>> +    // Skip the END descriptor for root bridge
>> +    //
>> +    ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
>> +    Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(
>> +                   (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1
>> +                   );
>> +  }
>> +}
>> diff --git a/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf b/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
>> new file mode 100644
>> index 0000000..16c2295
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
>> @@ -0,0 +1,63 @@
>> +## @file
>> +#  PCI Host Bridge Library instance for ARM SGI platforms.
>> +#
>> +#  Copyright (c) 2016, Intel Corporation. All rights reserved.
>> +#  Copyright (c) 2017, ARM Limited. All rights reserved.
>> +#
>> +#  This program and the accompanying materials are licensed and made available
>> +#  under the terms and conditions of the BSD License which accompanies this
>> +#  distribution. The full text of the license may be found at
>> +#  http://opensource.org/licenses/bsd-license.php
>> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
>> +#  IMPLIED.
>> +#
>> +##
>> +
>> +[Defines]
>> +  INF_VERSION                    = 0x00010005
>> +  BASE_NAME                      = PciHostBridgeLib
>> +  FILE_GUID                      = 6879CEAD-DC94-42EB-895C-096D36B8083C
>> +  MODULE_TYPE                    = DXE_DRIVER
>> +  VERSION_STRING                 = 1.0
>> +  LIBRARY_CLASS                  = PciHostBridgeLib|DXE_DRIVER
>> +
>> +#
>> +# The following information is for reference only and not required by the build
>> +# tools.
>> +#
>> +#  VALID_ARCHITECTURES           = AARCH64 ARM
>> +#
>> +
>> +[Sources]
>> +  PciHostBridgeLib.c
>> +
>> +[Packages]
>> +  MdePkg/MdePkg.dec
>> +  MdeModulePkg/MdeModulePkg.dec
>> +  ArmPkg/ArmPkg.dec
>> +
>> +[LibraryClasses]
>> +  BaseLib
>> +  DebugLib
>> +  DevicePathLib
>> +  IoLib
>> +  MemoryAllocationLib
>> +  UefiBootServicesTableLib
>> +
>> +[FixedPcd]
>> +  gArmTokenSpaceGuid.PcdPciBusMin
>> +  gArmTokenSpaceGuid.PcdPciBusMax
>> +  gArmTokenSpaceGuid.PcdPciIoBase
>> +  gArmTokenSpaceGuid.PcdPciIoSize
>> +  gArmTokenSpaceGuid.PcdPciMmio32Base
>> +  gArmTokenSpaceGuid.PcdPciMmio32Size
>> +  gArmTokenSpaceGuid.PcdPciMmio32Translation
>> +  gArmTokenSpaceGuid.PcdPciMmio64Base
>> +  gArmTokenSpaceGuid.PcdPciMmio64Size
>> +
>> +[Protocols]
>> +  gEfiCpuIo2ProtocolGuid          ## CONSUMES
>> +
>> +[Depex]
>> +  gEfiCpuIo2ProtocolGuid
>> diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
>> index f038559..e3e4d2a 100644
>> --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
>> +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
>> @@ -22,7 +22,7 @@
>>  #include <SgiPlatform.h>
>>
>>  // Total number of descriptors, including the final "end-of-table" descriptor.
>> -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  9
>> +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  12
>>
>>  /**
>>    Returns the Virtual Memory Map of the platform.
>> @@ -99,6 +99,24 @@ ArmPlatformGetVirtualMemoryMap (
>>    VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemorySize);
>>    VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
>>
>> +  // PCI Configuration Space
>> +  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet32 (PcdPciConfigurationSpaceBaseAddress);
>> +  VirtualMemoryTable[Index].VirtualBase     = PcdGet32 (PcdPciConfigurationSpaceBaseAddress);
>> +  VirtualMemoryTable[Index].Length          = PcdGet32 (PcdPciConfigurationSpaceSize);
>> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>> +
>> +  // PCI Memory Space
>> +  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet32 (PcdPciMmio32Base);
>> +  VirtualMemoryTable[Index].VirtualBase     = PcdGet32 (PcdPciMmio32Base);
>> +  VirtualMemoryTable[Index].Length          = PcdGet32 (PcdPciMmio32Size);
>> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>> +
>> +  // 64-bit PCI Memory Space
>> +  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdPciMmio64Base);
>> +  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdPciMmio64Base);
>> +  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdPciMmio64Size);
>> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>> +
>
> You can drop the MMIO mappings here: the PCI host bridge driver will
> take care of this (but keep the one for the config space)

Okay. Thanks for pointing this out.

>
>>    // End of Table
>>    VirtualMemoryTable[++Index].PhysicalBase  = 0;
>>    VirtualMemoryTable[Index].VirtualBase     = 0;
>> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
>> index d995937..0772c0b 100644
>> --- a/Platform/ARM/SgiPkg/SgiPlatform.dec
>> +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
>> @@ -35,3 +35,7 @@
>>  [PcdsFeatureFlag.common]
>>    # Set this PCD to TRUE to enable virtio support.
>>    gArmSgiTokenSpaceGuid.PcdVirtioSupported|TRUE|BOOLEAN|0x00000001
>> +
>> +[PcdsFixedAtBuild.common]
>> +  gArmSgiTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress|0x60000000|UINT32|0x00000011
>> +  gArmSgiTokenSpaceGuid.PcdPciConfigurationSpaceSize|0x01FF0000|UINT32|0x00000012
>
> Please drop these PCDs. You already have
> gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress for the former, and
> for the latter, you can use
>
> (PcdPciBusMax - PcdPciBusMin + 1) * SIZE_1MB

Okay.

>
>
>> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
>> index f11c1f3..06c4c3d 100644
>> --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
>> +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
>> @@ -76,6 +76,10 @@
>>
>>  [LibraryClasses.common.DXE_DRIVER]
>>    FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
>> +  PciHostBridgeLib|Platform/ARM/SgiPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
>> +  PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
>> +  PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
>> +  PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
>>
>>  [LibraryClasses.common.DXE_RUNTIME_DRIVER]
>>    BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
>> @@ -120,6 +124,24 @@
>>    gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000
>>    gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000
>>
>> +  #
>> +  # PCIe
>> +  #
>> +  gArmTokenSpaceGuid.PcdPciBusMin|0
>> +  gArmTokenSpaceGuid.PcdPciBusMax|255
>> +  gArmTokenSpaceGuid.PcdPciIoBase|0x0
>> +  gArmTokenSpaceGuid.PcdPciIoSize|0x00800000
>> +  gArmTokenSpaceGuid.PcdPciIoTranslation|0x77800000
>> +  gArmTokenSpaceGuid.PcdPciMmio32Base|0x70000000
>> +  gArmTokenSpaceGuid.PcdPciMmio32Size|0x07800000
>> +  gArmTokenSpaceGuid.PcdPciMmio32Translation|0x0
>> +  gArmTokenSpaceGuid.PcdPciMmio64Base|0x500000000
>> +  gArmTokenSpaceGuid.PcdPciMmio64Size|0x300000000
>> +  gArmTokenSpaceGuid.PcdPciMmio64Translation|0x0
>> +  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x60000000
>> +  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|24
>> +  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40
>> +
>>    ## PL011 - Serial Terminal
>>    gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000
>>    gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
>> @@ -237,6 +259,7 @@
>>    MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
>>    MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
>>    MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
>> +  FatPkg/EnhancedFatDxe/Fat.inf
>>
>>    #
>>    # Bds
>> @@ -255,3 +278,28 @@
>>
>>    # SMSC LAN 91C111
>>    EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.inf
>> +
>> +  #
>> +  # Required by PCI
>> +  #
>> +  ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
>> +
>> +  #
>> +  # PCI Support
>> +  #
>> +  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
>> +  MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
>> +    <PcdsFixedAtBuild>
>> +      gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8010004F
>> +  }
>> +
>> +  #
>> +  # AHCI Support
>> +  #
>> +  MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
>> +  MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
>> +
>> +  #
>> +  # SATA Controller
>> +  #
>> +  MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
>> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiPlatform.fdf
>> index 6f6e6aa..17cdf48 100644
>> --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
>> +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
>> @@ -108,6 +108,26 @@ READ_LOCK_STATUS   = TRUE
>>    INF RuleOverride=ACPITABLE Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
>>    INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
>>
>> +  # Required by PCI
>> +  INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
>> +
>> +  #
>> +  # PCI Support
>> +  #
>> +  INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
>> +  INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
>> +
>> +  #
>> +  # AHCI Support
>> +  #
>> +  INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
>> +  INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
>> +
>> +  #
>> +  # SATA Controller
>> +  #
>> +  INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
>> +
>>    #
>>    # Multiple Console IO support
>>    #
>> --
>> 2.7.4

Thanks,
Thomas.

>>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel

[PATCH edk2-platforms v4 9/9] Platform/ARM/Sgi: Add Ssdt, Iort and Mcfg tables

[Thomas Abraham]

SGI platforms support a AHCI controller which is attached to a PCIe
root complex and it can generate PCIe ITS-MSI transactions. So the
Ssdt, Iort and Mcfg ACPI tables to desribe this topology to the
linux kernel.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
---
 .../ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf    |   5 +
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc    | 106 +++++++++++++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc    |  59 ++++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl     |  91 ++++++++++++++++++
 4 files changed, 261 insertions(+)
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl

diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
index 2c9bd98..485f819 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
@@ -25,8 +25,11 @@
   Dsdt.asl
   Fadt.aslc
   Gtdt.aslc
+  Iort.aslc
   Madt.aslc
+  Mcfg.aslc
   Spcr.aslc
+  Ssdt.asl
 
 [Packages]
   ArmPkg/ArmPkg.dec
@@ -51,3 +54,5 @@
   gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
   gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
   gArmPlatformTokenSpaceGuid.PL011UartInterrupt
+
+  gArmSgiTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc
new file mode 100644
index 0000000..f3b3105
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc
@@ -0,0 +1,106 @@
+/** @file
+*  I/O Remapping Table (Iort)
+*
+*  Copyright (c) 2018, ARM Ltd. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/Acpi60.h>
+#include <IndustryStandard/IoRemappingTable.h>
+#include "SgiAcpiHeader.h"
+
+#pragma pack(1)
+
+typedef struct
+{
+  EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE       ItsNode;
+  UINT32                                   ItsIdentifiers;
+} ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;
+
+typedef struct
+{
+  EFI_ACPI_6_0_IO_REMAPPING_RC_NODE        RcNode;
+  EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE       RcIdMap;
+} ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;
+
+typedef struct
+{
+  EFI_ACPI_6_0_IO_REMAPPING_TABLE          Header;
+  ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE   ItsNode;
+  ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE    RcNode;
+} ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE;
+
+#pragma pack ()
+
+ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort =
+{
+  // EFI_ACPI_6_0_IO_REMAPPING_TABLE
+  {
+     ARM_ACPI_HEADER  // EFI_ACPI_DESCRIPTION_HEADER
+     (
+       EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE,
+       ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE,
+       EFI_ACPI_IO_REMAPPING_TABLE_REVISION
+     ),
+     2,  // NumNodes
+     sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE),  // NodeOffset
+     0,  // Reserved
+  },
+  // ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
+  {
+    // EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
+    {
+      // EFI_ACPI_6_0_IO_REMAPPING_NODE
+      {
+        EFI_ACPI_IORT_TYPE_ITS_GROUP,  // Type
+        sizeof (ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE), // Length
+        0,  // Revision
+        0,  // Reserved
+        0,  // NumIdMappings
+        0,  // IdReference
+      },
+      1,    // GIC ITS Identifiers
+    },
+    0,
+  },
+  // ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE
+  {
+    // EFI_ACPI_6_0_IO_REMAPPING_RC_NODE
+    {
+      // EFI_ACPI_6_0_IO_REMAPPING_NODE
+      {
+        EFI_ACPI_IORT_TYPE_ROOT_COMPLEX,  // Type
+        sizeof (ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE),  // Length
+        0,  // Revision
+        0,  // Reserved
+        1,  // NumIdMappings
+        __builtin_offsetof (ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE, RcIdMap),  // IdReference
+      },
+      1,  // CacheCoherent
+      0,  // AllocationHints
+      0,  // Reserved
+      0,  // MemoryAccessFlags
+      EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED,  // AtsAttribute
+      0x0,                                         // PciSegmentNumber
+    },
+    // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE
+    {
+      0x0038,  // InputBase
+      0x0001,  // NumIds
+      0x0038,  // OutputBase
+      __builtin_offsetof (ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE, ItsNode),  // OutputReference
+      0,  // Flags
+    }
+  }
+};
+
+VOID* CONST ReferenceAcpiTable = &Iort;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc
new file mode 100644
index 0000000..22a1018
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc
@@ -0,0 +1,59 @@
+/** @file
+*  Memory mapped configuration space base address description table (MCFG)
+*
+*  Copyright (c) 2018, ARM Ltd. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <IndustryStandard/Acpi61.h>
+#include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
+#include <Library/PcdLib.h>
+#include "SgiAcpiHeader.h"
+#include "SgiPlatform.h"
+
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+#include <IndustryStandard/Acpi.h>
+
+#pragma pack(1)
+typedef struct
+{
+  EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header;
+  EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE Structure[1];
+} EFI_ACPI_PCI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE;
+#pragma pack()
+
+EFI_ACPI_PCI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Mcfg = {
+  {
+    ARM_ACPI_HEADER (
+      EFI_ACPI_6_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
+      EFI_ACPI_PCI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE,
+      EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION
+    ),
+    EFI_ACPI_RESERVED_QWORD,  //Reserved
+  },
+  {
+    // PCIe ECAM
+    {
+      FixedPcdGet32 (PcdPciConfigurationSpaceBaseAddress),  // Base Address
+      0x0,                                                  // Segment Group Number
+      0x0,                                                  // Start Bus Number
+      0xff,                                                 // End Bus Number
+      0x00000000,                                           // Reserved
+    }
+  }
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Mcfg;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl
new file mode 100644
index 0000000..bd418c7
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl
@@ -0,0 +1,91 @@
+/** @file
+*  Secondary System Description Table (SSDT)
+*
+*  Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiAcpiHeader.h"
+
+DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-SGI575",
+                EFI_ACPI_ARM_OEM_REVISION)
+{
+  Scope (_SB) {
+    // PCI Root Complex
+    Device(PCI0) {
+      Name (_HID, EISAID("PNP0A08")) // PCI Express Root Bridge
+      Name (_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge
+      Name (_SEG, Zero)              // PCI Segment Group number
+      Name (_BBN, Zero)              // PCI Base Bus Number
+      Name (_CCA, 1)                 // Cache Coherency Attribute
+
+      // Root complex resources
+      Method (_CRS, 0, Serialized) {
+        Name (RBUF, ResourceTemplate () {
+          WordBusNumber (      // Bus numbers assigned to this root
+            ResourceProducer,
+            MinFixed,
+            MaxFixed,
+            PosDecode,
+            0,                 // AddressGranularity
+            0,                 // AddressMinimum - Minimum Bus Number
+            255,               // AddressMaximum - Maximum Bus Number
+            0,                 // AddressTranslation - Set to 0
+            256                // RangeLength - Number of Busses
+          )
+
+          DWordMemory (        // 32-bit BAR Windows
+            ResourceProducer,
+            PosDecode,
+            MinFixed,
+            MaxFixed,
+            Cacheable,
+            ReadWrite,
+            0x00000000,        // Granularity
+            0x70000000,        // Min Base Address
+            0x777FFFFF,        // Max Base Address
+            0x00000000,        // Translate
+            0x07800000         // Length
+          )
+
+          QWordMemory (        // 64-bit BAR Windows
+            ResourceProducer,
+            PosDecode,
+            MinFixed,
+            MaxFixed,
+            Cacheable,
+            ReadWrite,
+            0x00000000,        // Granularity
+            0x500000000,       // Min Base Address
+            0x7FFFFFFFF,       // Max Base Address
+            0x00000000,        // Translate
+            0x300000000        // Length
+          )
+
+          DWordIo (             // IO window
+            ResourceProducer,
+            MinFixed,
+            MaxFixed,
+            PosDecode,
+            EntireRange,
+            0x00000000,         // Granularity
+            0x00000000,         // Min Base Address
+            0x007FFFFF,         // Max Base Address
+            0x77800000,         // Translate
+            0x00800000          // Length
+          )
+        }) // Name(RBUF)
+
+        Return (RBUF)
+      } // Method (_CRS)
+    }
+  }
+}
-- 
2.7.4

Re: [PATCH edk2-platforms v4 9/9] Platform/ARM/Sgi: Add Ssdt, Iort and Mcfg tables

[Ard Biesheuvel]

On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
> SGI platforms support a AHCI controller which is attached to a PCIe
> root complex and it can generate PCIe ITS-MSI transactions. So the
> Ssdt, Iort and Mcfg ACPI tables to desribe this topology to the
> linux kernel.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
> ---
>  .../ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf    |   5 +
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc    | 106 +++++++++++++++++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc    |  59 ++++++++++++
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl     |  91 ++++++++++++++++++
>  4 files changed, 261 insertions(+)
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl
>
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
> index 2c9bd98..485f819 100644
> --- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
> @@ -25,8 +25,11 @@
>    Dsdt.asl
>    Fadt.aslc
>    Gtdt.aslc
> +  Iort.aslc
>    Madt.aslc
> +  Mcfg.aslc
>    Spcr.aslc
> +  Ssdt.asl
>
>  [Packages]
>    ArmPkg/ArmPkg.dec
> @@ -51,3 +54,5 @@
>    gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
>    gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
>    gArmPlatformTokenSpaceGuid.PL011UartInterrupt
> +
> +  gArmSgiTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc
> new file mode 100644
> index 0000000..f3b3105
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc
> @@ -0,0 +1,106 @@
> +/** @file
> +*  I/O Remapping Table (Iort)
> +*
> +*  Copyright (c) 2018, ARM Ltd. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include <IndustryStandard/Acpi.h>
> +#include <IndustryStandard/Acpi60.h>
> +#include <IndustryStandard/IoRemappingTable.h>
> +#include "SgiAcpiHeader.h"
> +
> +#pragma pack(1)
> +
> +typedef struct
> +{
> +  EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE       ItsNode;
> +  UINT32                                   ItsIdentifiers;
> +} ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;
> +
> +typedef struct
> +{
> +  EFI_ACPI_6_0_IO_REMAPPING_RC_NODE        RcNode;
> +  EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE       RcIdMap;
> +} ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;
> +
> +typedef struct
> +{
> +  EFI_ACPI_6_0_IO_REMAPPING_TABLE          Header;
> +  ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE   ItsNode;
> +  ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE    RcNode;
> +} ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE;
> +
> +#pragma pack ()
> +
> +ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort =
> +{
> +  // EFI_ACPI_6_0_IO_REMAPPING_TABLE
> +  {
> +     ARM_ACPI_HEADER  // EFI_ACPI_DESCRIPTION_HEADER
> +     (
> +       EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE,
> +       ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE,
> +       EFI_ACPI_IO_REMAPPING_TABLE_REVISION
> +     ),
> +     2,  // NumNodes
> +     sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE),  // NodeOffset
> +     0,  // Reserved
> +  },
> +  // ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
> +  {
> +    // EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
> +    {
> +      // EFI_ACPI_6_0_IO_REMAPPING_NODE
> +      {
> +        EFI_ACPI_IORT_TYPE_ITS_GROUP,  // Type
> +        sizeof (ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE), // Length
> +        0,  // Revision
> +        0,  // Reserved
> +        0,  // NumIdMappings
> +        0,  // IdReference
> +      },
> +      1,    // GIC ITS Identifiers
> +    },
> +    0,
> +  },
> +  // ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE
> +  {
> +    // EFI_ACPI_6_0_IO_REMAPPING_RC_NODE
> +    {
> +      // EFI_ACPI_6_0_IO_REMAPPING_NODE
> +      {
> +        EFI_ACPI_IORT_TYPE_ROOT_COMPLEX,  // Type
> +        sizeof (ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE),  // Length
> +        0,  // Revision
> +        0,  // Reserved
> +        1,  // NumIdMappings
> +        __builtin_offsetof (ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE, RcIdMap),  // IdReference
> +      },
> +      1,  // CacheCoherent
> +      0,  // AllocationHints
> +      0,  // Reserved
> +      0,  // MemoryAccessFlags
> +      EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED,  // AtsAttribute
> +      0x0,                                         // PciSegmentNumber
> +    },
> +    // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE
> +    {
> +      0x0038,  // InputBase
> +      0x0001,  // NumIds
> +      0x0038,  // OutputBase

This looks slightly dodgy to me. NumIds is zero based, so you are
mapping device IDs 0x38 and 0x39 only. Is that what you intended?

It is best to identity remap the entire RID range, even if the virtual
AHCI is the only one that ever uses it. Alternatively, you can create
a EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE mapping for the particular
device ID that the AHCI uses.

> +      __builtin_offsetof (ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE, ItsNode),  // OutputReference
> +      0,  // Flags
> +    }
> +  }
> +};
> +
> +VOID* CONST ReferenceAcpiTable = &Iort;
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc
> new file mode 100644
> index 0000000..22a1018
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc
> @@ -0,0 +1,59 @@
> +/** @file
> +*  Memory mapped configuration space base address description table (MCFG)
> +*
> +*  Copyright (c) 2018, ARM Ltd. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include <IndustryStandard/Acpi61.h>
> +#include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
> +#include <Library/PcdLib.h>
> +#include "SgiAcpiHeader.h"
> +#include "SgiPlatform.h"
> +
> +#include <Library/AcpiLib.h>
> +#include <Library/ArmLib.h>
> +#include <IndustryStandard/Acpi.h>
> +
> +#pragma pack(1)
> +typedef struct
> +{
> +  EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header;
> +  EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE Structure[1];
> +} EFI_ACPI_PCI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE;
> +#pragma pack()
> +
> +EFI_ACPI_PCI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Mcfg = {
> +  {
> +    ARM_ACPI_HEADER (
> +      EFI_ACPI_6_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
> +      EFI_ACPI_PCI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE,
> +      EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION
> +    ),
> +    EFI_ACPI_RESERVED_QWORD,  //Reserved
> +  },
> +  {
> +    // PCIe ECAM
> +    {
> +      FixedPcdGet32 (PcdPciConfigurationSpaceBaseAddress),  // Base Address
> +      0x0,                                                  // Segment Group Number
> +      0x0,                                                  // Start Bus Number
> +      0xff,                                                 // End Bus Number

Please use the BusMin and BusMax PCDs here.

> +      0x00000000,                                           // Reserved
> +    }
> +  }
> +};
> +
> +//
> +// Reference the table being generated to prevent the optimizer from removing the
> +// data structure from the executable
> +//
> +VOID* CONST ReferenceAcpiTable = &Mcfg;
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl
> new file mode 100644
> index 0000000..bd418c7
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl
> @@ -0,0 +1,91 @@
> +/** @file
> +*  Secondary System Description Table (SSDT)
> +*
> +*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "SgiAcpiHeader.h"
> +
> +DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-SGI575",
> +                EFI_ACPI_ARM_OEM_REVISION)
> +{
> +  Scope (_SB) {
> +    // PCI Root Complex
> +    Device(PCI0) {
> +      Name (_HID, EISAID("PNP0A08")) // PCI Express Root Bridge
> +      Name (_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge
> +      Name (_SEG, Zero)              // PCI Segment Group number
> +      Name (_BBN, Zero)              // PCI Base Bus Number
> +      Name (_CCA, 1)                 // Cache Coherency Attribute
> +

Does this RC not support legacy INTx interrupts?

> +      // Root complex resources
> +      Method (_CRS, 0, Serialized) {
> +        Name (RBUF, ResourceTemplate () {
> +          WordBusNumber (      // Bus numbers assigned to this root
> +            ResourceProducer,
> +            MinFixed,
> +            MaxFixed,
> +            PosDecode,
> +            0,                 // AddressGranularity
> +            0,                 // AddressMinimum - Minimum Bus Number
> +            255,               // AddressMaximum - Maximum Bus Number
> +            0,                 // AddressTranslation - Set to 0
> +            256                // RangeLength - Number of Busses
> +          )
> +
> +          DWordMemory (        // 32-bit BAR Windows
> +            ResourceProducer,
> +            PosDecode,
> +            MinFixed,
> +            MaxFixed,
> +            Cacheable,
> +            ReadWrite,
> +            0x00000000,        // Granularity
> +            0x70000000,        // Min Base Address
> +            0x777FFFFF,        // Max Base Address
> +            0x00000000,        // Translate
> +            0x07800000         // Length
> +          )
> +
> +          QWordMemory (        // 64-bit BAR Windows
> +            ResourceProducer,
> +            PosDecode,
> +            MinFixed,
> +            MaxFixed,
> +            Cacheable,
> +            ReadWrite,
> +            0x00000000,        // Granularity
> +            0x500000000,       // Min Base Address
> +            0x7FFFFFFFF,       // Max Base Address
> +            0x00000000,        // Translate
> +            0x300000000        // Length
> +          )
> +
> +          DWordIo (             // IO window
> +            ResourceProducer,
> +            MinFixed,
> +            MaxFixed,
> +            PosDecode,
> +            EntireRange,
> +            0x00000000,         // Granularity
> +            0x00000000,         // Min Base Address
> +            0x007FFFFF,         // Max Base Address
> +            0x77800000,         // Translate
> +            0x00800000          // Length

You need to set the TypeTranslation attribute here.

> +          )
> +        }) // Name(RBUF)
> +
> +        Return (RBUF)
> +      } // Method (_CRS)
> +    }
> +  }
> +}
> --
> 2.7.4
>

Re: [PATCH edk2-platforms v4 9/9] Platform/ARM/Sgi: Add Ssdt, Iort and Mcfg tables

[Thomas Abraham]

On Mon, May 21, 2018 at 2:59 PM, Ard Biesheuvel
<ard.biesheuvel@linaro.org> wrote:
> On 21 May 2018 at 10:25, Thomas Abraham <thomas.abraham@arm.com> wrote:
>> SGI platforms support a AHCI controller which is attached to a PCIe
>> root complex and it can generate PCIe ITS-MSI transactions. So the
>> Ssdt, Iort and Mcfg ACPI tables to desribe this topology to the
>> linux kernel.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
>> ---
>>  .../ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf    |   5 +
>>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc    | 106 +++++++++++++++++++++
>>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc    |  59 ++++++++++++
>>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl     |  91 ++++++++++++++++++
>>  4 files changed, 261 insertions(+)
>>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc
>>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Mcfg.aslc
>>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Ssdt.asl
>>
>> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
>> index 2c9bd98..485f819 100644
>> --- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
>> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
>> @@ -25,8 +25,11 @@
>>    Dsdt.asl
>>    Fadt.aslc
>>    Gtdt.aslc
>> +  Iort.aslc
>>    Madt.aslc
>> +  Mcfg.aslc
>>    Spcr.aslc
>> +  Ssdt.asl
>>
>>  [Packages]
>>    ArmPkg/ArmPkg.dec
>> @@ -51,3 +54,5 @@
>>    gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
>>    gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
>>    gArmPlatformTokenSpaceGuid.PL011UartInterrupt
>> +
>> +  gArmSgiTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress
>> diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc
>> new file mode 100644
>> index 0000000..f3b3105
>> --- /dev/null
>> +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Iort.aslc
>> @@ -0,0 +1,106 @@
>> +/** @file
>> +*  I/O Remapping Table (Iort)
>> +*
>> +*  Copyright (c) 2018, ARM Ltd. All rights reserved.
>> +*
>> +*  This program and the accompanying materials are licensed and made available
>> +*  under the terms and conditions of the BSD License which accompanies this
>> +*  distribution.  The full text of the license may be found at
>> +*  http://opensource.org/licenses/bsd-license.php
>> +*
>> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#include <IndustryStandard/Acpi.h>
>> +#include <IndustryStandard/Acpi60.h>
>> +#include <IndustryStandard/IoRemappingTable.h>
>> +#include "SgiAcpiHeader.h"
>> +
>> +#pragma pack(1)
>> +
>> +typedef struct
>> +{
>> +  EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE       ItsNode;
>> +  UINT32                                   ItsIdentifiers;
>> +} ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;
>> +
>> +typedef struct
>> +{
>> +  EFI_ACPI_6_0_IO_REMAPPING_RC_NODE        RcNode;
>> +  EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE       RcIdMap;
>> +} ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;
>> +
>> +typedef struct
>> +{
>> +  EFI_ACPI_6_0_IO_REMAPPING_TABLE          Header;
>> +  ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE   ItsNode;
>> +  ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE    RcNode;
>> +} ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE;
>> +
>> +#pragma pack ()
>> +
>> +ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort =
>> +{
>> +  // EFI_ACPI_6_0_IO_REMAPPING_TABLE
>> +  {
>> +     ARM_ACPI_HEADER  // EFI_ACPI_DESCRIPTION_HEADER
>> +     (
>> +       EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE,
>> +       ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE,
>> +       EFI_ACPI_IO_REMAPPING_TABLE_REVISION
>> +     ),
>> +     2,  // NumNodes
>> +     sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE),  // NodeOffset
>> +     0,  // Reserved
>> +  },
>> +  // ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
>> +  {
>> +    // EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
>> +    {
>> +      // EFI_ACPI_6_0_IO_REMAPPING_NODE
>> +      {
>> +        EFI_ACPI_IORT_TYPE_ITS_GROUP,  // Type
>> +        sizeof (ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE), // Length
>> +        0,  // Revision
>> +        0,  // Reserved
>> +        0,  // NumIdMappings
>> +        0,  // IdReference
>> +      },
>> +      1,    // GIC ITS Identifiers
>> +    },
>> +    0,
>> +  },
>> +  // ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE
>> +  {
>> +    // EFI_ACPI_6_0_IO_REMAPPING_RC_NODE
>> +    {
>> +      // EFI_ACPI_6_0_IO_REMAPPING_NODE
>> +      {
>> +        EFI_ACPI_IORT_TYPE_ROOT_COMPLEX,  // Type
>> +        sizeof (ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE),  // Length
>> +        0,  // Revision
>> +        0,  // Reserved
>> +        1,  // NumIdMappings
>> +        __builtin_offsetof (ARM_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE, RcIdMap),  // IdReference
>> +      },
>> +      1,  // CacheCoherent
>> +      0,  // AllocationHints
>> +      0,  // Reserved
>> +      0,  // MemoryAccessFlags
>> +      EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED,  // AtsAttribute
>> +      0x0,                                         // PciSegmentNumber
>> +    },
>> +    // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE
>> +    {
>> +      0x0038,  // InputBase
>> +      0x0001,  // NumIds
>> +      0x0038,  // OutputBase
>
> This looks slightly dodgy to me. NumIds is zero based, so you are
> mapping device IDs 0x38 and 0x39 only. Is that what you intended?

Yes, that was the intent. I had tested it with these values. But
looking at again, it seems better to keep it zero based. Will fix it
in the next version.

>
> It is best to identity remap the entire RID range, even if the virtual
> AHCI is the only one that ever uses it. Alternatively, you can create
> a EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE mapping for the particular
> device ID that the AHCI uses.

Okay.

Thanks,
Thomas.

<snip>