From: Thomas Abraham <thomas.abraham@arm.com>
To: edk2-devel@lists.01.org
Cc: ard.biesheuvel@linaro.org, leif.lindholm@linaro.org,
Alexei.Fedorov@arm.com, Evan.Lloyd@arm.com,
Daniil Egranov <daniil.egranov@arm.com>
Subject: [PATCH edk2-platforms v6 5/9] Platform/ARM/Sgi: add the initial set of acpi tables
Date: Thu, 24 May 2018 17:03:06 +0530 [thread overview]
Message-ID: <1527161586-28741-1-git-send-email-thomas.abraham@arm.com> (raw)
In-Reply-To: <1527161473-28584-1-git-send-email-thomas.abraham@arm.com>
From: Daniil Egranov <daniil.egranov@arm.com>
Add the initial set of Acpi tables for the SGI-575 platform. These tables
conform to the ACPI specification version 6.1. Some of the mandatory tables
required for SBBR v1.0 compilance are not included in this initial set
of Acpi tables.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
---
.../ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf | 51 ++++++
Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc | 90 +++++++++++
Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl | 99 ++++++++++++
Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc | 87 +++++++++++
Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc | 152 ++++++++++++++++++
Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc | 173 +++++++++++++++++++++
Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc | 77 +++++++++
.../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 7 +
.../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 6 +
| 41 +++++
.../ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 4 +
11 files changed, 787 insertions(+)
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
create mode 100644 Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
new file mode 100644
index 0000000..ec47f94
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf
@@ -0,0 +1,51 @@
+## @file
+# ACPI table data and ASL sources required to boot the platform.
+#
+# Copyright (c) 2018, ARM Ltd. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available
+# under the terms and conditions of the BSD License which accompanies this
+# distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = Sgi575AcpiTables
+ FILE_GUID = c712719a-0aaf-438c-9cdd-35ab4d60207d # gSgi575AcpiTablesiFileGuid
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+
+[Sources]
+ Dbg2.aslc
+ Dsdt.asl
+ Fadt.aslc
+ Gtdt.aslc
+ Madt.aslc
+ Spcr.aslc
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/SgiPkg/SgiPlatform.dec
+
+[FixedPcd]
+ gArmPlatformTokenSpaceGuid.PcdCoreCount
+ gArmPlatformTokenSpaceGuid.PcdClusterCount
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt
+
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
new file mode 100644
index 0000000..ed671f3
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc
@@ -0,0 +1,90 @@
+/** @file
+* Debug Port Table 2 (DBG2)
+*
+* Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <IndustryStandard/Acpi61.h>
+#include <IndustryStandard/DebugPort2Table.h>
+
+#define SGI_DBG2_NUM_DEBUG_PORTS 1
+#define SGI_DBG2_NUM_GAS 1
+#define SGI_DBG2_NS_STR_LENGTH 8
+#define SGI_PL011_REGISTER_SPACE 0x1000
+
+#define NAME_STR_UART1 {'C', 'O', 'M', '1', '\0', '\0', '\0', '\0'}
+
+#pragma pack(1)
+
+typedef struct {
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device;
+ EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister;
+ UINT32 AddressSize;
+ UINT8 NameSpaceString[SGI_DBG2_NS_STR_LENGTH];
+} DBG2_DEBUG_DEVICE_INFORMATION;
+
+typedef struct {
+ EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description;
+ DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo[SGI_DBG2_NUM_DEBUG_PORTS];
+} DBG2_TABLE;
+
+#pragma pack()
+
+#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNameStr) { \
+ { \
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, /* UINT8 Revision */ \
+ sizeof (DBG2_DEBUG_DEVICE_INFORMATION), /* UINT16 Length */ \
+ NumReg, /* UINT8 NumberofGenericAddressRegisters */ \
+ SGI_DBG2_NS_STR_LENGTH, /* UINT16 NameSpaceStringLength */ \
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString), /* UINT16 NameSpaceStringOffset */ \
+ 0, /* UINT16 OemDataLength */ \
+ 0, /* UINT16 OemDataOffset */ \
+ EFI_ACPI_DBG2_PORT_TYPE_SERIAL, /* UINT16 Port Type */ \
+ SubType, /* UINT16 Port Subtype */ \
+ { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, /* UINT8 Reserved[2] */ \
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* UINT16 BaseAddressRegister Offset */ \
+ OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize) /* UINT16 AddressSize Offset */ \
+ }, \
+ ARM_GAS32 (UartBase), /* EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister */ \
+ UartAddrLen, /* UINT32 AddressSize */ \
+ UartNameStr /* UINT8 NameSpaceString[MAX_DBG2_NAME_LEN] */ \
+}
+
+STATIC DBG2_TABLE Dbg2 = {
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_1_DEBUG_PORT_2_TABLE_SIGNATURE,
+ DBG2_TABLE,
+ EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION
+ ),
+ OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo),
+ SGI_DBG2_NUM_DEBUG_PORTS
+ },
+ {
+ // Kernel Debug Port
+ DBG2_DEBUG_PORT_DDI (
+ SGI_DBG2_NUM_GAS,
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART,
+ FixedPcdGet64 (PcdSerialDbgRegisterBase),
+ SGI_PL011_REGISTER_SPACE,
+ NAME_STR_UART1
+ ),
+ }
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Dbg2;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
new file mode 100644
index 0000000..ceeac5f
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
@@ -0,0 +1,99 @@
+/** @file
+* Differentiated System Description Table Fields (DSDT)
+*
+* Copyright (c) 2018, ARM Ltd. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+
+DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-SGI575", EFI_ACPI_ARM_OEM_REVISION) {
+ Scope(_SB) {
+
+ Device(CP00) { // A75-0: Cluster 0, Cpu 0
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0)
+ Name(_STA, 0xF)
+ }
+
+ Device(CP01) { // A75-0: Cluster 0, Cpu 1
+ Name(_HID, "ACPI0007")
+ Name(_UID, 1)
+ Name(_STA, 0xF)
+ }
+
+ Device(CP02) { // A75-0: Cluster 0, Cpu 2
+ Name(_HID, "ACPI0007")
+ Name(_UID, 2)
+ Name(_STA, 0xF)
+ }
+
+ Device(CP03) { // A75-0: Cluster 0, Cpu 3
+ Name(_HID, "ACPI0007")
+ Name(_UID, 3)
+ Name(_STA, 0xF)
+ }
+
+ Device(CP04) { // A75-0: Cluster 1, Cpu 0
+ Name(_HID, "ACPI0007")
+ Name(_UID, 4)
+ Name(_STA, 0xF)
+ }
+
+ Device(CP05) { // A75-0: Cluster 1, Cpu 1
+ Name(_HID, "ACPI0007")
+ Name(_UID, 5)
+ Name(_STA, 0xF)
+ }
+
+ Device(CP06) { // A75-0: Cluster 1, Cpu 2
+ Name(_HID, "ACPI0007")
+ Name(_UID, 6)
+ Name(_STA, 0xF)
+ }
+
+ Device(CP07) { // A75-0: Cluster 1, Cpu 3
+ Name(_HID, "ACPI0007")
+ Name(_UID, 7)
+ Name(_STA, 0xF)
+ }
+
+ // UART PL011
+ Device(COM0) {
+ Name(_HID, "ARMH0011")
+ Name(_CID, "ARMH0011")
+ Name(_UID, Zero)
+ Name(_STA, 0xF)
+ Name(_CRS, ResourceTemplate() {
+ Memory32Fixed(ReadWrite, 0x7FF80000, 0x1000)
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }
+ })
+ }
+
+ // SMSC 91C111
+ Device(ETH0) {
+ Name(_HID, "LNRO0003")
+ Name(_UID, Zero)
+ Name(_STA, 0xF)
+ Name(_CRS, ResourceTemplate() {
+ Memory32Fixed(ReadWrite, 0x18000000, 0x1000)
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }
+ })
+ Name(_DSD, Package() {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package() {
+ Package(2) {"reg-io-width", 4 },
+ }
+ })
+ }
+ } // Scope(_SB)
+}
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
new file mode 100644
index 0000000..ed96298
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc
@@ -0,0 +1,87 @@
+/** @file
+* Fixed ACPI Description Table (FADT)
+*
+* Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <IndustryStandard/Acpi.h>
+
+STATIC EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE,
+ EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
+ ),
+ 0, // UINT32 FirmwareCtrl
+ 0, // UINT32 Dsdt
+ EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0
+ EFI_ACPI_6_1_PM_PROFILE_ENTERPRISE_SERVER, // UINT8 PreferredPmProfile
+ 0, // UINT16 SciInt
+ 0, // UINT32 SmiCmd
+ 0, // UINT8 AcpiEnable
+ 0, // UINT8 AcpiDisable
+ 0, // UINT8 S4BiosReq
+ 0, // UINT8 PstateCnt
+ 0, // UINT32 Pm1aEvtBlk
+ 0, // UINT32 Pm1bEvtBlk
+ 0, // UINT32 Pm1aCntBlk
+ 0, // UINT32 Pm1bCntBlk
+ 0, // UINT32 Pm2CntBlk
+ 0, // UINT32 PmTmrBlk
+ 0, // UINT32 Gpe0Blk
+ 0, // UINT32 Gpe1Blk
+ 0, // UINT8 Pm1EvtLen
+ 0, // UINT8 Pm1CntLen
+ 0, // UINT8 Pm2CntLen
+ 0, // UINT8 PmTmrLen
+ 0, // UINT8 Gpe0BlkLen
+ 0, // UINT8 Gpe1BlkLen
+ 0, // UINT8 Gpe1Base
+ 0, // UINT8 CstCnt
+ 0, // UINT16 PLvl2Lat
+ 0, // UINT16 PLvl3Lat
+ 0, // UINT16 FlushSize
+ 0, // UINT16 FlushStride
+ 0, // UINT8 DutyOffset
+ 0, // UINT8 DutyWidth
+ 0, // UINT8 DayAlrm
+ 0, // UINT8 MonAlrm
+ 0, // UINT8 Century
+ 0, // UINT16 IaPcBootArch
+ 0, // UINT8 Reserved1
+ EFI_ACPI_6_1_HW_REDUCED_ACPI | EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE, // UINT32 Flags
+ NULL_GAS, // GAS ResetReg
+ 0, // UINT8 ResetValue
+ EFI_ACPI_6_1_ARM_PSCI_COMPLIANT, // UINT16 ArmBootArchFlags
+ EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // UINT8 MinorRevision
+ 0, // UINT64 XFirmwareCtrl
+ 0, // UINT64 XDsdt
+ NULL_GAS, // GAS XPm1aEvtBlk
+ NULL_GAS, // GAS XPm1bEvtBlk
+ NULL_GAS, // GAS XPm1aCntBlk
+ NULL_GAS, // GAS XPm1bCntBlk
+ NULL_GAS, // GAS XPm2CntBlk
+ NULL_GAS, // GAS XPmTmrBlk
+ NULL_GAS, // GAS XGpe0Blk
+ NULL_GAS, // GAS XGpe1Blk
+ NULL_GAS, // GAS SleepControlReg
+ NULL_GAS, // GAS SleepStatusReg
+ 0 // UINT64 HypervisorVendorIdentity;
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Fadt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
new file mode 100644
index 0000000..46d811e
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc
@@ -0,0 +1,152 @@
+/** @file
+* Generic Timer Description Table (GTDT)
+*
+* Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <Library/PcdLib.h>
+#include <IndustryStandard/Acpi61.h>
+
+#define SGI_PLATFORM_WATCHDOG_COUNT 2
+#define SGI_PLATFORM_TIMER_COUNT (SGI_PLATFORM_WATCHDOG_COUNT + 1)
+#define SGI_TIMER_FRAMES_COUNT 2
+
+#define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF
+#define GTDT_GLOBAL_FLAGS 0
+#define GTDT_GTIMER_FLAGS EFI_ACPI_6_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
+
+#define SGI_GT_BLOCK_CTL_BASE 0x2A810000
+#define SGI_GT_BLOCK_FRAME1_CTL_BASE 0x2A820000
+#define SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE 0xFFFFFFFFFFFFFFFF
+#define SGI_GT_BLOCK_FRAME1_GSIV 0x5B
+
+#define SGI_GT_BLOCK_FRAME0_CTL_BASE 0x2A830000
+#define SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE 0xFFFFFFFFFFFFFFFF
+#define SGI_GT_BLOCK_FRAME0_GSIV 0x5C
+
+#define SGI_GTX_TIMER_FLAGS 0
+#define GTX_TIMER_SECURE EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER
+#define GTX_TIMER_NON_SECURE 0
+#define GTX_TIMER_SAVE_CONTEXT EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY
+#define SGI_GTX_COMMON_FLAGS_S (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_SECURE)
+#define SGI_GTX_COMMON_FLAGS_NS (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_NON_SECURE)
+
+#define EFI_ACPI_6_1_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT( \
+ RefreshFramePhysicalAddress, ControlFramePhysicalAddress, \
+ WatchdogTimerGSIV, WatchdogTimerFlags) \
+ { \
+ EFI_ACPI_6_1_GTDT_SBSA_GENERIC_WATCHDOG, \
+ sizeof (EFI_ACPI_6_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE), \
+ EFI_ACPI_RESERVED_WORD, \
+ RefreshFramePhysicalAddress, \
+ ControlFramePhysicalAddress, \
+ WatchdogTimerGSIV, \
+ WatchdogTimerFlags \
+ }
+
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt;
+ EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE GtBlock;
+ EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE Frames[SGI_TIMER_FRAMES_COUNT];
+ EFI_ACPI_6_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE Watchdogs[SGI_PLATFORM_WATCHDOG_COUNT];
+} EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES;
+
+#pragma pack ()
+
+STATIC EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES,
+ EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
+ ),
+ SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
+ 0, // UINT32 Reserved
+ FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV
+ GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
+ FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV
+ GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
+ FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV
+ GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
+ FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV
+ GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
+ 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress
+ SGI_PLATFORM_TIMER_COUNT, // UINT32 PlatformTimerCount
+ sizeof (EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 PlatfromTimerOffset
+ },
+ {
+ EFI_ACPI_6_1_GTDT_GT_BLOCK, // UINT8 Type
+ sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE) + // UINT16 Length
+ sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE) *
+ SGI_TIMER_FRAMES_COUNT,
+ EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved
+ SGI_GT_BLOCK_CTL_BASE, // UINT64 CntCtlBase
+ SGI_TIMER_FRAMES_COUNT, // UINT32 GTBlockTimerCount
+ sizeof (EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE) // UINT32 GTBlockTimerOffset
+ },
+ {
+ {
+ 0, // UINT8 GTFrameNumber
+ {
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE
+ }, // UINT8 Reserved[3]
+ SGI_GT_BLOCK_FRAME0_CTL_BASE, // UINT64 CntBaseX
+ SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE, // UINT64 CntEL0BaseX
+ SGI_GT_BLOCK_FRAME0_GSIV, // UINT32 GTxPhysicalTimerGSIV
+ SGI_GTX_TIMER_FLAGS, // UINT32 GTxPhysicalTimerFlags
+ 0, // UINT32 GTxVirtualTimerGSIV
+ 0, // UINT32 GTxVirtualTimerFlags
+ SGI_GTX_COMMON_FLAGS_NS // UINT32 GTxCommonFlags
+ },
+ {
+ 1, // UINT8 GTFrameNumber
+ {
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE
+ }, // UINT8 Reserved[3]
+ SGI_GT_BLOCK_FRAME1_CTL_BASE, // UINT64 CntBaseX
+ SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE, // UINT64 CntEL0BaseX
+ SGI_GT_BLOCK_FRAME1_GSIV, // UINT32 GTxPhysicalTimerGSIV
+ SGI_GTX_TIMER_FLAGS, // UINT32 GTxPhysicalTimerFlags
+ 0, // UINT32 GTxVirtualTimerGSIV
+ 0, // UINT32 GTxVirtualTimerFlags
+ SGI_GTX_COMMON_FLAGS_S // UINT32 GTxCommonFlags
+ }
+ },
+ {
+ EFI_ACPI_6_1_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT (
+ FixedPcdGet32 (PcdGenericWatchdogRefreshBase),
+ FixedPcdGet32 (PcdGenericWatchdogControlBase),
+ 93,
+ 0
+ ),
+ EFI_ACPI_6_1_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT (
+ FixedPcdGet32 (PcdGenericWatchdogRefreshBase),
+ FixedPcdGet32 (PcdGenericWatchdogControlBase),
+ 94,
+ EFI_ACPI_6_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER
+ )
+ }
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Gtdt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
new file mode 100644
index 0000000..4f98120
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc
@@ -0,0 +1,173 @@
+/** @file
+* Multiple APIC Description Table (MADT)
+*
+* Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiPlatform.h"
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+#include <Library/PcdLib.h>
+#include <IndustryStandard/Acpi.h>
+
+#define CORES (FixedPcdGet32 (PcdClusterCount) * \
+ FixedPcdGet32 (PcdCoreCount))
+
+// EFI_ACPI_6_1_GIC_STRUCTURE
+#define EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, \
+ PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) \
+ { \
+ EFI_ACPI_6_1_GIC, /* Type */ \
+ sizeof (EFI_ACPI_6_1_GIC_STRUCTURE), /* Length */ \
+ EFI_ACPI_RESERVED_WORD, /* Reserved */ \
+ GicId, /* CPUInterfaceNumber */ \
+ AcpiCpuUid, /* AcpiProcessorUid */ \
+ Flags, /* Flags */ \
+ 0, /* ParkingProtocolVersion */ \
+ PmuIrq, /* PerformanceInterruptGsiv */ \
+ 0, /* ParkedAddress */ \
+ GicBase, /* PhysicalBaseAddress */ \
+ GicVBase, /* GICV */ \
+ GicHBase, /* GICH */ \
+ GsivId, /* VGICMaintenanceInterrupt */ \
+ GicRBase, /* GICRBaseAddress */ \
+ Mpidr, /* MPIDR */ \
+ Efficiency, /* ProcessorPowerEfficiencyClass */ \
+ { \
+ EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
+ EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
+ EFI_ACPI_RESERVED_BYTE /* Reserved2[2] */ \
+ } \
+ }
+
+// EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE
+#define EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, \
+ GicDistVector, GicVersion) \
+ { \
+ EFI_ACPI_6_1_GICD, /* Type */ \
+ sizeof (EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE), \
+ EFI_ACPI_RESERVED_WORD, /* Reserved1 */ \
+ GicDistHwId, /* GicId */ \
+ GicDistBase, /* PhysicalBaseAddress */ \
+ GicDistVector, /* SystemVectorBase */ \
+ GicVersion, /* GicVersion */ \
+ { \
+ EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ \
+ EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ \
+ EFI_ACPI_RESERVED_BYTE, /* Reserved2[2] */ \
+ } \
+ }
+
+// EFI_ACPI_6_1_GICR_STRUCTURE
+#define EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLength) \
+ { \
+ EFI_ACPI_6_1_GICR, /* Type */ \
+ sizeof (EFI_ACPI_6_1_GICR_STRUCTURE), /* Length */ \
+ EFI_ACPI_RESERVED_WORD, /* Reserved */ \
+ RedisRegionAddr, /* DiscoveryRangeBaseAddress */ \
+ RedisDiscLength /* DiscoveryRangeLength */ \
+ }
+
+// EFI_ACPI_6_1_GIC_ITS_STRUCTURE
+#define EFI_ACPI_6_1_GIC_ITS_INIT(GicItsId, GicItsBase) \
+ { \
+ EFI_ACPI_6_1_GIC_ITS, /* Type */ \
+ sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE), \
+ EFI_ACPI_RESERVED_WORD, /* Reserved */ \
+ GicItsId, /* GicItsId */ \
+ GicItsBase, /* PhysicalBaseAddress */ \
+ EFI_ACPI_RESERVED_DWORD, /* DiscoveryRangeLength */ \
+ }
+
+//
+// Multiple APIC Description Table
+//
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+ EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[CORES];
+ EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
+ EFI_ACPI_6_1_GICR_STRUCTURE GicRedistributor;
+ EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicIts;
+} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+#pragma pack ()
+
+STATIC EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE,
+ EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
+ ),
+ // MADT specific fields
+ 0, // LocalApicAddress
+ 0, // Flags
+ },
+ {
+ // Format: EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
+ // PmuIrq, GicBase, GicVBase,
+ // GicHBase, GsivId, GicRBase,
+ // Efficiency)
+ // Note: The GIC Structure of the primary CPU must be the first entry
+ // (see note in 5.2.12.14 GICC Structure of ACPI v6.1).
+ EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-0
+ 0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-1
+ 0, 1, GET_MPID(0x0, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-2
+ 0, 2, GET_MPID(0x0, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-3
+ 0, 3, GET_MPID(0x0, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+
+ EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-4
+ 0, 4, GET_MPID(0x100, 0x00), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-5
+ 0, 5, GET_MPID(0x100, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-6
+ 0, 6, GET_MPID(0x100, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A75-7
+ 0, 7, GET_MPID(0x100, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23,
+ FixedPcdGet32 (PcdGicDistributorBase),
+ 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),
+ },
+ // GIC Distributor Entry
+ EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),
+ 0, 3),
+ // GIC Redistributor
+ EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase),
+ SIZE_1MB),
+ // GIC ITS
+ EFI_ACPI_6_1_GIC_ITS_INIT(0, 0x30040000),
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing
+// the data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Madt;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
new file mode 100644
index 0000000..5265225
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc
@@ -0,0 +1,77 @@
+/** @file
+* Serial Port Console Redirection Table (SPCR)
+*
+* Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include <Library/AcpiLib.h>
+#include <IndustryStandard/Acpi61.h>
+#include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
+
+STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE,
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION
+ ),
+ // UINT8 InterfaceType;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART,
+ // UINT8 Reserved1[3];
+ {
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE
+ },
+ // EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE BaseAddress;
+ ARM_GAS32 (0x7FF80000),
+ // UINT8 InterruptType;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC,
+ // UINT8 Irq;
+ 0,
+ // UINT32 GlobalSystemInterrupt;
+ FixedPcdGet32 (PL011UartInterrupt),
+ // UINT8 BaudRate;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200,
+ // UINT8 Parity;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY,
+ // UINT8 StopBits;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1,
+ // UINT8 FlowControl;
+ 0,
+ // UINT8 TerminalType;
+ EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_ANSI,
+ // UINT8 Reserved2;
+ EFI_ACPI_RESERVED_BYTE,
+ // UINT16 PciDeviceId;
+ 0xFFFF,
+ // UINT16 PciVendorId;
+ 0xFFFF,
+ // UINT8 PciBusNumber;
+ 0x00,
+ // UINT8 PciDeviceNumber;
+ 0x00,
+ // UINT8 PciFunctionNumber;
+ 0x00,
+ // UINT32 PciFlags;
+ 0x00000000,
+ // UINT8 PciSegment;
+ 0x00,
+ // UINT32 Reserved3;
+ EFI_ACPI_RESERVED_DWORD
+};
+
+//
+// Reference the table being generated to prevent the optimizer from removing the
+// data structure from the executable
+//
+VOID* CONST ReferenceAcpiTable = &Spcr;
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
index ff30a42..39de49e 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
@@ -12,6 +12,7 @@
*
**/
+#include <Library/AcpiLib.h>
#include <Library/DebugLib.h>
EFI_STATUS
@@ -28,6 +29,12 @@ ArmSgiPkgEntryPoint (
{
EFI_STATUS Status;
+ Status = LocateAndInstallAcpiFromFv (&gSgi575AcpiTablesiFileGuid);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables\n", __FUNCTION__));
+ return Status;
+ }
+
if (FeaturePcdGet (PcdVirtioSupported)) {
Status = InitVirtioBlockIo (ImageHandle);
if (EFI_ERROR (Status)) {
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
index 6aa286f..51ad22f 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
@@ -23,13 +23,19 @@
VirtioBlockIo.c
[Packages]
+ EmbeddedPkg/EmbeddedPkg.dec
MdePkg/MdePkg.dec
OvmfPkg/OvmfPkg.dec
+ Platform/ARM/SgiPkg/SgiPlatform.dec
[LibraryClasses]
+ AcpiLib
UefiDriverEntryPoint
VirtioMmioDeviceLib
+[Guids]
+ gSgi575AcpiTablesiFileGuid
+
[FeaturePcd]
gArmSgiTokenSpaceGuid.PcdVirtioSupported
--git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
new file mode 100644
index 0000000..870ffe9
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
@@ -0,0 +1,41 @@
+/** @file
+*
+* Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef __SGI_ACPI_HEADER__
+#define __SGI_ACPI_HEADER__
+
+//
+// ACPI table information used to initialize tables.
+//
+#define EFI_ACPI_ARM_OEM_ID 'A','R','M','L','T','D' // OEMID 6 bytes long
+#define EFI_ACPI_ARM_OEM_TABLE_ID SIGNATURE_64('E','N','T','P','L','A','T','F') // OEM table id 8 bytes long
+#define EFI_ACPI_ARM_OEM_REVISION 0x20140727
+#define EFI_ACPI_ARM_CREATOR_ID SIGNATURE_32('A','R','M',' ')
+#define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099
+
+// A macro to initialise the common header part of EFI ACPI tables as defined by
+// EFI_ACPI_DESCRIPTION_HEADER structure.
+#define ARM_ACPI_HEADER(Signature, Type, Revision) { \
+ Signature, /* UINT32 Signature */ \
+ sizeof (Type), /* UINT32 Length */ \
+ Revision, /* UINT8 Revision */ \
+ 0, /* UINT8 Checksum */ \
+ { EFI_ACPI_ARM_OEM_ID }, /* UINT8 OemId[6] */ \
+ EFI_ACPI_ARM_OEM_TABLE_ID, /* UINT64 OemTableId */ \
+ EFI_ACPI_ARM_OEM_REVISION, /* UINT32 OemRevision */ \
+ EFI_ACPI_ARM_CREATOR_ID, /* UINT32 CreatorId */ \
+ EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \
+ }
+
+#endif /* __SGI_ACPI_HEADER__ */
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
index dea1a42..853f56e 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
@@ -42,8 +42,12 @@
AArch64/Helper.S | GCC
[FixedPcd]
+ gArmPlatformTokenSpaceGuid.PcdClusterCount
+ gArmPlatformTokenSpaceGuid.PcdCoreCount
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdArmPrimaryCore
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
--
2.7.4
next prev parent reply other threads:[~2018-05-24 11:33 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-23 5:45 [PATCH edk2-platforms v6 0/9] Platform/ARM/Sgi: Add Arm's SGI platform support Thomas Abraham
2018-05-23 5:45 ` [PATCH edk2-platforms v6 1/9] Platform/ARM/Sgi: Add Platform library implementation Thomas Abraham
2018-05-23 5:45 ` [PATCH edk2-platforms v6 2/9] Platform/ARM/Sgi: add NOR flash platform " Thomas Abraham
2018-05-23 5:45 ` [PATCH edk2-platforms v6 3/9] Platform/ARM/Sgi: add initial platform dxe driver implementation Thomas Abraham
2018-05-23 5:45 ` [PATCH edk2-platforms v6 4/9] Platform/ARM/Sgi: add support for virtio block device Thomas Abraham
2018-05-23 5:45 ` [PATCH edk2-platforms v6 5/9] Platform/ARM/Sgi: add the initial set of acpi tables Thomas Abraham
2018-05-23 10:50 ` Alexei Fedorov
2018-05-24 11:36 ` Thomas Abraham
2018-05-24 11:52 ` Alexei Fedorov
2018-05-23 12:19 ` Alexei Fedorov
2018-05-24 11:31 ` Thomas Abraham
2018-05-24 11:33 ` Thomas Abraham [this message]
2018-05-24 12:11 ` Ard Biesheuvel
2018-05-23 5:45 ` [PATCH edk2-platforms v6 6/9] Platform/ARM/Sgi: add initial support for ARM SGI platform Thomas Abraham
2018-05-23 5:45 ` [PATCH edk2-platforms v6 7/9] Platform/ARM/Sgi: add support for smsc91x ethernet controller Thomas Abraham
2018-05-23 5:45 ` [PATCH edk2-platforms v6 8/9] Platform/ARM/Sgi: implement PciHostBridgeLib support Thomas Abraham
2018-05-23 5:45 ` [PATCH edk2-platforms v6 9/9] Platform/ARM/Sgi: Add Ssdt, Iort and Mcfg tables Thomas Abraham
2018-05-24 12:27 ` [PATCH edk2-platforms v6 0/9] Platform/ARM/Sgi: Add Arm's SGI platform support Ard Biesheuvel
2018-05-24 12:33 ` Thomas Abraham
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