From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::244; helo=mail-lf0-x244.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf0-x244.google.com (mail-lf0-x244.google.com [IPv6:2a00:1450:4010:c07::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 63B08207DF28F for ; Sun, 3 Jun 2018 22:29:59 -0700 (PDT) Received: by mail-lf0-x244.google.com with SMTP id o9-v6so23141907lfk.1 for ; Sun, 03 Jun 2018 22:29:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qGWFWChAF0MWstT9Q8OQxeNTNCFwoP9bMMDYCm2ebT0=; b=RnOYXTEp/pk817P2tc5pbPMsDnr8A45BrpabEfKHLfVGyWc7KRQD7sHW7s36v3Q65B EIQnOKU6MMIJ3kiMAaQTwbsDyxyJyAitj+W4eFQY1PLWEosnfocw6Z0Xd6Wj/CBOszl7 zjYbSSkGkpEiCpjAdcdbvd79DuUtr1Ur6Tt6pXs50CxZ85jN9EX2JrCURGBqjZYhIMNG pId51ySKE9K1cEEmLFQEqzNcvFEWnGYnIaLSIhUgP79YEciQTdKFCL4C4eYJTG3T2Wkm akp5m0oBfETkDRavH2AUzR4lZ11J5QOXYuWi3CFdtiNxizZt5Y/XwtC2t6GulMjg3Lpd UCxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qGWFWChAF0MWstT9Q8OQxeNTNCFwoP9bMMDYCm2ebT0=; b=Q15lXDXJMuB/KpO1Uz8/3ncqRuw3y1TOA7G8VO6c037a2NE8RqdCj+r7M1IkbIkCt+ EnaWLBb4nLWbyTH5P+MwwaySRpQs9v5oMfVPJ1bN/iQamrS5sIPDqT0UL2VxcoV8l25e YgeCTEmOULBiIyUEYpc+bWYerjakSipJazOmxV891mEKxz3dhQ3EALwklUiIg06b3Y0N VCvk50KJ2mnmeQksDTeUGyZu8Z+dwTBVRCVgkDjHdXfQt4oIOrrwLoFKZX6H08J/xLUw 6T1O3Kol8+DkFx/Jg6tUJYZTslprJzBOn7yR7f3LvQvF2O2IJ33GZ2qDOzxllzICSkiS KNdg== X-Gm-Message-State: APt69E1oeOinAQvBrABeMwgTGyo9GrkIVuMkleXVE1R3vkzG8OdL/+D5 8ELL4N/bVUvjJUwm96GeDjkxSFp6qZU= X-Google-Smtp-Source: ADUXVKIIkHdl/eZAjiFtL6XFSMXzODS70UlREx5RfktHc35uj5OEdLJK4l4gdsuBOyQWXbhtIPZXtw== X-Received: by 2002:a2e:1010:: with SMTP id j16-v6mr4960983lje.94.1528090197261; Sun, 03 Jun 2018 22:29:57 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id v1-v6sm9677204ljg.58.2018.06.03.22.29.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 03 Jun 2018 22:29:56 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, mw@semihalf.com, jsd@semihalf.com, jinghua@marvell.com, jaz@semihalf.com, davidsn@marvell.com Date: Mon, 4 Jun 2018 07:29:31 +0200 Message-Id: <1528090175-15791-2-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528090175-15791-1-git-send-email-mw@semihalf.com> References: <1528090175-15791-1-git-send-email-mw@semihalf.com> Subject: [platforms PATCH v2 1/5] Marvell/Armada70x0Db: Shift main FV from 0x0 address X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 04 Jun 2018 05:29:59 -0000 When using PEI phase, UEFI interprets 0x0 address of boot FV as an error. In order to avoid it, shift it to 0x1000 and put a hardcoded 'jump to 0x1000' at offset 0x0. This patch is a preparation for using PEI by Armada platforms. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Ard Biesheuvel --- Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf index befb107..69cb4cd 100644 --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf @@ -49,7 +49,21 @@ NumBlocks = 0x400 # ################################################################################ -0x00000000|0x00100000 +# +# UEFI has trouble dealing with FVs that reside at physical address 0x0. +# So instead, put a hardcoded 'jump to 0x1000' at offset 0x0, and put the +# real FV at offset 0x1000 +# +0x00000000|0x00001000 +DATA = { +!if $(ARCH) == AARCH64 + 0x00, 0x04, 0x00, 0x14 # 'b 0x1000' in AArch64 ASM +!else + 0xfe, 0x03, 0x00, 0xea # 'b 0x1000' in AArch32 ASM +!endif +} + +0x00001000|0x000ff000 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize FV = FVMAIN_COMPACT @@ -191,7 +205,6 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c # PEI phase firmware volume [FV.FVMAIN_COMPACT] FvAlignment = 8 -FvForceRebase = TRUE ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE -- 2.7.4