From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::243; helo=mail-lf0-x243.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf0-x243.google.com (mail-lf0-x243.google.com [IPv6:2a00:1450:4010:c07::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5B7D22096F33B for ; Mon, 4 Jun 2018 09:42:14 -0700 (PDT) Received: by mail-lf0-x243.google.com with SMTP id t134-v6so26252794lff.6 for ; Mon, 04 Jun 2018 09:42:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=CZx7cns1SPjCcAwpeiFbiy0r1+U8yC8Wyz2QstQ9dUA=; b=jOsqPVVKU+Lqm6IE89ylIwfX+AoMGuWWtComXIyLC19nxNywKZMU7bqEJOCncWCVsn FVGPO20NaK3JHVSsgxE1Jdi+Hb2POl8eT+UieyuXFyaa3psMYGYlKD7g4BUzYGvwwwpB FBMjXSYrtepbgkSvmGPFx5YoVjw4M58LNSrTHaO4DZX7Ydhl5D0CMUakAyYzOdk9+tWf 47aR+xm9d4pZjGYwoNlISms0Uh4C2WGaqegemRLZlewV5ruuO3C09jMPHiPPJxhYPpDX hYcUnBx41Ti8Mgy4jl4f4dOkJ83YEvh+Fz+YcLCnSS3Dwo1F7811ScGioKqwjzUdxkEI OwpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CZx7cns1SPjCcAwpeiFbiy0r1+U8yC8Wyz2QstQ9dUA=; b=o6A7HdwJLhsdf1Uxq/IQZn4EmACDZkbsRoIU/bGTMdwk8ZvZk1oaAUP8rCyZWFGI9F hJ1zxW5pVqp/5V6mexrfV3fLY5oCItZFyBPhvJVMNyAwHUkJyk4yCX7iSn8Q6gcl37MA wh18aMDhOQRSJsUAbjpHFevOHE+0EJXvITc+89KuISSb7NXm3Ne83pwBlXO5e2jUrTUN WtyqEO3GoaYfHN1Qk8UjJJm8RAmzFiatJKOnI4vqW3NU7cspnNaTMzjFTZUB1+WdRIXh JuCaXDFUaWALbc0hBnh+fRDbJEjvS8lxUlyuQaZqUdkpht6tnR3YYcy9F5vNzq8+o8PI D0KA== X-Gm-Message-State: APt69E0xWpQsXmlU8wd2c3gfSpk9H1jV833Rae3LRLSRPAyAQmVy+G8a aA1+0o+eqM4XRKoXihVGpOfxq0WbE64= X-Google-Smtp-Source: ADUXVKKbDqPUTpbE0zlsa0wosTw7zl0Ma5GEyz3PTDecO5B5HD5iw9mKAkXQr0ltW6qz4J+iW0d08w== X-Received: by 2002:a19:8d15:: with SMTP id p21-v6mr7601640lfd.99.1528130532236; Mon, 04 Jun 2018 09:42:12 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id j11-v6sm2140955lja.42.2018.06.04.09.42.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 04 Jun 2018 09:42:11 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, mw@semihalf.com, jsd@semihalf.com, jinghua@marvell.com, jaz@semihalf.com, davidsn@marvell.com Date: Mon, 4 Jun 2018 18:41:53 +0200 Message-Id: <1528130517-11387-2-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528130517-11387-1-git-send-email-mw@semihalf.com> References: <1528130517-11387-1-git-send-email-mw@semihalf.com> Subject: [platforms PATCH v3 1/5] Marvell/Armada70x0Db: Shift main FV from 0x0 address X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 04 Jun 2018 16:42:14 -0000 When using PEI phase, UEFI interprets 0x0 address of boot FV as an error. In order to avoid it, shift it to 0x1000 and put a hardcoded 'jump to 0x1000' at offset 0x0. This patch is a preparation for using PEI by Armada platforms. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf index befb107..69cb4cd 100644 --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf @@ -49,7 +49,21 @@ NumBlocks = 0x400 # ################################################################################ -0x00000000|0x00100000 +# +# UEFI has trouble dealing with FVs that reside at physical address 0x0. +# So instead, put a hardcoded 'jump to 0x1000' at offset 0x0, and put the +# real FV at offset 0x1000 +# +0x00000000|0x00001000 +DATA = { +!if $(ARCH) == AARCH64 + 0x00, 0x04, 0x00, 0x14 # 'b 0x1000' in AArch64 ASM +!else + 0xfe, 0x03, 0x00, 0xea # 'b 0x1000' in AArch32 ASM +!endif +} + +0x00001000|0x000ff000 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize FV = FVMAIN_COMPACT @@ -191,7 +205,6 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c # PEI phase firmware volume [FV.FVMAIN_COMPACT] FvAlignment = 8 -FvForceRebase = TRUE ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE -- 2.7.4