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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id v79-v6sm7355396lfd.32.2018.06.08.08.34.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 08 Jun 2018 08:34:51 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com Date: Fri, 8 Jun 2018 17:34:07 +0200 Message-Id: <1528472063-1660-10-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528472063-1660-1-git-send-email-mw@semihalf.com> References: <1528472063-1660-1-git-send-email-mw@semihalf.com> Subject: [platforms PATCH 09/25] Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 08 Jun 2018 15:34:55 -0000 Introduce new callback that can provide information about PP2 NICs to the Pp2Dxe driver. Extend ArmadaBoardDescLib with new structure MV_BOARD_PP2_DESC, for holding board specific data. In further steps it should be extended and replace PCD port's representation with the appropriate structures. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Hua Jing --- Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 60 ++++++++++++++++++++ Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 + Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 11 ++++ Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++ 4 files changed, 80 insertions(+) diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c index c220e58..86bddad 100644 --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c @@ -37,6 +37,65 @@ MV_BOARD_DESC *mBoardDescInstance; STATIC EFI_STATUS +MvBoardDescPp2Get ( + IN MARVELL_BOARD_DESC_PROTOCOL *This, + IN OUT MV_BOARD_PP2_DESC **Pp2Desc + ) +{ + UINT8 *Pp2DeviceTable, Pp2Count; + UINTN Pp2DeviceTableSize, Pp2Index, Index; + MV_BOARD_PP2_DESC *BoardDesc; + MV_SOC_PP2_DESC *SoCDesc; + EFI_STATUS Status; + + /* Get SoC data about all available PP2 controllers */ + Status = ArmadaSoCDescPp2Get (&SoCDesc, &Pp2Count); + if (EFI_ERROR (Status)) { + return Status; + } + + /* Obtain table with enabled PP2 NICs */ + Pp2DeviceTable = (UINT8 *)PcdGetPtr (PcdPp2Controllers); + if (Pp2DeviceTable == NULL) { + /* No PP2 NIC on platform */ + return EFI_SUCCESS; + } + + Pp2DeviceTableSize = PcdGetSize (PcdPp2Controllers); + + /* Check if PCD with PP2 NICs is correctly defined */ + if (Pp2DeviceTableSize > Pp2Count) { + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPp2Controllers format\n", __FUNCTION__)); + return EFI_INVALID_PARAMETER; + } + + /* Allocate and fill board description */ + BoardDesc = AllocateZeroPool (Pp2DeviceTableSize * sizeof (MV_BOARD_PP2_DESC)); + if (BoardDesc == NULL) { + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); + return EFI_OUT_OF_RESOURCES; + } + + Pp2Index = 0; + for (Index = 0; Index < Pp2DeviceTableSize; Index++) { + if (!MVHW_DEV_ENABLED (Pp2, Index)) { + DEBUG ((DEBUG_ERROR, "%a: Skip Pp2 controller %d\n", __FUNCTION__, Index)); + continue; + } + + BoardDesc[Pp2Index].SoC = &SoCDesc[Index]; + Pp2Index++; + } + + BoardDesc->Pp2DevCount = Pp2Index; + + *Pp2Desc = BoardDesc; + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS MvBoardDescUtmiGet ( IN MARVELL_BOARD_DESC_PROTOCOL *This, IN OUT MV_BOARD_UTMI_DESC **UtmiDesc @@ -138,6 +197,7 @@ MvBoardDescInitProtocol ( IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol ) { + BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get; BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet; BoardDescProtocol->BoardDescFree = MvBoardDescFree; diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf index 9367833..c7d5fe2 100644 --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf @@ -57,6 +57,7 @@ gMarvellBoardDescProtocolGuid [Pcd] + gMarvellTokenSpaceGuid.PcdPp2Controllers gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled gMarvellTokenSpaceGuid.PcdUtmiPortType gMarvellTokenSpaceGuid.PcdPciEXhci diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h index 2d50067..78cf698 100644 --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h @@ -17,6 +17,17 @@ #include // +// PP2 NIC devices per-board description +// +// TODO - Extend structure with entire +// ports description instead of PCDs. +// +typedef struct { + MV_SOC_PP2_DESC *SoC; + UINT8 Pp2DevCount; +} MV_BOARD_PP2_DESC; + +// // UTMI PHY devices per-board description // typedef struct { diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h index f8a2902..114a0ec 100644 --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h @@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL; typedef EFI_STATUS +(EFIAPI *MV_BOARD_DESC_PP2_GET) ( + IN MARVELL_BOARD_DESC_PROTOCOL *This, + IN OUT MV_BOARD_PP2_DESC **Pp2Desc + ); + +typedef +EFI_STATUS (EFIAPI *MV_BOARD_DESC_UTMI_GET) ( IN MARVELL_BOARD_DESC_PROTOCOL *This, IN OUT MV_BOARD_UTMI_DESC **UtmiDesc @@ -55,6 +62,7 @@ VOID ); struct _MARVELL_BOARD_DESC_PROTOCOL { + MV_BOARD_DESC_PP2_GET BoardDescPp2Get; MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet; MV_BOARD_DESC_FREE BoardDescFree; }; -- 2.7.4