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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id v79-v6sm7355396lfd.32.2018.06.08.08.35.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 08 Jun 2018 08:35:00 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com Date: Fri, 8 Jun 2018 17:34:14 +0200 Message-Id: <1528472063-1660-17-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528472063-1660-1-git-send-email-mw@semihalf.com> References: <1528472063-1660-1-git-send-email-mw@semihalf.com> Subject: [platforms PATCH 16/25] Marvell/Drivers: MvBoardDesc: Extend protocol with COMPHY support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 08 Jun 2018 15:35:04 -0000 Introduce new callback that can provide information about COMPHY controllers to the ComPhyLib. Extend ArmadaBoardDescLib with new structure MV_BOARD_COMPHY_DESC, for holding board specific data. In further steps it can be extended and replace PCD SerDes lanes' representation with the appropriate structures. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Hua Jing --- Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 60 ++++++++++++++++++++ Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 + Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 11 ++++ Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++ 4 files changed, 80 insertions(+) diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c index 44d159e..d580319 100644 --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c @@ -37,6 +37,65 @@ MV_BOARD_DESC *mBoardDescInstance; STATIC EFI_STATUS +MvBoardDescComPhyGet ( + IN MARVELL_BOARD_DESC_PROTOCOL *This, + IN OUT MV_BOARD_COMPHY_DESC **ComPhyDesc + ) +{ + UINT8 *ComPhyDeviceTable, ComPhyCount; + UINTN ComPhyDeviceTableSize, ComPhyIndex, Index; + MV_BOARD_COMPHY_DESC *BoardDesc; + MV_SOC_COMPHY_DESC *SoCDesc; + EFI_STATUS Status; + + /* Get SoC data about all available COMPHY controllers */ + Status = ArmadaSoCDescComPhyGet (&SoCDesc, &ComPhyCount); + if (EFI_ERROR (Status)) { + return Status; + } + + /* Obtain table with enabled COMPHY controllers */ + ComPhyDeviceTable = (UINT8 *)PcdGetPtr (PcdComPhyDevices); + if (ComPhyDeviceTable == NULL) { + /* No COMPHY controllers declared */ + return EFI_NOT_FOUND; + } + + ComPhyDeviceTableSize = PcdGetSize (PcdComPhyDevices); + + /* Check if PCD with COMPHY NICs is correctly defined */ + if (ComPhyDeviceTableSize > ComPhyCount) { + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdComPhyDevices format\n", __FUNCTION__)); + return EFI_INVALID_PARAMETER; + } + + /* Allocate and fill board description */ + BoardDesc = AllocateZeroPool (ComPhyDeviceTableSize * sizeof (MV_BOARD_COMPHY_DESC)); + if (BoardDesc == NULL) { + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); + return EFI_OUT_OF_RESOURCES; + } + + ComPhyIndex = 0; + for (Index = 0; Index < ComPhyDeviceTableSize; Index++) { + if (!MVHW_DEV_ENABLED (ComPhy, Index)) { + DEBUG ((DEBUG_ERROR, "%a: Skip ComPhy controller %d\n", __FUNCTION__, Index)); + continue; + } + + BoardDesc[ComPhyIndex].SoC = &SoCDesc[Index]; + ComPhyIndex++; + } + + BoardDesc->ComPhyDevCount = ComPhyIndex; + + *ComPhyDesc = BoardDesc; + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS MvBoardDescAhciGet ( IN MARVELL_BOARD_DESC_PROTOCOL *This, IN OUT MV_BOARD_AHCI_DESC **AhciDesc @@ -374,6 +433,7 @@ MvBoardDescInitProtocol ( IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol ) { + BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet; BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet; BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet; BoardDescProtocol->BoardDescXhciGet = MvBoardDescXhciGet; diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf index fe819ac..71b7ebd 100644 --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf @@ -57,6 +57,7 @@ gMarvellBoardDescProtocolGuid [Pcd] + gMarvellTokenSpaceGuid.PcdComPhyDevices gMarvellTokenSpaceGuid.PcdPp2Controllers gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled gMarvellTokenSpaceGuid.PcdUtmiPortType diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h index 938d283..1b56316 100644 --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h @@ -17,6 +17,17 @@ #include // +// COMPHY NIC devices per-board description +// +// TODO - Extend structure with entire +// ports description instead of PCDs. +// +typedef struct { + MV_SOC_COMPHY_DESC *SoC; + UINT8 ComPhyDevCount; +} MV_BOARD_COMPHY_DESC; + +// // NonDiscoverableDevices per-board description // diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h index a59ade5..27250db 100644 --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h @@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL; typedef EFI_STATUS +(EFIAPI *MV_BOARD_DESC_COMPHY_GET) ( + IN MARVELL_BOARD_DESC_PROTOCOL *This, + IN OUT MV_BOARD_COMPHY_DESC **ComPhyDesc + ); + +typedef +EFI_STATUS (EFIAPI *MV_BOARD_DESC_AHCI_GET) ( IN MARVELL_BOARD_DESC_PROTOCOL *This, IN OUT MV_BOARD_AHCI_DESC **AhciDesc @@ -83,6 +90,7 @@ VOID ); struct _MARVELL_BOARD_DESC_PROTOCOL { + MV_BOARD_DESC_COMPHY_GET BoardDescComPhyGet; MV_BOARD_DESC_AHCI_GET BoardDescAhciGet; MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet; MV_BOARD_DESC_XHCI_GET BoardDescXhciGet; -- 2.7.4