From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::244; helo=mail-lf0-x244.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf0-x244.google.com (mail-lf0-x244.google.com [IPv6:2a00:1450:4010:c07::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6D6C921123883 for ; Fri, 8 Jun 2018 08:35:08 -0700 (PDT) Received: by mail-lf0-x244.google.com with SMTP id u4-v6so20731100lff.3 for ; Fri, 08 Jun 2018 08:35:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=E75mTbrivFd7M1oHrism5mRDaLeUvq1/0kwfaLpCbPk=; b=a6Z7Nsa/BoMVx9WS0cvy4pQMJEPZN2ObmYcAe/y6Y3+qEhNfRFmkOKHmovxYVCDCDa s/B7G2UqSC0WDRTYoX+QElgjkF8tv/NmStrCg6BbssmQNy2uLNZSg8vCmepdm4EsxbwH mUUCPdXDW0py60HYN/2QK5txEalcM3++21hSf/06cHoWNTHLat5qDYtlc8LWURaBaOXD AVZq+70ll4VLu8L4A3/aQeyEYAlaNS+FrpKDuJNLytRCFmh1p7LgIPyDO2C9aQOv2tH5 vtMfEEJSNI6TScaY2B+Gb193OlPYFQqKBjd8UIU48HzL7OgYbLHD9QBhvFSJcw2V5j9/ u6wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=E75mTbrivFd7M1oHrism5mRDaLeUvq1/0kwfaLpCbPk=; b=qWLO3X/6iMgHX/0vl77FX0N7sR2RL8U8zbK7TCk80zSMsHO9eUGrUDbCf+50nYYkA8 oNx9EVIeMkAyiJdmpmn/xyFOufQpEXHNkvG3aPli2x12e8YqdAdwExG6A5DH1n22KcTU sDUVwhJbBPMfkjNI1vwhY6NwF46YpNe140w3dTebuLnK5y+dka2cI9piKkfd58M6QLl/ wcE4TzuJ60UJgzWPoEbAzpHwTMc3qmaKw88A6Nls/8ygYy2xA+KfU7feMqpYGYTQ2Z2K v0bB3nXRJgLel2iWLEgaT0dEqpv+K7H4IfPkh6zq9U4R0ZPqgGaJPVOGtjmAnAty3giQ oqEA== X-Gm-Message-State: APt69E2WaNDvYi5qp91+RUl3So0/6SDiSsgaaPm3MvB2Ivn0WfhnUK+J lQTd+f+UpW3ZbWJWqXvVp4VawI/4ma8= X-Google-Smtp-Source: ADUXVKIb0iyy5m6DjAj2qn8NXCPzYFJDn48KMvUt5iNhI9U0odlE3y9ofbbqOgqkuFOeNdNDByZGKw== X-Received: by 2002:a2e:9dd0:: with SMTP id x16-v6mr4890755ljj.142.1528472106429; Fri, 08 Jun 2018 08:35:06 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id v79-v6sm7355396lfd.32.2018.06.08.08.35.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 08 Jun 2018 08:35:05 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com Date: Fri, 8 Jun 2018 17:34:18 +0200 Message-Id: <1528472063-1660-21-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528472063-1660-1-git-send-email-mw@semihalf.com> References: <1528472063-1660-1-git-send-email-mw@semihalf.com> Subject: [platforms PATCH 20/25] Marvell/Drivers: MvMdioDxe: Enable 64bit addressing X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 08 Jun 2018 15:35:09 -0000 In order to be prepared for operating on registers in 64-bit address space, this patch adjusts the MDIO controllers base address array. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Hua Jing --- Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c index 12aabad..6c0a129 100644 --- a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c +++ b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c @@ -70,7 +70,7 @@ MdioCheckParam ( STATIC EFI_STATUS MdioWaitReady ( - UINT32 MdioBase + UINTN MdioBase ) { UINT32 Timeout = MVEBU_SMI_TIMEOUT; @@ -92,7 +92,7 @@ MdioWaitReady ( STATIC EFI_STATUS MdioWaitValid ( - UINT32 MdioBase + UINTN MdioBase ) { UINT32 Timeout = MVEBU_SMI_TIMEOUT; @@ -122,7 +122,7 @@ MdioOperation ( IN OUT UINT32 *Data ) { - UINT32 MdioBase = This->BaseAddresses[MdioIndex]; + UINTN MdioBase = This->BaseAddresses[MdioIndex]; UINT32 MdioReg; EFI_STATUS Status; -- 2.7.4