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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id v79-v6sm7355396lfd.32.2018.06.08.08.34.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 08 Jun 2018 08:34:50 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com Date: Fri, 8 Jun 2018 17:34:06 +0200 Message-Id: <1528472063-1660-9-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528472063-1660-1-git-send-email-mw@semihalf.com> References: <1528472063-1660-1-git-send-email-mw@semihalf.com> Subject: [platforms PATCH 08/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 08 Jun 2018 15:34:53 -0000 This patch introduces new library callback (ArmadaSoCDescPp2Get ()), which dynamically allocates and fills MV_SOC_PP2_DESC structure with the SoC description of PP2 NICs. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Hua Jing --- Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 34 ++++++++++++++++++++ Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 15 +++++++++ 2 files changed, 49 insertions(+) diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c index 0ee943b..36b445e 100644 --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c @@ -32,6 +32,40 @@ #define MV_SOC_CP_BASE(Cp) (0xF2000000 + (Cp) * 0x2000000) // +// Platform description of PP2 NIC +// +#define MV_SOC_PP2_BASE(Cp) MV_SOC_CP_BASE ((Cp)) +#define MV_SOC_PP2_CLK_FREQ 333333333 + +EFI_STATUS +EFIAPI +ArmadaSoCDescPp2Get ( + IN OUT MV_SOC_PP2_DESC **Pp2Desc, + IN OUT UINT8 *DescCount + ) +{ + MV_SOC_PP2_DESC *Desc; + UINT8 CpCount = FixedPcdGet8 (PcdMaxCpCount); + UINT8 CpIndex; + + Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_PP2_DESC)); + if (Desc == NULL) { + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); + return EFI_OUT_OF_RESOURCES; + } + + for (CpIndex = 0; CpIndex < CpCount; CpIndex++) { + Desc[CpIndex].Pp2BaseAddress = MV_SOC_PP2_BASE (CpIndex); + Desc[CpIndex].Pp2ClockFrequency = MV_SOC_PP2_CLK_FREQ; + } + + *Pp2Desc = Desc; + *DescCount = CpCount; + + return EFI_SUCCESS; +} + +// // Platform description of UTMI PHY's // #define MV_SOC_UTMI_PER_CP_COUNT 2 diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h index 22f5c17..559642b 100644 --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h @@ -15,6 +15,21 @@ #define __ARMADA_SOC_DESC_LIB_H__ // +// PP2 NIC devices SoC description +// +typedef struct { + UINTN Pp2BaseAddress; + UINTN Pp2ClockFrequency; +} MV_SOC_PP2_DESC; + +EFI_STATUS +EFIAPI +ArmadaSoCDescPp2Get ( + IN OUT MV_SOC_PP2_DESC **Pp2Desc, + IN OUT UINT8 *DescCount + ); + +// // UTMI PHY devices SoC description // typedef struct { -- 2.7.4