[platforms: PATCH v2 00/25] Armada hardware description rework

[platforms: PATCH v2 00/25] Armada hardware description rework

[Marcin Wojtas]

Hi,

The second version of the patchset comes with a lot of
improvements, as requested during review. Please
see details in the changelog below.

The patches are available in the github:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/boarddesc-upstream-r20180617

I'm looking forward to review and any comments/remarks.

Best regards,
Marcin

Changelog:
v1 -> v2
* All
  - rebase on top of the master branch
  - remove internal review residues from the commit logs
  - increase all files version to 0x1A
  - use UINTN, where applicable
  - add Armada7k8kSoCDescLib definitions to a local header
  - remove assignments from variables declarations

*  2,3,5-7,13,20-21
  - Add Leif's RBs

* 1
  - add parentheses in macros
  - simplify loop and values assignments

* 4
  - add parentheses in if's
  - rename table and remove usage of MVHW_DEV_ENABLED
  - remove redundant NULL check in  MvBoardDescFree ()
  - add comments about using UINT8 * arrays, remove casting
  - use MV prefix in the signature
  - sort PCDs

* 9
  - drop TODO comment
  - rename table and remove usage of MVHW_DEV_ENABLED
  - add comments about using UINT8 * arrays, remove casting 

* 11
  - simplify ArmadaSoCDescXhciGet

* 12
  - remove TODO in comment
  - sort variables, PCDs and assignments
  - add comments about UINT8 arrays, remove casting
  - rename table and remove usage of MVHW_DEV_ENABLED 

* 16
  - remove TODO in comment
  - sort variables, PCDs and assignments
  - add comments about UINT8 arrays, remove casting
  - rename table and remove usage of MVHW_DEV_ENABLED

* 22
  - simplify loop and values assignments

*23
  - remove TODO in comment
  - sort variables, PCDs and assignments
  - add comments about UINT8 arrays, remove casting
  - rename table and remove usage of MVHW_DEV_ENABLED

*25
  - add parentheses in if condition

Marcin Wojtas (21):
  Marvell/Library: Introduce ArmadaBoardDescLib class
  Marvell/Library: UtmiPhyLib: Switch to use MARVELL_BOARD_DESC protocol
  Marvell/Library: RealTimeClockLib: Simplify obtaining base address
  Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information
  Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support
  Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol
  Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI
  Marvell/Drivers: MvBoardDesc: Extend protocol with AHCI/SDMMC/XHCI
  Marvell/Drivers: NonDiscoverable: Switch to use MARVELL_BOARD_DESC
  Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC
  Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information
  Marvell/Drivers: MvBoardDesc: Extend protocol with ComPhy support
  Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC
  Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information
  Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support
  Marvell/Drivers: MvMdioDxe: Enable 64bit addressing
  Marvell/Drivers: MvMdioDxe: Switch driver to use MARVELL_BOARD_DESC
  Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information
  Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support
  Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC
  Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency

jinghua (4):
  Marvell/Library: Introduce ArmadaSoCDescLib class
  Marvell: Introduce MARVELL_BOARD_DESC_PROTOCOL
  Marvell/Drivers: MvBoardDesc: Introduce board description driver
  Marvell/Armada7k8k: Enable board description driver compilation

 Silicon/Marvell/Marvell.dec                                                      |   8 +-
 Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc                                    |   2 +
 Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc                                   |   2 +-
 Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc                                   |   2 +-
 Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc                            |   2 +-
 Silicon/Marvell/Armada7k8k/Armada7k8k.fdf                                        |   1 +
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf               |   2 -
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf |  37 ++
 Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf         |   2 +-
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf                             |  70 +++
 Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf                                |   1 +
 Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf                              |   1 +
 Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf                                    |   2 +-
 Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf                |   6 +-
 Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf                                  |   6 +-
 Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf                                |   9 +-
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h   |  79 +++
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h                               |  57 ++
 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h                             |  87 +++
 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                               | 146 +++++
 Silicon/Marvell/Include/Library/MvHwDescLib.h                                    | 290 ----------
 Silicon/Marvell/Include/Library/UtmiPhyLib.h                                     |   2 +
 Silicon/Marvell/Include/Protocol/BoardDesc.h                                     | 118 ++++
 Silicon/Marvell/Include/Protocol/Mdio.h                                          |   4 +-
 Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h                                    |   4 +
 Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h                                  |   5 +
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c   | 279 +++++++++
 Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c           |  29 +-
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c                               | 597 ++++++++++++++++++++
 Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c                                  |  37 +-
 Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c                                |  41 +-
 Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c                                  |   4 +-
 Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c                                      |  43 +-
 Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c                  | 100 ++--
 Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c                                  |  50 +-
 Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c                                    |  74 ++-
 Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c                                  |  65 +--
 37 files changed, 1727 insertions(+), 537 deletions(-)
 create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
 create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
 create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
 create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
 create mode 100644 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
 create mode 100644 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
 delete mode 100644 Silicon/Marvell/Include/Library/MvHwDescLib.h
 create mode 100644 Silicon/Marvell/Include/Protocol/BoardDesc.h
 create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
 create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c

-- 
2.7.4

[platforms: PATCH v2 01/25] Marvell/Library: Introduce ArmadaSoCDescLib class

[Marcin Wojtas]

From: jinghua <jinghua@marvell.com>

ArmadaSoCDescLib is a per SoC family library, which provides SoC
description, like register base of some hardware module controller,
COMPHY/I2C/NETWORK etc., which right now is hardcoded in MvHwDescLib.h.
There will be a new protocol, which gets SoC description from this
library, and provides board description based on enable/disable
values of each hardware module controller in dsc file.

As a first example implement obtaining UTMI controllers information.
Remaining interfaces will be added in follow-up commits.
This patch introduces new library callback (ArmadaSoCDescUtmiGet ()),
which dynamically allocates and fills MV_SOC_UTMI_DESC structure,
SoC description of UTMI PHYs. A new PCD is introduced (PcdMaxCpCount)
which stores maximal amount of CP110 blocks in the SoC family.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: jinghua <jinghua@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Marvell.dec                                                      |  4 ++
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf | 37 +++++++++++
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h   | 35 +++++++++++
 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                               | 33 ++++++++++
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c   | 65 ++++++++++++++++++++
 5 files changed, 174 insertions(+)
 create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
 create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
 create mode 100644 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
 create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c

diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index be74b4e..2a92eff 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -60,6 +60,7 @@
   gMarvellSpiFlashDxeGuid = { 0x49d7fb74, 0x306d, 0x42bd, { 0x94, 0xc8, 0xc0, 0xc5, 0x4b, 0x18, 0x1d, 0xd7 } }
 
 [LibraryClasses]
+  ArmadaSoCDescLib|Include/Library/ArmadaSoCDescLib.h
   SampleAtResetLib|Include/Library/SampleAtResetLib.h
 
 [Protocols]
@@ -68,6 +69,9 @@
   gMarvellPlatformInitCompleteProtocolGuid = { 0x465b8cf7, 0x016f, 0x4ba6, { 0xbe, 0x6b, 0x28, 0x0e, 0x3a, 0x7d, 0x38, 0x6f } }
 
 [PcdsFixedAtBuild.common]
+#Board description
+  gMarvellTokenSpaceGuid.PcdMaxCpCount|0x2|UINT8|0x30000072
+
 #MPP
   gMarvellTokenSpaceGuid.PcdMppChipCount|0|UINT32|0x30000001
 
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
new file mode 100644
index 0000000..2b73b73
--- /dev/null
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
@@ -0,0 +1,37 @@
+## @file
+#
+#  Copyright (C) 2018, Marvell International Ltd. and its affiliates<BR>
+#
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution. The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+#  IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x0001001A
+  BASE_NAME                      = Armada7k8kDescLib
+  FILE_GUID                      = c64f0048-4ca3-4573-b0a6-c2e9e6457285
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = ArmadaSoCDescLib
+
+[Sources]
+  Armada7k8kSoCDescLib.c
+
+[Packages]
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  Silicon/Marvell/Marvell.dec
+
+[LibraryClasses]
+  DebugLib
+  IoLib
+  PcdLib
+
+[FixedPcd]
+  gMarvellTokenSpaceGuid.PcdMaxCpCount
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
new file mode 100644
index 0000000..c5711b0
--- /dev/null
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
@@ -0,0 +1,35 @@
+/**
+*
+*  Copyright (C) 2018, Marvell International Ltd. and its affiliates.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution. The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+*  Glossary - abbreviations used in Marvell SampleAtReset library implementation:
+*  AP - Application Processor hardware block (Armada 7k8k incorporates AP806)
+*  CP - South Bridge hardware blocks (Armada 7k8k incorporates CP110)
+**/
+
+#ifndef __ARMADA7K8K_SOC_DESC_LIB_H__
+#define __ARMADA7K8K_SOC_DESC_LIB_H__
+
+//
+// Common macros
+//
+#define MV_SOC_CP_BASE(Cp)               (0xF2000000 + ((Cp) * 0x2000000))
+
+//
+// Platform description of UTMI PHY's
+//
+#define MV_SOC_UTMI_PER_CP_COUNT         2
+#define MV_SOC_UTMI_ID(Utmi)             (Utmi)
+#define MV_SOC_UTMI_BASE(Utmi)           (0x580000 + ((Utmi) * 0x1000))
+#define MV_SOC_UTMI_CFG_BASE             0x440440
+#define MV_SOC_UTMI_USB_CFG_BASE         0x440420
+
+#endif
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
new file mode 100644
index 0000000..0d45684
--- /dev/null
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -0,0 +1,33 @@
+/**
+*
+*  Copyright (C) 2018, Marvell International Ltd. and its affiliates
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution. The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+#ifndef __ARMADA_SOC_DESC_LIB_H__
+#define __ARMADA_SOC_DESC_LIB_H__
+
+//
+// UTMI PHY devices SoC description
+//
+typedef struct {
+  UINT8 UtmiPhyId;
+  UINTN UtmiBaseAddress;
+  UINTN UtmiConfigAddress;
+  UINTN UsbConfigAddress;
+} MV_SOC_UTMI_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescUtmiGet (
+  IN OUT MV_SOC_UTMI_DESC  **UtmiDesc,
+  IN OUT UINTN              *DescCount
+  );
+#endif /* __ARMADA_SOC_DESC_LIB_H__ */
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
new file mode 100644
index 0000000..63fb224
--- /dev/null
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -0,0 +1,65 @@
+/**
+*
+*  Copyright (C) 2018, Marvell International Ltd. and its affiliates.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution. The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+*  Glossary - abbreviations used in Marvell SampleAtReset library implementation:
+*  AP - Application Processor hardware block (Armada 7k8k incorporates AP806)
+*  CP - South Bridge hardware blocks (Armada 7k8k incorporates CP110)
+**/
+
+#include <Uefi.h>
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#include <Protocol/BoardDesc.h>
+
+#include "Armada7k8kSoCDescLib.h"
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescUtmiGet (
+  IN OUT MV_SOC_UTMI_DESC  **UtmiDesc,
+  IN OUT UINTN              *DescCount
+  )
+{
+  MV_SOC_UTMI_DESC *Desc;
+  UINTN CpCount, CpIndex, Index, UtmiIndex;
+
+  CpCount = FixedPcdGet8 (PcdMaxCpCount);
+
+  *DescCount = CpCount * MV_SOC_UTMI_PER_CP_COUNT;
+  Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_UTMI_DESC));
+  if (Desc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  *UtmiDesc = Desc;
+
+  UtmiIndex = 0;
+  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+    for (Index = 0; Index < MV_SOC_UTMI_PER_CP_COUNT; Index++) {
+      Desc->UtmiPhyId = MV_SOC_UTMI_ID (UtmiIndex);
+      Desc->UtmiBaseAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_BASE (Index);
+      Desc->UtmiConfigAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_CFG_BASE;
+      Desc->UsbConfigAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_USB_CFG_BASE;
+      Desc++;
+      UtmiIndex++;
+    }
+  }
+
+  return EFI_SUCCESS;
+}
-- 
2.7.4

[platforms: PATCH v2 02/25] Marvell/Library: Introduce ArmadaBoardDescLib class

[Marcin Wojtas]

This patch adds a new library class that will be helpful
to describe a per-board information, which will be
processed by BoardDesc protocol.

Together with ArmadaSoCDescLib data it will be a flexible
solution allowing to provide complete information to
the drivers, replacing faulty MvHwDescLib.h.

Initially ArmadaBoardDescLib defines per-board UTMI
PHYs information structure.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Silicon/Marvell/Marvell.dec                          |  1 +
 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 27 ++++++++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h

diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index 2a92eff..db49300 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -60,6 +60,7 @@
   gMarvellSpiFlashDxeGuid = { 0x49d7fb74, 0x306d, 0x42bd, { 0x94, 0xc8, 0xc0, 0xc5, 0x4b, 0x18, 0x1d, 0xd7 } }
 
 [LibraryClasses]
+  ArmadaBoardDescLib|Include/Library/ArmadaBoardDescLib.h
   ArmadaSoCDescLib|Include/Library/ArmadaSoCDescLib.h
   SampleAtResetLib|Include/Library/SampleAtResetLib.h
 
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
new file mode 100644
index 0000000..068535a
--- /dev/null
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -0,0 +1,27 @@
+/**
+*
+*  Copyright (C) 2018, Marvell International Ltd. and its affiliates
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution. The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+#ifndef __ARMADA_BOARD_DESC_LIB_H__
+#define __ARMADA_BOARD_DESC_LIB_H__
+
+#include <Library/ArmadaSoCDescLib.h>
+
+//
+// UTMI PHY devices per-board description
+//
+typedef struct {
+  MV_SOC_UTMI_DESC *SoC;
+  UINTN             UtmiDevCount;
+  UINTN             UtmiPortType;
+} MV_BOARD_UTMI_DESC;
+#endif /* __ARMADA_SOC_DESC_LIB_H__ */
-- 
2.7.4

[platforms: PATCH v2 03/25] Marvell: Introduce MARVELL_BOARD_DESC_PROTOCOL

[Marcin Wojtas]

From: jinghua <jinghua@marvell.com>

This patch introduces protocol that exposes generic API to get board
description. It uses ArmadaSoCDescLib library, which is implemented per
SoC family to get the SoC level description for hardware module controller.
Together with the information obtained from ArmadaBoardDescLib
the protocol allows the drivers to get per-board information about
used hardware and settings.
As a first usage a UTMI information obtaining is implemented.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: jinghua <jinghua@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Silicon/Marvell/Marvell.dec                  |  1 +
 Silicon/Marvell/Include/Protocol/BoardDesc.h | 62 ++++++++++++++++++++
 2 files changed, 63 insertions(+)
 create mode 100644 Silicon/Marvell/Include/Protocol/BoardDesc.h

diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index db49300..6861cc4 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -212,6 +212,7 @@
   gMarvellTokenSpaceGuid.PcdSecureRegionSize|0x0|UINT32|0x50000001
 
 [Protocols]
+  gMarvellBoardDescProtocolGuid            = { 0xebed8738, 0xd4a6, 0x4001, { 0xa9, 0xc9, 0x52, 0xb0, 0xcb, 0x7d, 0xdb, 0xf9 }}
   gMarvellEepromProtocolGuid               = { 0x71954bda, 0x60d3, 0x4ef8, { 0x8e, 0x3c, 0x0e, 0x33, 0x9f, 0x3b, 0xc2, 0x2b }}
   gMarvellMdioProtocolGuid                 = { 0x40010b03, 0x5f08, 0x496a, { 0xa2, 0x64, 0x10, 0x5e, 0x72, 0xd3, 0x71, 0xaa }}
   gMarvellPhyProtocolGuid                  = { 0x32f48a43, 0x37e3, 0x4acf, { 0x93, 0xc4, 0x3e, 0x57, 0xa7, 0xb0, 0xfb, 0xdc }}
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
new file mode 100644
index 0000000..f8a2902
--- /dev/null
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -0,0 +1,62 @@
+/*******************************************************************************
+Copyright (C) 2018 Marvell International Ltd.
+
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice,
+  this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+  notice, this list of conditions and the following disclaimer in the
+  documentation and/or other materials provided with the distribution.
+
+* Neither the name of Marvell nor the names of its contributors may be
+  used to endorse or promote products derived from this software without
+  specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __MARVELL_BOARD_DESC_PROTOCOL_H__
+#define __MARVELL_BOARD_DESC_PROTOCOL_H__
+
+#include <Library/ArmadaSoCDescLib.h>
+#include <Library/ArmadaBoardDescLib.h>
+
+extern EFI_GUID gMarvellBoardDescProtocolGuid;
+
+typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
+
+typedef
+EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_UTMI_GET) (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_UTMI_DESC      **UtmiDesc
+  );
+
+typedef
+VOID
+(EFIAPI *MV_BOARD_DESC_FREE) (
+  IN VOID                         *BoardDesc
+  );
+
+struct _MARVELL_BOARD_DESC_PROTOCOL {
+  MV_BOARD_DESC_UTMI_GET         BoardDescUtmiGet;
+  MV_BOARD_DESC_FREE             BoardDescFree;
+};
+
+#endif // __MARVELL_BOARD_DESC_PROTOCOL_H__
-- 
2.7.4

[platforms: PATCH v2 04/25] Marvell/Drivers: MvBoardDesc: Introduce board description driver

[Marcin Wojtas]

From: jinghua <jinghua@marvell.com>

This patch introduces a producer of MARVELL_BOARD_DESC_PROTOCOL, which
gets SoC description from ArmadaSoCDescLib, then based on dsc file,
provide only enabled hardware module controllers for the consumers,
which are typically controllers' drivers. Thanks to that
there is a separation between obtaining the platform description and
the drivers. A first example of the board description callback
is information about UTMI controllers and type.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: jinghua <jinghua@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf |  65 ++++++++
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h   |  57 +++++++
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c   | 176 ++++++++++++++++++++
 3 files changed, 298 insertions(+)
 create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
 create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
 create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c

diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
new file mode 100644
index 0000000..5da5f21
--- /dev/null
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -0,0 +1,65 @@
+#
+# Marvell BSD License Option
+#
+# If you received this File from Marvell, you may opt to use, redistribute
+# and/or modify this File under the following licensing terms.
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.
+#
+# * Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# * Neither the name of Marvell nor the names of its contributors may be
+# used to endorse or promote products derived from this software without
+# specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+[Defines]
+  INF_VERSION                    = 0x0001001A
+  BASE_NAME                      = BoardDescDxe
+  FILE_GUID                      = 4ed385f9-5d2c-4774-95c5-d5d9d70b3c37
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  ENTRY_POINT                    = MvBoardDescEntryPoint
+
+[Sources]
+  MvBoardDescDxe.c
+  MvBoardDescDxe.h
+
+[Packages]
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  Silicon/Marvell/Marvell.dec
+
+[LibraryClasses]
+  ArmadaSoCDescLib
+  DebugLib
+  MemoryAllocationLib
+  UefiDriverEntryPoint
+  UefiLib
+
+[Protocols]
+  gMarvellBoardDescProtocolGuid
+
+[Pcd]
+  gMarvellTokenSpaceGuid.PcdPciEXhci
+  gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
+  gMarvellTokenSpaceGuid.PcdUtmiPortType
+
+[Depex]
+  TRUE
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
new file mode 100644
index 0000000..2813f0d
--- /dev/null
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
@@ -0,0 +1,57 @@
+/*******************************************************************************
+Copyright (C) 2018 Marvell International Ltd.
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice,
+  this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+  notice, this list of conditions and the following disclaimer in the
+  documentation and/or other materials provided with the distribution.
+
+* Neither the name of Marvell nor the names of its contributors may be
+  used to endorse or promote products derived from this software without
+  specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#ifndef __MV_BOARD_DESC_H__
+#define __MV_BOARD_DESC_H__
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+
+#include <Protocol/BoardDesc.h>
+
+#include <Uefi/UefiBaseType.h>
+
+#define MV_BOARD_DESC_SIGNATURE SIGNATURE_64 ('M', 'V', 'B', 'R', 'D', 'D', 'S', 'C')
+
+typedef struct {
+  MARVELL_BOARD_DESC_PROTOCOL   BoardDescProtocol;
+  UINTN                   Signature;
+  EFI_HANDLE              Handle;
+  EFI_LOCK                Lock;
+} MV_BOARD_DESC;
+
+#endif // __MV_BOARD_DESC_H__
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
new file mode 100644
index 0000000..0232a21
--- /dev/null
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -0,0 +1,176 @@
+/*******************************************************************************
+Copyright (C) 2018 Marvell International Ltd.
+
+Marvell BSD License Option
+
+If you received this File from Marvell, you may opt to use, redistribute and/or
+modify this File under the following licensing terms.
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice,
+  this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+  notice, this list of conditions and the following disclaimer in the
+  documentation and/or other materials provided with the distribution.
+
+* Neither the name of Marvell nor the names of its contributors may be
+  used to endorse or promote products derived from this software without
+  specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
+ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*******************************************************************************/
+#include "MvBoardDescDxe.h"
+
+MV_BOARD_DESC *mBoardDescInstance;
+
+STATIC
+EFI_STATUS
+MvBoardDescUtmiGet (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_UTMI_DESC      **UtmiDesc
+  )
+{
+  UINT8 *UtmiDeviceEnabled, *XhciDeviceEnabled, *UtmiPortType;
+  UINTN UtmiCount, UtmiDeviceTableSize, UtmiIndex, Index;
+  MV_BOARD_UTMI_DESC *BoardDesc;
+  MV_SOC_UTMI_DESC *SoCDesc;
+  EFI_STATUS Status;
+
+  /* Get SoC data about all available UTMI controllers */
+  Status = ArmadaSoCDescUtmiGet (&SoCDesc, &UtmiCount);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  /*
+   * Obtain table with enabled Utmi PHY's,
+   * which is represented as an array of UINT8 values
+   * (0x0 - disabled, 0x1 enabled).
+   */
+  UtmiDeviceEnabled = PcdGetPtr (PcdUtmiControllersEnabled);
+  if (UtmiDeviceEnabled == NULL) {
+    /* No UTMI PHY on platform */
+    return EFI_SUCCESS;
+  }
+
+  /* Make sure XHCI controllers table is present */
+  XhciDeviceEnabled = PcdGetPtr (PcdPciEXhci);
+  if (XhciDeviceEnabled == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Missing PcdPciEXhci\n", __FUNCTION__));
+    return EFI_INVALID_PARAMETER;
+  }
+
+  UtmiDeviceTableSize = PcdGetSize (PcdUtmiControllersEnabled);
+
+  /* Check if PCD with UTMI PHYs is correctly defined */
+  if ((UtmiDeviceTableSize > UtmiCount) ||
+      (UtmiDeviceTableSize > PcdGetSize (PcdPciEXhci))) {
+    DEBUG ((DEBUG_ERROR,
+      "%a: Wrong PcdUtmiControllersEnabled format\n",
+      __FUNCTION__));
+    return EFI_INVALID_PARAMETER;
+  }
+
+  /* Obtain port type table - also stored as UINT8 array */
+  UtmiPortType = PcdGetPtr (PcdUtmiPortType);
+  if ((UtmiPortType == NULL) ||
+      (PcdGetSize (PcdUtmiPortType) != UtmiDeviceTableSize)) {
+    DEBUG ((DEBUG_ERROR, "%a: Wrong PcdUtmiPortType format\n", __FUNCTION__));
+    return EFI_INVALID_PARAMETER;
+  }
+
+  /* Allocate and fill board description */
+  BoardDesc = AllocateZeroPool (UtmiDeviceTableSize * sizeof (MV_BOARD_UTMI_DESC));
+  if (BoardDesc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  UtmiIndex = 0;
+  for (Index = 0; Index < UtmiDeviceTableSize; Index++) {
+    if (!UtmiDeviceEnabled[Index]) {
+      continue;
+    }
+
+    /* UTMI PHY without enabled XHCI controller is useless */
+    if (!XhciDeviceEnabled[Index]) {
+      DEBUG ((DEBUG_ERROR,
+             "%a: Disabled Xhci controller %d\n",
+             Index,
+             __FUNCTION__));
+      return EFI_INVALID_PARAMETER;
+    }
+
+    BoardDesc[UtmiIndex].SoC = &SoCDesc[Index];
+    BoardDesc[UtmiIndex].UtmiPortType = UtmiPortType[Index];
+    UtmiIndex++;
+  }
+
+  BoardDesc->UtmiDevCount = UtmiIndex;
+
+  *UtmiDesc = BoardDesc;
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+VOID
+MvBoardDescFree (
+  IN VOID *BoardDesc
+  )
+{
+  FreePool (BoardDesc);
+}
+
+STATIC
+EFI_STATUS
+MvBoardDescInitProtocol (
+  IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
+  )
+{
+  BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
+  BoardDescProtocol->BoardDescFree = MvBoardDescFree;
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+MvBoardDescEntryPoint (
+  IN EFI_HANDLE       ImageHandle,
+  IN EFI_SYSTEM_TABLE *SystemTable
+  )
+{
+  EFI_STATUS Status;
+
+  mBoardDescInstance = AllocateZeroPool (sizeof (MV_BOARD_DESC));
+  if (mBoardDescInstance == NULL) {
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  MvBoardDescInitProtocol (&mBoardDescInstance->BoardDescProtocol);
+
+  mBoardDescInstance->Signature = MV_BOARD_DESC_SIGNATURE;
+
+  Status = gBS->InstallMultipleProtocolInterfaces (&(mBoardDescInstance->Handle),
+                  &gMarvellBoardDescProtocolGuid,
+                  &(mBoardDescInstance->BoardDescProtocol));
+  if (EFI_ERROR (Status)) {
+    FreePool (mBoardDescInstance);
+    return Status;
+  }
+
+  return EFI_SUCCESS;
+}
-- 
2.7.4

[platforms: PATCH v2 05/25] Marvell/Armada7k8k: Enable board description driver compilation

[Marcin Wojtas]

From: jinghua <jinghua@marvell.com>

This patch enables compilation of MvBoardDescDxe driver for
Armada70x0-DB, Armada80x0-DB and Armada80x0McBin.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: jinghua <jinghua@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 2 ++
 Silicon/Marvell/Armada7k8k/Armada7k8k.fdf     | 1 +
 2 files changed, 3 insertions(+)

diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
index 75fa3d4..a9d67a2 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
@@ -32,6 +32,7 @@
 #SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 [LibraryClasses.common]
+  ArmadaSoCDescLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
   ArmPlatformLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
   ComPhyLib|Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
   MppLib|Silicon/Marvell/Library/MppLib/MppLib.inf
@@ -449,6 +450,7 @@
   ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
 
   # Platform Initialization
+  Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
   Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf
 
   # Platform drivers
diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
index 180b6c9..18d5d06 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
@@ -106,6 +106,7 @@ FvNameGuid         = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
   #
   # Platform Initialization
   #
+  INF Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
   INF Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf
 
   # PI DXE Drivers producing Architectural Protocols (EFI Services)
-- 
2.7.4

[platforms: PATCH v2 06/25] Marvell/Library: UtmiPhyLib: Switch to use MARVELL_BOARD_DESC protocol

[Marcin Wojtas]

UTMI driver used to get Armada7k8k UTMI controller description from
hardcoded values stored in the header file MvHwDescLib.h.
As a result it is very hard to support other Armada SoC families
with this driver.

This patch updates the driver to get UTMI controller description from
newly introduced MARVELL_BOARD_DESC protocol, and removes the dependency
on the hardcoded structures. Use the protocol and pass information to
further to the library init routine.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf |  1 -
 Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf                  |  9 ++-
 Silicon/Marvell/Include/Library/MvHwDescLib.h                      | 47 --------------
 Silicon/Marvell/Include/Library/UtmiPhyLib.h                       |  2 +
 Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h                    |  5 ++
 Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c                    | 65 +++++++-------------
 6 files changed, 32 insertions(+), 97 deletions(-)

diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
index d38b467..f2c173c 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
@@ -51,7 +51,6 @@
   DebugLib
   MemoryAllocationLib
   MppLib
-  UtmiPhyLib
 
 [Sources.common]
   Armada7k8kLib.c
diff --git a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf
index 0876879..e2381f4 100644
--- a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf
+++ b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf
@@ -51,11 +51,10 @@
   IoLib
   MemoryAllocationLib
   PcdLib
+  UefiBootServicesTableLib
+
+[Protocols]
+  gMarvellBoardDescProtocolGuid  ## CONSUMES
 
 [Sources.common]
   UtmiPhyLib.c
-
-[Pcd]
-  gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
-  gMarvellTokenSpaceGuid.PcdUtmiPortType
-  gMarvellTokenSpaceGuid.PcdPciEXhci
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 9ae03d0..e13814a 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -127,19 +127,6 @@ typedef struct {
 } MVHW_RTC_DESC;
 
 //
-// UTMI PHY's description template definition
-//
-
-typedef struct {
-  UINT8 UtmiDevCount;
-  UINT32 UtmiPhyId[MVHW_MAX_XHCI_DEVS];
-  UINTN UtmiBaseAddresses[MVHW_MAX_XHCI_DEVS];
-  UINTN UtmiConfigAddresses[MVHW_MAX_XHCI_DEVS];
-  UINTN UtmiUsbConfigAddresses[MVHW_MAX_XHCI_DEVS];
-  UINTN UtmiMuxBitCount[MVHW_MAX_XHCI_DEVS];
-} MVHW_UTMI_DESC;
-
-//
 // Platform description of CommonPhy devices
 //
 #define MVHW_CP0_COMPHY_BASE       0xF2441000
@@ -253,38 +240,4 @@ MVHW_RTC_DESC mA7k8kRtcDescTemplate = {\
   { SIZE_4KB, SIZE_4KB }\
 }
 
-//
-// Platform description of UTMI PHY's
-//
-#define MVHW_CP0_UTMI0_BASE            0xF2580000
-#define MVHW_CP0_UTMI0_CFG_BASE        0xF2440440
-#define MVHW_CP0_UTMI0_USB_CFG_BASE    0xF2440420
-#define MVHW_CP0_UTMI0_ID              0x0
-#define MVHW_CP0_UTMI1_BASE            0xF2581000
-#define MVHW_CP0_UTMI1_CFG_BASE        0xF2440444
-#define MVHW_CP0_UTMI1_USB_CFG_BASE    0xF2440420
-#define MVHW_CP0_UTMI1_ID              0x1
-#define MVHW_CP1_UTMI0_BASE            0xF4580000
-#define MVHW_CP1_UTMI0_CFG_BASE        0xF4440440
-#define MVHW_CP1_UTMI0_USB_CFG_BASE    0xF4440420
-#define MVHW_CP1_UTMI0_ID              0x0
-#define MVHW_CP1_UTMI1_BASE            0xF4581000
-#define MVHW_CP1_UTMI1_CFG_BASE        0xF4440444
-#define MVHW_CP1_UTMI1_USB_CFG_BASE    0xF4440420
-#define MVHW_CP1_UTMI1_ID              0x1
-
-#define DECLARE_A7K8K_UTMI_TEMPLATE \
-STATIC \
-MVHW_UTMI_DESC mA7k8kUtmiDescTemplate = {\
-  4,\
-  { MVHW_CP0_UTMI0_ID, MVHW_CP0_UTMI1_ID,\
-    MVHW_CP1_UTMI0_ID, MVHW_CP1_UTMI1_ID },\
-  { MVHW_CP0_UTMI0_BASE, MVHW_CP0_UTMI1_BASE,\
-    MVHW_CP1_UTMI0_BASE, MVHW_CP1_UTMI1_BASE },\
-  { MVHW_CP0_UTMI0_CFG_BASE, MVHW_CP0_UTMI1_CFG_BASE,\
-    MVHW_CP1_UTMI0_CFG_BASE, MVHW_CP1_UTMI1_CFG_BASE },\
-  { MVHW_CP0_UTMI0_USB_CFG_BASE, MVHW_CP0_UTMI1_USB_CFG_BASE,\
-    MVHW_CP1_UTMI0_USB_CFG_BASE, MVHW_CP1_UTMI1_USB_CFG_BASE }\
-}
-
 #endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Include/Library/UtmiPhyLib.h b/Silicon/Marvell/Include/Library/UtmiPhyLib.h
index 7c62cba..6f4e355 100644
--- a/Silicon/Marvell/Include/Library/UtmiPhyLib.h
+++ b/Silicon/Marvell/Include/Library/UtmiPhyLib.h
@@ -35,6 +35,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #ifndef __UTMIPHYLIB_H__
 #define __UTMIPHYLIB_H__
 
+#include <Library/ArmadaBoardDescLib.h>
+
 EFI_STATUS
 UtmiPhyInit (
   VOID
diff --git a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h
index 0d7d72e..7e56f1a 100644
--- a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h
+++ b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h
@@ -35,6 +35,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #ifndef __UTMIPHY_H__
 #define __UTMIPHY_H__
 
+#include <Uefi.h>
+
 #include <Library/ArmLib.h>
 #include <Library/ArmPlatformLib.h>
 #include <Library/DebugLib.h>
@@ -42,6 +44,9 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include <Library/MemoryAllocationLib.h>
 #include <Library/IoLib.h>
 #include <Library/TimerLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#include <Protocol/BoardDesc.h>
 
 #define UTMI_USB_CFG_DEVICE_EN_OFFSET             0
 #define UTMI_USB_CFG_DEVICE_EN_MASK               (0x1 << UTMI_USB_CFG_DEVICE_EN_OFFSET)
diff --git a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c
index 2cd9cfa..cef1279 100644
--- a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c
+++ b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c
@@ -33,9 +33,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *******************************************************************************/
 
 #include "UtmiPhyLib.h"
-#include <Library/MvHwDescLib.h>
-
-DECLARE_A7K8K_UTMI_TEMPLATE;
 
 typedef struct {
   EFI_PHYSICAL_ADDRESS UtmiBaseAddr;
@@ -288,67 +285,47 @@ UtmiPhyInit (
   VOID
   )
 {
+  MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+  MV_BOARD_UTMI_DESC *BoardDesc;
   UTMI_PHY_DATA UtmiData;
-  UINT8 *UtmiDeviceTable, *XhciDeviceTable, *UtmiPortType, Index;
-  MVHW_UTMI_DESC *Desc = &mA7k8kUtmiDescTemplate;
-
-  /* Obtain table with enabled Utmi PHY's*/
-  UtmiDeviceTable = (UINT8 *)PcdGetPtr (PcdUtmiControllersEnabled);
-  if (UtmiDeviceTable == NULL) {
-    /* No UTMI PHY on platform */
-    return EFI_SUCCESS;
-  }
-
-  if (PcdGetSize (PcdUtmiControllersEnabled) > MVHW_MAX_XHCI_DEVS) {
-    DEBUG ((DEBUG_ERROR, "UTMI: Wrong PcdUtmiControllersEnabled format\n"));
-    return EFI_INVALID_PARAMETER;
-  }
+  EFI_STATUS Status;
+  UINTN Index;
 
-  /* Make sure XHCI controllers table is present */
-  XhciDeviceTable = (UINT8 *)PcdGetPtr (PcdPciEXhci);
-  if (XhciDeviceTable == NULL) {
-    DEBUG ((DEBUG_ERROR, "UTMI: Missing PcdPciEXhci\n"));
-    return EFI_INVALID_PARAMETER;
+  /* Obtain board description */
+  Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+                  NULL,
+                  (VOID **)&BoardDescProtocol);
+  if (EFI_ERROR (Status)) {
+    return Status;
   }
 
-  /* Obtain port type table */
-  UtmiPortType = (UINT8 *)PcdGetPtr (PcdUtmiPortType);
-  if (UtmiPortType == NULL ||
-      PcdGetSize (PcdUtmiPortType) != PcdGetSize (PcdUtmiControllersEnabled)) {
-    DEBUG ((DEBUG_ERROR, "UTMI: Wrong PcdUtmiPortType format\n"));
-    return EFI_INVALID_PARAMETER;
+  Status = BoardDescProtocol->BoardDescUtmiGet (BoardDescProtocol, &BoardDesc);
+  if (EFI_ERROR (Status)) {
+    return Status;
   }
 
   /* Initialize enabled chips */
-  for (Index = 0; Index < PcdGetSize (PcdUtmiControllersEnabled); Index++) {
-    if (!MVHW_DEV_ENABLED (Utmi, Index)) {
-      continue;
-    }
-
-    /* UTMI PHY without enabled XHCI controller is useless */
-    if (!MVHW_DEV_ENABLED (Xhci, Index)) {
-      DEBUG ((DEBUG_ERROR, "UTMI: Disabled Xhci controller %d\n", Index));
-      return EFI_INVALID_PARAMETER;
-    }
-
+  for (Index = 0; Index < BoardDesc->UtmiDevCount; Index++) {
     /* Get base address of UTMI phy */
-    UtmiData.UtmiBaseAddr = Desc->UtmiBaseAddresses[Index];
+    UtmiData.UtmiBaseAddr = BoardDesc[Index].SoC->UtmiBaseAddress;
 
     /* Get usb config address */
-    UtmiData.UsbCfgAddr = Desc->UtmiUsbConfigAddresses[Index];
+    UtmiData.UsbCfgAddr = BoardDesc[Index].SoC->UsbConfigAddress;
 
     /* Get UTMI config address */
-    UtmiData.UtmiCfgAddr = Desc->UtmiConfigAddresses[Index];
+    UtmiData.UtmiCfgAddr = BoardDesc[Index].SoC->UtmiConfigAddress;
 
     /* Get UTMI PHY ID */
-    UtmiData.PhyId = Desc->UtmiPhyId[Index];
+    UtmiData.PhyId = BoardDesc[Index].SoC->UtmiPhyId;
 
     /* Get the usb port type */
-    UtmiData.UtmiPhyPort = UtmiPortType[Index];
+    UtmiData.UtmiPhyPort = BoardDesc[Index].UtmiPortType;
 
     /* Currently only Cp110 is supported */
     Cp110UtmiPhyInit (&UtmiData);
   }
 
+  BoardDescProtocol->BoardDescFree (BoardDesc);
+
   return EFI_SUCCESS;
 }
-- 
2.7.4

[platforms: PATCH v2 07/25] Marvell/Library: RealTimeClockLib: Simplify obtaining base address

[Marcin Wojtas]

Hitherto mechanism of obtaining RTC base address proved
to be not flexible enough to support more than one SoC
family. Because there can be a single controller in use
anyway, this patch drops utilization of MvHwDescLib
header with hardcoded structure and replace it with
simple UINT64 PCD.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Silicon/Marvell/Marvell.dec                                              |  2 +-
 Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc                           |  2 +-
 Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc                           |  2 +-
 Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc                    |  2 +-
 Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf |  2 +-
 Silicon/Marvell/Include/Library/MvHwDescLib.h                            | 25 -----------------
 Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c   | 29 ++++----------------
 7 files changed, 11 insertions(+), 53 deletions(-)

diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index 6861cc4..4def897 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -195,7 +195,7 @@
   gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x0 }|VOID*|0x3000035
 
 #RTC
-  gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x0 }|VOID*|0x40000052
+  gMarvellTokenSpaceGuid.PcdRtcBaseAddress|0x0|UINT64|0x40000052
 
 #TRNG
   gMarvellTokenSpaceGuid.PcdEip76TrngBaseAddress|0x0|UINT64|0x50000053
diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
index 68813f8..5ccee1b 100644
--- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
+++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
@@ -134,4 +134,4 @@
   gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1, 0x1 }
 
   #RTC
-  gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x1 }
+  gMarvellTokenSpaceGuid.PcdRtcBaseAddress|0xF2284000
diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
index 582e939..2425c45 100644
--- a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
+++ b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
@@ -155,4 +155,4 @@
   gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1, 0x1 }
 
   #RTC
-  gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x0, 0x1 }
+  gMarvellTokenSpaceGuid.PcdRtcBaseAddress|0xF4284000
diff --git a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc
index 8230d67..1baed88 100644
--- a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc
+++ b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc
@@ -146,4 +146,4 @@
   gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1, 0x1 }
 
   #RTC
-  gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x0, 0x1 }
+  gMarvellTokenSpaceGuid.PcdRtcBaseAddress|0xF4284000
diff --git a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf
index 59c71c4..1ecd444 100644
--- a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf
+++ b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf
@@ -49,7 +49,7 @@
   gEfiEventVirtualAddressChangeGuid
 
 [Pcd]
-  gMarvellTokenSpaceGuid.PcdRtcEnabled
+  gMarvellTokenSpaceGuid.PcdRtcBaseAddress
 
 [Depex.common.DXE_RUNTIME_DRIVER]
   gEfiCpuArchProtocolGuid
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index e13814a..34d03d4 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -116,17 +116,6 @@ typedef struct {
 } MVHW_PP2_DESC;
 
 //
-// RealTimeClock devices description template definition
-//
-#define MVHW_MAX_RTC_DEVS         2
-
-typedef struct {
-  UINT8 RtcDevCount;
-  UINTN RtcBaseAddresses[MVHW_MAX_RTC_DEVS];
-  UINTN RtcMemSize[MVHW_MAX_RTC_DEVS];
-} MVHW_RTC_DESC;
-
-//
 // Platform description of CommonPhy devices
 //
 #define MVHW_CP0_COMPHY_BASE       0xF2441000
@@ -226,18 +215,4 @@ MVHW_PP2_DESC mA7k8kPp2DescTemplate = {\
   { MVHW_PP2_CLK_FREQ, MVHW_PP2_CLK_FREQ } \
 }
 
-//
-// Platform description of RealTimeClock devices
-//
-#define MVHW_CP0_RTC0_BASE       0xF2284000
-#define MVHW_CP1_RTC0_BASE       0xF4284000
-
-#define DECLARE_A7K8K_RTC_TEMPLATE \
-STATIC \
-MVHW_RTC_DESC mA7k8kRtcDescTemplate = {\
-  2,\
-  { MVHW_CP0_RTC0_BASE, MVHW_CP1_RTC0_BASE },\
-  { SIZE_4KB, SIZE_4KB }\
-}
-
 #endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
index d671b6a..087bd9a 100644
--- a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
@@ -26,7 +26,6 @@
 #include <Library/DxeServicesTableLib.h>
 #include <Library/TimeBaseLib.h>
 #include <Library/IoLib.h>
-#include <Library/MvHwDescLib.h>
 #include <Library/RealTimeClockLib.h>
 #include <Library/TimerLib.h>
 #include <Library/UefiBootServicesTableLib.h>
@@ -34,7 +33,6 @@
 #include <Protocol/RealTimeClock.h>
 #include "RealTimeClockLib.h"
 
-DECLARE_A7K8K_RTC_TEMPLATE;
 STATIC EFI_EVENT              mRtcVirtualAddrChangeEvent;
 STATIC UINTN                  mArmadaRtcBase;
 
@@ -216,28 +214,13 @@ LibRtcInitialize (
   IN EFI_SYSTEM_TABLE                      *SystemTable
   )
 {
-  MVHW_RTC_DESC *Desc = &mA7k8kRtcDescTemplate;
-  UINT8         *RtcDeviceTable, Index;
   EFI_HANDLE    Handle;
   EFI_STATUS    Status;
 
-  // Pick RTC device and initialize its data
-  RtcDeviceTable = (UINT8 *) PcdGetPtr (PcdRtcEnabled);
-  if (RtcDeviceTable == NULL) {
-    DEBUG ((DEBUG_ERROR, "RTC: Missing PcdRtcEnabled\n"));
-    return EFI_INVALID_PARAMETER;
-  }
-
-  // Initialize only first of enabled controllers
-  for (Index = 0; Index < PcdGetSize (PcdRtcEnabled); Index++) {
-    if (MVHW_DEV_ENABLED (Rtc, Index)) {
-      DEBUG ((DEBUG_ERROR, "RTC: Initialize controller %d\n", Index));
-      mArmadaRtcBase = Desc->RtcBaseAddresses[Index];
-      break;
-    }
-  }
+  // Obtain RTC device base address
+  mArmadaRtcBase = PcdGet64 (PcdRtcBaseAddress);
 
-  // Check if any of the controllers can be initialized
+  // Check if the controller can be initialized
   if (mArmadaRtcBase == 0) {
     DEBUG ((DEBUG_ERROR, "RTC: None of controllers enabled\n"));
     return EFI_INVALID_PARAMETER;
@@ -247,7 +230,7 @@ LibRtcInitialize (
   Status = gDS->AddMemorySpace (
                   EfiGcdMemoryTypeMemoryMappedIo,
                   mArmadaRtcBase,
-                  Desc->RtcMemSize[Index],
+                  SIZE_4KB,
                   EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
                   );
   if (EFI_ERROR (Status)) {
@@ -257,7 +240,7 @@ LibRtcInitialize (
 
   Status = gDS->SetMemorySpaceAttributes (
                   mArmadaRtcBase,
-                  Desc->RtcMemSize[Index],
+                  SIZE_4KB,
                   EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
                   );
   if (EFI_ERROR (Status)) {
@@ -304,7 +287,7 @@ LibRtcInitialize (
 ErrEvent:
   gBS->UninstallProtocolInterface (Handle, &gEfiRealTimeClockArchProtocolGuid, NULL);
 ErrSetMem:
-  gDS->RemoveMemorySpace (mArmadaRtcBase, Desc->RtcMemSize[Index]);
+  gDS->RemoveMemorySpace (mArmadaRtcBase, SIZE_4KB);
 
   return Status;
 }
-- 
2.7.4

[platforms: PATCH v2 08/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information

[Marcin Wojtas]

This patch introduces new library callback (ArmadaSoCDescPp2Get ()),
which dynamically allocates and fills MV_SOC_PP2_DESC structure with
the SoC description of PP2 NICs.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h |  6 ++++
 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                             | 15 ++++++++++
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 29 ++++++++++++++++++++
 3 files changed, 50 insertions(+)

diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
index c5711b0..d63c3b5 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
@@ -24,6 +24,12 @@
 #define MV_SOC_CP_BASE(Cp)               (0xF2000000 + ((Cp) * 0x2000000))
 
 //
+// Platform description of PP2 NIC
+//
+#define MV_SOC_PP2_BASE(Cp)              MV_SOC_CP_BASE ((Cp))
+#define MV_SOC_PP2_CLK_FREQ              333333333
+
+//
 // Platform description of UTMI PHY's
 //
 #define MV_SOC_UTMI_PER_CP_COUNT         2
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
index 0d45684..cafcc0f 100644
--- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -15,6 +15,21 @@
 #define __ARMADA_SOC_DESC_LIB_H__
 
 //
+// PP2 NIC devices SoC description
+//
+typedef struct {
+  UINTN Pp2BaseAddress;
+  UINTN Pp2ClockFrequency;
+} MV_SOC_PP2_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescPp2Get (
+  IN OUT MV_SOC_PP2_DESC  **Pp2Desc,
+  IN OUT UINTN             *DescCount
+  );
+
+//
 // UTMI PHY devices SoC description
 //
 typedef struct {
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index 63fb224..61b4e30 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -30,6 +30,35 @@
 
 EFI_STATUS
 EFIAPI
+ArmadaSoCDescPp2Get (
+  IN OUT MV_SOC_PP2_DESC  **Pp2Desc,
+  IN OUT UINTN             *DescCount
+  )
+{
+  MV_SOC_PP2_DESC *Desc;
+  UINTN CpCount, CpIndex;
+
+  CpCount = FixedPcdGet8 (PcdMaxCpCount);
+
+  Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_PP2_DESC));
+  if (Desc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+    Desc[CpIndex].Pp2BaseAddress = MV_SOC_PP2_BASE (CpIndex);
+    Desc[CpIndex].Pp2ClockFrequency = MV_SOC_PP2_CLK_FREQ;
+  }
+
+  *Pp2Desc = Desc;
+  *DescCount = CpCount;
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
 ArmadaSoCDescUtmiGet (
   IN OUT MV_SOC_UTMI_DESC  **UtmiDesc,
   IN OUT UINTN              *DescCount
-- 
2.7.4

[platforms: PATCH v2 09/25] Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support

[Marcin Wojtas]

Introduce new callback that can provide information
about PP2 NICs to the Pp2Dxe driver.

Extend ArmadaBoardDescLib with new structure MV_BOARD_PP2_DESC,
for holding board specific data. In further steps it should
be extended and replace PCD port's representation with the
appropriate structures.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf |  1 +
 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h |  8 +++
 Silicon/Marvell/Include/Protocol/BoardDesc.h         |  8 +++
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c   | 63 ++++++++++++++++++++
 4 files changed, 80 insertions(+)

diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
index 5da5f21..6f57f06 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -58,6 +58,7 @@
 
 [Pcd]
   gMarvellTokenSpaceGuid.PcdPciEXhci
+  gMarvellTokenSpaceGuid.PcdPp2Controllers
   gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
   gMarvellTokenSpaceGuid.PcdUtmiPortType
 
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index 068535a..ab94877 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -17,6 +17,14 @@
 #include <Library/ArmadaSoCDescLib.h>
 
 //
+// PP2 NIC devices per-board description
+//
+typedef struct {
+  MV_SOC_PP2_DESC *SoC;
+  UINT8            Pp2DevCount;
+} MV_BOARD_PP2_DESC;
+
+//
 // UTMI PHY devices per-board description
 //
 typedef struct {
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index f8a2902..114a0ec 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
 
 typedef
 EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_PP2_GET) (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_PP2_DESC       **Pp2Desc
+  );
+
+typedef
+EFI_STATUS
 (EFIAPI *MV_BOARD_DESC_UTMI_GET) (
   IN MARVELL_BOARD_DESC_PROTOCOL  *This,
   IN OUT MV_BOARD_UTMI_DESC      **UtmiDesc
@@ -55,6 +62,7 @@ VOID
   );
 
 struct _MARVELL_BOARD_DESC_PROTOCOL {
+  MV_BOARD_DESC_PP2_GET          BoardDescPp2Get;
   MV_BOARD_DESC_UTMI_GET         BoardDescUtmiGet;
   MV_BOARD_DESC_FREE             BoardDescFree;
 };
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 0232a21..7c0bc39 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -37,6 +37,68 @@ MV_BOARD_DESC *mBoardDescInstance;
 
 STATIC
 EFI_STATUS
+MvBoardDescPp2Get (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_PP2_DESC       **Pp2Desc
+  )
+{
+  UINT8 *Pp2DeviceEnabled;
+  UINTN Pp2Count, Pp2DeviceTableSize, Pp2Index, Index;
+  MV_BOARD_PP2_DESC *BoardDesc;
+  MV_SOC_PP2_DESC *SoCDesc;
+  EFI_STATUS Status;
+
+  /* Get SoC data about all available PP2 controllers */
+  Status = ArmadaSoCDescPp2Get (&SoCDesc, &Pp2Count);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  /*
+   * Obtain table with enabled Pp2 controllers,
+   * which is represented as an array of UINT8 values
+   * (0x0 - disabled, 0x1 enabled).
+   */
+  Pp2DeviceEnabled = PcdGetPtr (PcdPp2Controllers);
+  if (Pp2DeviceEnabled == NULL) {
+    /* No PP2 NIC on platform */
+    return EFI_SUCCESS;
+  }
+
+  Pp2DeviceTableSize = PcdGetSize (PcdPp2Controllers);
+
+  /* Check if PCD with PP2 NICs is correctly defined */
+  if (Pp2DeviceTableSize > Pp2Count) {
+    DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPp2Controllers format\n", __FUNCTION__));
+    return EFI_INVALID_PARAMETER;
+  }
+
+  /* Allocate and fill board description */
+  BoardDesc = AllocateZeroPool (Pp2DeviceTableSize * sizeof (MV_BOARD_PP2_DESC));
+  if (BoardDesc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  Pp2Index = 0;
+  for (Index = 0; Index < Pp2DeviceTableSize; Index++) {
+    if (!Pp2DeviceEnabled[Index]) {
+      continue;
+    }
+
+    BoardDesc[Pp2Index].SoC = &SoCDesc[Index];
+    Pp2Index++;
+  }
+
+  BoardDesc->Pp2DevCount = Pp2Index;
+
+  *Pp2Desc = BoardDesc;
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
 MvBoardDescUtmiGet (
   IN MARVELL_BOARD_DESC_PROTOCOL  *This,
   IN OUT MV_BOARD_UTMI_DESC      **UtmiDesc
@@ -140,6 +202,7 @@ MvBoardDescInitProtocol (
   IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
   )
 {
+  BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
   BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
   BoardDescProtocol->BoardDescFree = MvBoardDescFree;
 
-- 
2.7.4

[platforms: PATCH v2 10/25] Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol

[Marcin Wojtas]

Pp2Dxe driver used to get Armada7k8k PP2 controller description from
hardcoded values stored in the header file MvHwDescLib.h.
As a result it is very hard to support other Armada SoC families
with this driver.

This patch updates the driver to get PP2 controller description from
newly introduced MARVELL_BOARD_DESC protocol, and removes the dependency
on the hardcoded structures.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf |  2 +-
 Silicon/Marvell/Include/Library/MvHwDescLib.h | 26 ------------
 Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c   | 43 ++++++++------------
 3 files changed, 19 insertions(+), 52 deletions(-)

diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
index fcd0611..be536ab 100644
--- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
+++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
@@ -67,11 +67,11 @@
   gEfiSimpleNetworkProtocolGuid
   gEfiDevicePathProtocolGuid
   gEfiCpuArchProtocolGuid
+  gMarvellBoardDescProtocolGuid
   gMarvellMdioProtocolGuid
   gMarvellPhyProtocolGuid
 
 [Pcd]
-  gMarvellTokenSpaceGuid.PcdPp2Controllers
   gMarvellTokenSpaceGuid.PcdPp2GopIndexes
   gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp
   gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 34d03d4..5fd514c 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -105,17 +105,6 @@ typedef struct {
 } MVHW_NONDISCOVERABLE_DESC;
 
 //
-// PP2 NIC devices description template definition
-//
-#define MVHW_MAX_PP2_DEVS         4
-
-typedef struct {
-  UINT8 Pp2DevCount;
-  UINTN Pp2BaseAddresses[MVHW_MAX_PP2_DEVS];
-  UINTN Pp2ClockFrequency[MVHW_MAX_PP2_DEVS];
-} MVHW_PP2_DESC;
-
-//
 // Platform description of CommonPhy devices
 //
 #define MVHW_CP0_COMPHY_BASE       0xF2441000
@@ -200,19 +189,4 @@ MVHW_NONDISCOVERABLE_DESC mA7k8kNonDiscoverableDescTemplate = {\
   { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent }\
 }
 
-//
-// Platform description of Pp2 NIC devices
-//
-#define MVHW_CP0_PP2_BASE       0xF2000000
-#define MVHW_CP1_PP2_BASE       0xF4000000
-#define MVHW_PP2_CLK_FREQ       333333333
-
-#define DECLARE_A7K8K_PP2_TEMPLATE \
-STATIC \
-MVHW_PP2_DESC mA7k8kPp2DescTemplate = {\
-  2,\
-  { MVHW_CP0_PP2_BASE, MVHW_CP1_PP2_BASE },\
-  { MVHW_PP2_CLK_FREQ, MVHW_PP2_CLK_FREQ } \
-}
-
 #endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
index 3ed10f6..02b2798 100644
--- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
+++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
@@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 *******************************************************************************/
 
+#include <Protocol/BoardDesc.h>
 #include <Protocol/DevicePath.h>
 #include <Protocol/DriverBinding.h>
 #include <Protocol/SimpleNetwork.h>
@@ -42,7 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include <Library/DebugLib.h>
 #include <Library/IoLib.h>
 #include <Library/MemoryAllocationLib.h>
-#include <Library/MvHwDescLib.h>
 #include <Library/NetLib.h>
 #include <Library/PcdLib.h>
 #include <Library/UefiBootServicesTableLib.h>
@@ -54,8 +54,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 #define ReturnUnlock(tpl, status) do { gBS->RestoreTPL (tpl); return (status); } while(0)
 
-DECLARE_A7K8K_PP2_TEMPLATE;
-
 STATIC PP2_DEVICE_PATH Pp2DevicePathTemplate = {
   {
     {
@@ -1343,35 +1341,28 @@ Pp2DxeInitialise (
   IN EFI_SYSTEM_TABLE *SystemTable
   )
 {
-  MVHW_PP2_DESC *Desc = &mA7k8kPp2DescTemplate;
-  UINT8 *Pp2DeviceTable, Index;
+  MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+  MV_BOARD_PP2_DESC *Pp2BoardDesc;
   MVPP2_SHARED *Mvpp2Shared;
   EFI_STATUS Status;
+  UINTN Index;
 
   /* Obtain table with enabled Pp2 devices */
-  Pp2DeviceTable = (UINT8 *)PcdGetPtr (PcdPp2Controllers);
-  if (Pp2DeviceTable == NULL) {
-    DEBUG ((DEBUG_ERROR, "Missing PcdPp2Controllers\n"));
-    return EFI_INVALID_PARAMETER;
-  }
-
-  if (PcdGetSize (PcdPp2Controllers) > MVHW_MAX_PP2_DEVS) {
-    DEBUG ((DEBUG_ERROR, "Wrong PcdPp2Controllers format\n"));
-    return EFI_INVALID_PARAMETER;
+  Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+                  NULL,
+                  (VOID **)&BoardDescProtocol);
+  if (EFI_ERROR (Status)) {
+    return Status;
   }
 
-  /* Check amount of declared ports */
-  if (PcdGetSize (PcdPp2Port2Controller) > Desc->Pp2DevCount * MVPP2_MAX_PORT) {
-    DEBUG ((DEBUG_ERROR, "Pp2Dxe: Wrong too many ports declared\n"));
-    return EFI_INVALID_PARAMETER;
+  Status = BoardDescProtocol->BoardDescPp2Get (BoardDescProtocol,
+                                &Pp2BoardDesc);
+  if (EFI_ERROR (Status)) {
+    return Status;
   }
 
   /* Initialize enabled chips */
-  for (Index = 0; Index < PcdGetSize (PcdPp2Controllers); Index++) {
-    if (!MVHW_DEV_ENABLED (Pp2, Index)) {
-      DEBUG ((DEBUG_ERROR, "Skip Pp2 controller %d\n", Index));
-      continue;
-    }
+  for (Index = 0; Index < Pp2BoardDesc->Pp2DevCount; Index++) {
 
     /* Initialize private data */
     Mvpp2Shared = AllocateZeroPool (sizeof (MVPP2_SHARED));
@@ -1383,8 +1374,8 @@ Pp2DxeInitialise (
     Status = Pp2DxeInitialiseController (
                     Index,
                     Mvpp2Shared,
-                    Desc->Pp2BaseAddresses[Index],
-                    Desc->Pp2ClockFrequency[Index]
+                    Pp2BoardDesc[Index].SoC->Pp2BaseAddress,
+                    Pp2BoardDesc[Index].SoC->Pp2ClockFrequency
                     );
     if (EFI_ERROR(Status)) {
       FreePool (Mvpp2Shared);
@@ -1393,5 +1384,7 @@ Pp2DxeInitialise (
     }
   }
 
+  BoardDescProtocol->BoardDescFree (Pp2BoardDesc);
+
   return EFI_SUCCESS;
 }
-- 
2.7.4

[platforms: PATCH v2 11/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI

[Marcin Wojtas]

This patch introduces new library callbacks for NonDiscoverable devices
i.e. AHCI/XHCI/SDMMC. They dynamically allocate and fill according
structures with the SoC description of the devices.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h | 18 ++++
 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                             | 48 ++++++++++
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 92 ++++++++++++++++++++
 3 files changed, 158 insertions(+)

diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
index d63c3b5..94fd6fa 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
@@ -24,12 +24,24 @@
 #define MV_SOC_CP_BASE(Cp)               (0xF2000000 + ((Cp) * 0x2000000))
 
 //
+// Platform description of AHCI controllers
+//
+#define MV_SOC_AHCI_BASE(Cp)             (MV_SOC_CP_BASE ((Cp)) + 0x540000)
+#define MV_SOC_AHCI_ID(Cp)               ((Cp) % 2)
+
+//
 // Platform description of PP2 NIC
 //
 #define MV_SOC_PP2_BASE(Cp)              MV_SOC_CP_BASE ((Cp))
 #define MV_SOC_PP2_CLK_FREQ              333333333
 
 //
+// Platform description of SDMMC controllers
+//
+#define MV_SOC_MAX_SDMMC_COUNT           2
+#define MV_SOC_SDMMC_BASE(Index)         ((Index) == 0 ? 0xF06E0000 : 0xF2780000)
+
+//
 // Platform description of UTMI PHY's
 //
 #define MV_SOC_UTMI_PER_CP_COUNT         2
@@ -38,4 +50,10 @@
 #define MV_SOC_UTMI_CFG_BASE             0x440440
 #define MV_SOC_UTMI_USB_CFG_BASE         0x440420
 
+//
+// Platform description of XHCI controllers
+//
+#define MV_SOC_XHCI_PER_CP_COUNT         2
+#define MV_SOC_XHCI_BASE(Xhci)           (0x500000 + ((Xhci) * 0x10000))
+
 #endif
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
index cafcc0f..3b29d78 100644
--- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -14,6 +14,54 @@
 #ifndef __ARMADA_SOC_DESC_LIB_H__
 #define __ARMADA_SOC_DESC_LIB_H__
 
+#include <Library/NonDiscoverableDeviceRegistrationLib.h>
+
+//
+// NonDiscoverable devices SoC description
+//
+// AHCI
+typedef struct {
+  UINTN AhciId;
+  UINTN AhciBaseAddress;
+  UINTN AhciMemSize;
+  NON_DISCOVERABLE_DEVICE_DMA_TYPE AhciDmaType;
+} MV_SOC_AHCI_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescAhciGet (
+  IN OUT MV_SOC_AHCI_DESC  **AhciDesc,
+  IN OUT UINTN              *DescCount
+  );
+
+// SDMMC
+typedef struct {
+  UINTN SdMmcBaseAddress;
+  UINTN SdMmcMemSize;
+  NON_DISCOVERABLE_DEVICE_DMA_TYPE SdMmcDmaType;
+} MV_SOC_SDMMC_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescSdMmcGet (
+  IN OUT MV_SOC_SDMMC_DESC  **SdMmcDesc,
+  IN OUT UINTN               *DescCount
+  );
+
+// XHCI
+typedef struct {
+  UINTN XhciBaseAddress;
+  UINTN XhciMemSize;
+  NON_DISCOVERABLE_DEVICE_DMA_TYPE XhciDmaType;
+} MV_SOC_XHCI_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescXhciGet (
+  IN OUT MV_SOC_XHCI_DESC  **XhciDesc,
+  IN OUT UINTN              *DescCount
+  );
+
 //
 // PP2 NIC devices SoC description
 //
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index 61b4e30..97fe3f8 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -30,6 +30,37 @@
 
 EFI_STATUS
 EFIAPI
+ArmadaSoCDescAhciGet (
+  IN OUT MV_SOC_AHCI_DESC  **AhciDesc,
+  IN OUT UINTN              *DescCount
+  )
+{
+  MV_SOC_AHCI_DESC *Desc;
+  UINTN CpCount, CpIndex;
+
+  CpCount = FixedPcdGet8 (PcdMaxCpCount);
+
+  Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_AHCI_DESC));
+  if (Desc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+    Desc[CpIndex].AhciId = MV_SOC_AHCI_ID (CpIndex);
+    Desc[CpIndex].AhciBaseAddress = MV_SOC_AHCI_BASE (CpIndex);
+    Desc[CpIndex].AhciMemSize = SIZE_8KB;
+    Desc[CpIndex].AhciDmaType = NonDiscoverableDeviceDmaTypeCoherent;
+  }
+
+  *AhciDesc = Desc;
+  *DescCount = CpCount;
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
 ArmadaSoCDescPp2Get (
   IN OUT MV_SOC_PP2_DESC  **Pp2Desc,
   IN OUT UINTN             *DescCount
@@ -59,6 +90,34 @@ ArmadaSoCDescPp2Get (
 
 EFI_STATUS
 EFIAPI
+ArmadaSoCDescSdMmcGet (
+  IN OUT MV_SOC_SDMMC_DESC  **SdMmcDesc,
+  IN OUT UINTN               *DescCount
+  )
+{
+  MV_SOC_SDMMC_DESC *Desc;
+  UINTN Index;
+
+  Desc = AllocateZeroPool (MV_SOC_MAX_SDMMC_COUNT * sizeof (MV_SOC_SDMMC_DESC));
+  if (Desc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  for (Index = 0; Index < MV_SOC_MAX_SDMMC_COUNT; Index++) {
+    Desc[Index].SdMmcBaseAddress = MV_SOC_SDMMC_BASE (Index);
+    Desc[Index].SdMmcMemSize = SIZE_1KB;
+    Desc[Index].SdMmcDmaType = NonDiscoverableDeviceDmaTypeCoherent;
+  }
+
+  *SdMmcDesc = Desc;
+  *DescCount = MV_SOC_MAX_SDMMC_COUNT;
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
 ArmadaSoCDescUtmiGet (
   IN OUT MV_SOC_UTMI_DESC  **UtmiDesc,
   IN OUT UINTN              *DescCount
@@ -92,3 +151,36 @@ ArmadaSoCDescUtmiGet (
 
   return EFI_SUCCESS;
 }
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescXhciGet (
+  IN OUT MV_SOC_XHCI_DESC  **XhciDesc,
+  IN OUT UINTN              *DescCount
+  )
+{
+  MV_SOC_XHCI_DESC *Desc;
+  UINTN CpCount, CpIndex, Index;
+
+  CpCount = FixedPcdGet8 (PcdMaxCpCount);
+
+  *DescCount = CpCount * MV_SOC_XHCI_PER_CP_COUNT;
+  Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_XHCI_DESC));
+  if (Desc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  *XhciDesc = Desc;
+
+  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+    for (Index = 0; Index < MV_SOC_XHCI_PER_CP_COUNT; Index++) {
+      Desc->XhciBaseAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_XHCI_BASE (Index);
+      Desc->XhciMemSize = SIZE_16KB;
+      Desc->XhciDmaType = NonDiscoverableDeviceDmaTypeCoherent;
+      Desc++;
+    }
+  }
+
+  return EFI_SUCCESS;
+}
-- 
2.7.4

[platforms: PATCH v2 12/25] Marvell/Drivers: MvBoardDesc: Extend protocol with AHCI/SDMMC/XHCI

[Marcin Wojtas]

Introduce new callback that can provide information
about NonDiscoverableDevices to the relevant drivers and libraries.

Extend ArmadaBoardDescLib with new structures (MV_BOARD_AHCI_DESC/
MV_BOARD_SDMMC_DESC/MV_BOARD_XHCI_DESC) for holding board specific
data.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf |   2 +
 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h |  28 +++
 Silicon/Marvell/Include/Protocol/BoardDesc.h         |  24 +++
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c   | 192 ++++++++++++++++++++
 4 files changed, 246 insertions(+)

diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
index 6f57f06..cc0d9d4 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -57,6 +57,8 @@
   gMarvellBoardDescProtocolGuid
 
 [Pcd]
+  gMarvellTokenSpaceGuid.PcdPciEAhci
+  gMarvellTokenSpaceGuid.PcdPciESdhci
   gMarvellTokenSpaceGuid.PcdPciEXhci
   gMarvellTokenSpaceGuid.PcdPp2Controllers
   gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index ab94877..7e4fa4d 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -17,6 +17,34 @@
 #include <Library/ArmadaSoCDescLib.h>
 
 //
+// NonDiscoverableDevices per-board description
+//
+
+//
+// AHCI devices per-board description
+//
+typedef struct {
+  MV_SOC_AHCI_DESC *SoC;
+  UINTN             AhciDevCount;
+} MV_BOARD_AHCI_DESC;
+
+//
+// SDMMC devices per-board description
+//
+typedef struct {
+  MV_SOC_SDMMC_DESC *SoC;
+  UINTN              SdMmcDevCount;
+} MV_BOARD_SDMMC_DESC;
+
+//
+// XHCI devices per-board description
+//
+typedef struct {
+  MV_SOC_XHCI_DESC *SoC;
+  UINTN             XhciDevCount;
+} MV_BOARD_XHCI_DESC;
+
+//
 // PP2 NIC devices per-board description
 //
 typedef struct {
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index 114a0ec..edf9491 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -43,6 +43,27 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
 
 typedef
 EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_AHCI_GET) (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_AHCI_DESC      **AhciDesc
+  );
+
+typedef
+EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_SDMMC_GET) (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_SDMMC_DESC     **SdMmcDesc
+  );
+
+typedef
+EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_XHCI_GET) (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_XHCI_DESC      **XhciDesc
+  );
+
+typedef
+EFI_STATUS
 (EFIAPI *MV_BOARD_DESC_PP2_GET) (
   IN MARVELL_BOARD_DESC_PROTOCOL  *This,
   IN OUT MV_BOARD_PP2_DESC       **Pp2Desc
@@ -62,8 +83,11 @@ VOID
   );
 
 struct _MARVELL_BOARD_DESC_PROTOCOL {
+  MV_BOARD_DESC_AHCI_GET         BoardDescAhciGet;
   MV_BOARD_DESC_PP2_GET          BoardDescPp2Get;
+  MV_BOARD_DESC_SDMMC_GET        BoardDescSdMmcGet;
   MV_BOARD_DESC_UTMI_GET         BoardDescUtmiGet;
+  MV_BOARD_DESC_XHCI_GET         BoardDescXhciGet;
   MV_BOARD_DESC_FREE             BoardDescFree;
 };
 
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 7c0bc39..3439017 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -37,6 +37,195 @@ MV_BOARD_DESC *mBoardDescInstance;
 
 STATIC
 EFI_STATUS
+MvBoardDescAhciGet (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_AHCI_DESC      **AhciDesc
+  )
+{
+  UINT8 *AhciDeviceEnabled;
+  UINTN AhciCount, AhciDeviceTableSize, AhciIndex, Index;
+  MV_BOARD_AHCI_DESC *BoardDesc;
+  MV_SOC_AHCI_DESC *SoCDesc;
+  EFI_STATUS Status;
+
+  /* Get SoC data about all available AHCI controllers */
+  Status = ArmadaSoCDescAhciGet (&SoCDesc, &AhciCount);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  /*
+   * Obtain table with enabled AHCI controllers
+   * which is represented as an array of UINT8 values
+   * (0x0 - disabled, 0x1 enabled).
+   */
+  AhciDeviceEnabled = PcdGetPtr (PcdPciEAhci);
+  if (AhciDeviceEnabled == NULL) {
+    /* No AHCI on the platform */
+    return EFI_SUCCESS;
+  }
+
+  AhciDeviceTableSize = PcdGetSize (PcdPciEAhci);
+
+  /* Check if PCD with AHCI controllers is correctly defined */
+  if (AhciDeviceTableSize > AhciCount) {
+    DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEAhci format\n", __FUNCTION__));
+    return EFI_INVALID_PARAMETER;
+  }
+
+  /* Allocate and fill board description */
+  BoardDesc = AllocateZeroPool (AhciDeviceTableSize * sizeof (MV_BOARD_AHCI_DESC));
+  if (BoardDesc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  AhciIndex = 0;
+  for (Index = 0; Index < AhciDeviceTableSize; Index++) {
+    if (!AhciDeviceEnabled[Index]) {
+      DEBUG ((DEBUG_INFO, "%a: Skip Ahci controller %d\n", __FUNCTION__, Index));
+      continue;
+    }
+
+    BoardDesc[AhciIndex].SoC = &SoCDesc[Index];
+    AhciIndex++;
+  }
+
+  BoardDesc->AhciDevCount = AhciIndex;
+
+  *AhciDesc = BoardDesc;
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+MvBoardDescSdMmcGet (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_SDMMC_DESC     **SdMmcDesc
+  )
+{
+  UINT8 *SdMmcDeviceEnabled;
+  UINTN SdMmcCount, SdMmcDeviceTableSize, SdMmcIndex, Index;
+  MV_BOARD_SDMMC_DESC *BoardDesc;
+  MV_SOC_SDMMC_DESC *SoCDesc;
+  EFI_STATUS Status;
+
+  /* Get SoC data about all available SDMMC controllers */
+  Status = ArmadaSoCDescSdMmcGet (&SoCDesc, &SdMmcCount);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  /*
+   * Obtain table with enabled SDMMC controllers
+   * which is represented as an array of UINT8 values
+   * (0x0 - disabled, 0x1 enabled).
+   */
+  SdMmcDeviceEnabled = PcdGetPtr (PcdPciESdhci);
+  if (SdMmcDeviceEnabled == NULL) {
+    /* No SDMMC on platform */
+    return EFI_SUCCESS;
+  }
+
+  SdMmcDeviceTableSize = PcdGetSize (PcdPciESdhci);
+
+  /* Check if PCD with SDMMC controllers is correctly defined */
+  if (SdMmcDeviceTableSize > SdMmcCount) {
+    DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciESdhci format\n", __FUNCTION__));
+    return EFI_INVALID_PARAMETER;
+  }
+
+  /* Allocate and fill board description */
+  BoardDesc = AllocateZeroPool (SdMmcDeviceTableSize * sizeof (MV_BOARD_SDMMC_DESC));
+  if (BoardDesc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  SdMmcIndex = 0;
+  for (Index = 0; Index < SdMmcDeviceTableSize; Index++) {
+    if (!SdMmcDeviceEnabled[Index]) {
+      DEBUG ((DEBUG_INFO, "%a: Skip SdMmc controller %d\n", __FUNCTION__, Index));
+      continue;
+    }
+
+    BoardDesc[SdMmcIndex].SoC = &SoCDesc[Index];
+    SdMmcIndex++;
+  }
+
+  BoardDesc->SdMmcDevCount = SdMmcIndex;
+
+  *SdMmcDesc = BoardDesc;
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
+MvBoardDescXhciGet (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_XHCI_DESC      **XhciDesc
+  )
+{
+  UINT8 *XhciDeviceEnabled;
+  UINTN XhciCount, XhciDeviceTableSize, XhciIndex, Index;
+  MV_BOARD_XHCI_DESC *BoardDesc;
+  MV_SOC_XHCI_DESC *SoCDesc;
+  EFI_STATUS Status;
+
+  /* Get SoC data about all available XHCI controllers */
+  Status = ArmadaSoCDescXhciGet (&SoCDesc, &XhciCount);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  /*
+   * Obtain table with enabled XHCI controllers
+   * which is represented as an array of UINT8 values
+   * (0x0 - disabled, 0x1 enabled).
+   */
+  XhciDeviceEnabled = PcdGetPtr (PcdPciEXhci);
+  if (XhciDeviceEnabled == NULL) {
+    /* No XHCI on platform */
+    return EFI_SUCCESS;
+  }
+
+  XhciDeviceTableSize = PcdGetSize (PcdPciEXhci);
+
+  /* Check if PCD with XHCI controllers is correctly defined */
+  if (XhciDeviceTableSize > XhciCount) {
+    DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEXhci format\n", __FUNCTION__));
+    return EFI_INVALID_PARAMETER;
+  }
+
+  /* Allocate and fill board description */
+  BoardDesc = AllocateZeroPool (XhciDeviceTableSize * sizeof (MV_BOARD_XHCI_DESC));
+  if (BoardDesc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  XhciIndex = 0;
+  for (Index = 0; Index < XhciDeviceTableSize; Index++) {
+    if (!XhciDeviceEnabled[Index]) {
+      DEBUG ((DEBUG_INFO, "%a: Skip Xhci controller %d\n", __FUNCTION__, Index));
+      continue;
+    }
+
+    BoardDesc[XhciIndex].SoC = &SoCDesc[Index];
+    XhciIndex++;
+  }
+
+  BoardDesc->XhciDevCount = XhciIndex;
+
+  *XhciDesc = BoardDesc;
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
 MvBoardDescPp2Get (
   IN MARVELL_BOARD_DESC_PROTOCOL  *This,
   IN OUT MV_BOARD_PP2_DESC       **Pp2Desc
@@ -202,8 +391,11 @@ MvBoardDescInitProtocol (
   IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
   )
 {
+  BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
   BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
+  BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
   BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
+  BoardDescProtocol->BoardDescXhciGet = MvBoardDescXhciGet;
   BoardDescProtocol->BoardDescFree = MvBoardDescFree;
 
   return EFI_SUCCESS;
-- 
2.7.4

[platforms: PATCH v2 13/25] Marvell/Drivers: NonDiscoverable: Switch to use MARVELL_BOARD_DESC

[Marcin Wojtas]

NonDiscoverableDevices driver used to get Armada7k8k
AHCI/SDMMC/XHCI controller description from hardcoded values
stored in the header file MvHwDescLib.h. As a result it is
very hard to support other Armada SoC families with this driver.

This patch updates the driver to get AHCI/SDMMC/XHCI controller
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf |   6 +-
 Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c   | 100 ++++++++++----------
 2 files changed, 52 insertions(+), 54 deletions(-)

diff --git a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf
index b62b3fb..98e5b0c 100644
--- a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf
+++ b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf
@@ -52,10 +52,8 @@
   NonDiscoverableDeviceRegistrationLib
   UefiDriverEntryPoint
 
-[Pcd]
-  gMarvellTokenSpaceGuid.PcdPciEAhci
-  gMarvellTokenSpaceGuid.PcdPciESdhci
-  gMarvellTokenSpaceGuid.PcdPciEXhci
+[Protocols]
+  gMarvellBoardDescProtocolGuid
 
 [Depex]
   TRUE
diff --git a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c
index 6ff90a5..c5cf904 100644
--- a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c
+++ b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c
@@ -35,50 +35,33 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include <PiDxe.h>
 
 #include <Library/DebugLib.h>
-#include <Library/MvHwDescLib.h>
 #include <Library/NonDiscoverableDeviceRegistrationLib.h>
 #include <Library/UefiBootServicesTableLib.h>
 
+#include <Protocol/BoardDesc.h>
 #include <Protocol/EmbeddedExternalDevice.h>
 
-DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE;
-
-//
-// Tables with used devices
-//
-STATIC UINT8 * CONST XhciDeviceTable = FixedPcdGetPtr (PcdPciEXhci);
-STATIC UINT8 * CONST AhciDeviceTable = FixedPcdGetPtr (PcdPciEAhci);
-STATIC UINT8 * CONST SdhciDeviceTable = FixedPcdGetPtr (PcdPciESdhci);
-
 //
 // NonDiscoverable devices registration
 //
 STATIC
 EFI_STATUS
 NonDiscoverableInitXhci (
+  IN MV_BOARD_XHCI_DESC *Desc
   )
 {
-  MVHW_NONDISCOVERABLE_DESC *Desc = &mA7k8kNonDiscoverableDescTemplate;
   EFI_STATUS Status;
   UINT8 i;
 
-  if (PcdGetSize (PcdPciEXhci) < Desc->XhciDevCount) {
-    DEBUG((DEBUG_ERROR, "NonDiscoverable: Wrong PcdPciEXhci format\n"));
-    return EFI_INVALID_PARAMETER;
-  }
-
   for (i = 0; i < Desc->XhciDevCount; i++) {
-    if (!MVHW_DEV_ENABLED (Xhci, i)) {
-      continue;
-    }
-
     Status = RegisterNonDiscoverableMmioDevice (
                      NonDiscoverableDeviceTypeXhci,
-                     Desc->XhciDmaType[i],
+                     Desc[i].SoC->XhciDmaType,
                      NULL,
                      NULL,
                      1,
-                     Desc->XhciBaseAddresses[i], Desc->XhciMemSize[i]
+                     Desc[i].SoC->XhciBaseAddress,
+                     Desc[i].SoC->XhciMemSize
                    );
 
     if (EFI_ERROR(Status)) {
@@ -93,29 +76,21 @@ NonDiscoverableInitXhci (
 STATIC
 EFI_STATUS
 NonDiscoverableInitAhci (
+  IN MV_BOARD_AHCI_DESC *Desc
   )
 {
-  MVHW_NONDISCOVERABLE_DESC *Desc = &mA7k8kNonDiscoverableDescTemplate;
   EFI_STATUS Status;
   UINT8 i;
 
-  if (PcdGetSize (PcdPciEAhci) < Desc->AhciDevCount) {
-    DEBUG((DEBUG_ERROR, "NonDiscoverable: Wrong PcdPciEAhci format\n"));
-    return EFI_INVALID_PARAMETER;
-  }
-
   for (i = 0; i < Desc->AhciDevCount; i++) {
-    if (!MVHW_DEV_ENABLED (Ahci, i)) {
-      continue;
-    }
-
     Status = RegisterNonDiscoverableMmioDevice (
                      NonDiscoverableDeviceTypeAhci,
-                     Desc->AhciDmaType[i],
+                     Desc[i].SoC->AhciDmaType,
                      NULL,
                      NULL,
                      1,
-                     Desc->AhciBaseAddresses[i], Desc->AhciMemSize[i]
+                     Desc[i].SoC->AhciBaseAddress,
+                     Desc[i].SoC->AhciMemSize
                    );
 
     if (EFI_ERROR(Status)) {
@@ -130,29 +105,21 @@ NonDiscoverableInitAhci (
 STATIC
 EFI_STATUS
 NonDiscoverableInitSdhci (
+  IN MV_BOARD_SDMMC_DESC *Desc
   )
 {
-  MVHW_NONDISCOVERABLE_DESC *Desc = &mA7k8kNonDiscoverableDescTemplate;
   EFI_STATUS Status;
   UINT8 i;
 
-  if (PcdGetSize (PcdPciESdhci) < Desc->SdhciDevCount) {
-    DEBUG((DEBUG_ERROR, "NonDiscoverable: Wrong PcdPciESdhci format\n"));
-    return EFI_INVALID_PARAMETER;
-  }
-
-  for (i = 0; i < Desc->SdhciDevCount; i++) {
-    if (!MVHW_DEV_ENABLED (Sdhci, i)) {
-      continue;
-    }
-
+  for (i = 0; i < Desc->SdMmcDevCount; i++) {
     Status = RegisterNonDiscoverableMmioDevice (
                      NonDiscoverableDeviceTypeSdhci,
-                     Desc->SdhciDmaType[i],
+                     Desc[i].SoC->SdMmcDmaType,
                      NULL,
                      NULL,
                      1,
-                     Desc->SdhciBaseAddresses[i], Desc->SdhciMemSize[i]
+                     Desc[i].SoC->SdMmcBaseAddress,
+                     Desc[i].SoC->SdMmcMemSize
                    );
 
     if (EFI_ERROR(Status)) {
@@ -174,22 +141,55 @@ NonDiscoverableEntryPoint (
   IN EFI_SYSTEM_TABLE *SystemTable
   )
 {
+  MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+  MV_BOARD_SDMMC_DESC *SdMmcBoardDesc;
+  MV_BOARD_AHCI_DESC *AhciBoardDesc;
+  MV_BOARD_XHCI_DESC *XhciBoardDesc;
   EFI_STATUS Status;
 
-  Status = NonDiscoverableInitXhci();
+  /* Obtain list of available controllers */
+  Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+                  NULL,
+                  (VOID **)&BoardDescProtocol);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  /* Xhci */
+  Status = BoardDescProtocol->BoardDescXhciGet (BoardDescProtocol,
+                                &XhciBoardDesc);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+  Status = NonDiscoverableInitXhci (XhciBoardDesc);
   if (EFI_ERROR(Status)) {
     return Status;
   }
+  BoardDescProtocol->BoardDescFree (XhciBoardDesc);
 
-  Status = NonDiscoverableInitAhci();
+  /* Ahci */
+  Status = BoardDescProtocol->BoardDescAhciGet (BoardDescProtocol,
+                                &AhciBoardDesc);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+  Status = NonDiscoverableInitAhci (AhciBoardDesc);
   if (EFI_ERROR(Status)) {
     return Status;
   }
+  BoardDescProtocol->BoardDescFree (AhciBoardDesc);
 
-  Status = NonDiscoverableInitSdhci();
+  /* SdMmc */
+  Status = BoardDescProtocol->BoardDescSdMmcGet (BoardDescProtocol,
+                                &SdMmcBoardDesc);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+  Status = NonDiscoverableInitSdhci (SdMmcBoardDesc);
   if (EFI_ERROR(Status)) {
     return Status;
   }
+  BoardDescProtocol->BoardDescFree (SdMmcBoardDesc);
 
   return EFI_SUCCESS;
 }
-- 
2.7.4

[platforms: PATCH v2 14/25] Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC

[Marcin Wojtas]

ComPhy Library used to get Armada7k8k AHCI/SDMMC/XHCI controller
description from hardcoded values stored in the header file
MvHwDescLib.h. As a result it is very hard to support other
Armada SoC families with this library.

This patch updates the driver to get AHCI controller
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf |  1 -
 Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf                    |  6 +-
 Silicon/Marvell/Include/Library/MvHwDescLib.h                      | 60 --------------------
 Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h                      |  4 ++
 Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c                    | 50 ++++++++--------
 5 files changed, 35 insertions(+), 86 deletions(-)

diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
index f2c173c..e888566 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
@@ -47,7 +47,6 @@
 
 [LibraryClasses]
   ArmLib
-  ComPhyLib
   DebugLib
   MemoryAllocationLib
   MppLib
diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
index ce0af54..f36c701 100644
--- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
+++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
@@ -52,12 +52,16 @@
   PcdLib
   SampleAtResetLib
   IoLib
+  UefiBootServicesTableLib
 
 [Sources.common]
   ComPhyLib.c
   ComPhyCp110.c
   ComPhyMux.c
 
+[Protocols]
+  gMarvellBoardDescProtocolGuid  ## CONSUMES
+
 [FixedPcd]
   gMarvellTokenSpaceGuid.PcdComPhyDevices
 
@@ -80,5 +84,3 @@
   gMarvellTokenSpaceGuid.PcdChip3ComPhyTypes
   gMarvellTokenSpaceGuid.PcdChip3ComPhySpeeds
   gMarvellTokenSpaceGuid.PcdChip3ComPhyInvFlags
-
-  gMarvellTokenSpaceGuid.PcdPciEAhci
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 5fd514c..9f383f4 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -36,7 +36,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #define __MVHWDESCLIB_H__
 
 #include <Library/MvComPhyLib.h>
-#include <Library/NonDiscoverableDeviceRegistrationLib.h>
 
 //
 // Helper macros
@@ -80,31 +79,6 @@ typedef struct {
 } MVHW_MDIO_DESC;
 
 //
-// NonDiscoverable devices description template definition
-//
-#define MVHW_MAX_XHCI_DEVS         4
-#define MVHW_MAX_AHCI_DEVS         4
-#define MVHW_MAX_SDHCI_DEVS        4
-
-typedef struct {
-  // XHCI
-  UINT8 XhciDevCount;
-  UINTN XhciBaseAddresses[MVHW_MAX_XHCI_DEVS];
-  UINTN XhciMemSize[MVHW_MAX_XHCI_DEVS];
-  NON_DISCOVERABLE_DEVICE_DMA_TYPE XhciDmaType[MVHW_MAX_XHCI_DEVS];
-  // AHCI
-  UINT8 AhciDevCount;
-  UINTN AhciBaseAddresses[MVHW_MAX_AHCI_DEVS];
-  UINTN AhciMemSize[MVHW_MAX_AHCI_DEVS];
-  NON_DISCOVERABLE_DEVICE_DMA_TYPE AhciDmaType[MVHW_MAX_AHCI_DEVS];
-  // SDHCI
-  UINT8 SdhciDevCount;
-  UINTN SdhciBaseAddresses[MVHW_MAX_SDHCI_DEVS];
-  UINTN SdhciMemSize[MVHW_MAX_SDHCI_DEVS];
-  NON_DISCOVERABLE_DEVICE_DMA_TYPE SdhciDmaType[MVHW_MAX_SDHCI_DEVS];
-} MVHW_NONDISCOVERABLE_DESC;
-
-//
 // Platform description of CommonPhy devices
 //
 #define MVHW_CP0_COMPHY_BASE       0xF2441000
@@ -155,38 +129,4 @@ MVHW_MDIO_DESC mA7k8kMdioDescTemplate = {\
   { MVHW_CP0_MDIO_BASE, MVHW_CP1_MDIO_BASE }\
 }
 
-//
-// Platform description of NonDiscoverable devices
-//
-#define MVHW_CP0_XHCI0_BASE        0xF2500000
-#define MVHW_CP0_XHCI1_BASE        0xF2510000
-#define MVHW_CP1_XHCI0_BASE        0xF4500000
-#define MVHW_CP1_XHCI1_BASE        0xF4510000
-
-#define MVHW_CP0_AHCI0_BASE        0xF2540000
-#define MVHW_CP0_AHCI0_ID          0
-#define MVHW_CP1_AHCI0_BASE        0xF4540000
-#define MVHW_CP1_AHCI0_ID          1
-
-#define MVHW_AP0_SDHCI0_BASE       0xF06E0000
-#define MVHW_CP0_SDHCI0_BASE       0xF2780000
-
-#define DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE   \
-STATIC \
-MVHW_NONDISCOVERABLE_DESC mA7k8kNonDiscoverableDescTemplate = {\
-  4, /* XHCI */\
-  { MVHW_CP0_XHCI0_BASE, MVHW_CP0_XHCI1_BASE, MVHW_CP1_XHCI0_BASE, MVHW_CP1_XHCI1_BASE },\
-  { SIZE_16KB, SIZE_16KB, SIZE_16KB, SIZE_16KB },\
-  { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent,\
-    NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent },\
-  2, /* AHCI */\
-  { MVHW_CP0_AHCI0_BASE, MVHW_CP1_AHCI0_BASE },\
-  { SIZE_8KB, SIZE_8KB },\
-  { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent },\
-  2, /* SDHCI */\
-  { MVHW_AP0_SDHCI0_BASE, MVHW_CP0_SDHCI0_BASE },\
-  { SIZE_1KB, SIZE_1KB },\
-  { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent }\
-}
-
 #endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h
index c675d74..090116d 100644
--- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h
+++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h
@@ -35,6 +35,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #ifndef __COMPHY_H__
 #define __COMPHY_H__
 
+#include <Uefi.h>
 #include <Library/ArmLib.h>
 #include <Library/ArmPlatformLib.h>
 #include <Library/DebugLib.h>
@@ -43,6 +44,9 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include <Library/MvComPhyLib.h>
 #include <Library/IoLib.h>
 #include <Library/TimerLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#include <Protocol/BoardDesc.h>
 
 #define MAX_LANE_OPTIONS          10
 
diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c b/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c
index 09994ca..5e0ebf6 100755
--- a/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c
+++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c
@@ -33,7 +33,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *******************************************************************************/
 
 #include "ComPhyLib.h"
-#include <Library/MvHwDescLib.h>
 #include <Library/SampleAtResetLib.h>
 
 #define SD_LANE_ADDR_WIDTH          0x1000
@@ -46,8 +45,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #define CP110_PCIE_REF_CLK_TYPE0    0
 #define CP110_PCIE_REF_CLK_TYPE12   1
 
-DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE;
-
 /*
  * For CP-110 we have 2 Selector registers "PHY Selectors"
  * and " PIPE Selectors".
@@ -1138,36 +1135,23 @@ ComPhySataCheckPll (
 STATIC
 UINTN
 ComPhySataPowerUp (
+  IN UINTN ChipId,
   IN UINT32 Lane,
   IN EFI_PHYSICAL_ADDRESS HpipeBase,
   IN EFI_PHYSICAL_ADDRESS ComPhyBase,
-  IN UINT8 SataHostId
+  IN MV_BOARD_AHCI_DESC *Desc
   )
 {
   EFI_STATUS Status;
-  UINT8 *SataDeviceTable;
-  MVHW_NONDISCOVERABLE_DESC *Desc = &mA7k8kNonDiscoverableDescTemplate;
   EFI_PHYSICAL_ADDRESS HpipeAddr = HPIPE_ADDR(HpipeBase, Lane);
   EFI_PHYSICAL_ADDRESS SdIpAddr = SD_ADDR(HpipeBase, Lane);
   EFI_PHYSICAL_ADDRESS ComPhyAddr = COMPHY_ADDR(ComPhyBase, Lane);
 
-  SataDeviceTable = (UINT8 *) PcdGetPtr (PcdPciEAhci);
-
-  if (SataDeviceTable == NULL || SataHostId >= PcdGetSize (PcdPciEAhci)) {
-    DEBUG ((DEBUG_ERROR, "ComPhySata: Sata host %d is undefined\n", SataHostId));
-    return EFI_INVALID_PARAMETER;
-  }
-
-  if (!MVHW_DEV_ENABLED (Sata, SataHostId)) {
-    DEBUG ((DEBUG_ERROR, "ComPhySata: Sata host %d is disabled\n", SataHostId));
-    return EFI_INVALID_PARAMETER;
-  }
-
   DEBUG ((DEBUG_INFO, "ComPhySata: Initialize SATA PHYs\n"));
 
   DEBUG((DEBUG_INFO, "ComPhySataPowerUp: stage: MAC configuration - power down ComPhy\n"));
 
-  ComPhySataMacPowerDown (Desc->AhciBaseAddresses[SataHostId]);
+  ComPhySataMacPowerDown (Desc[ChipId].SoC->AhciBaseAddress);
 
   DEBUG((DEBUG_INFO, "ComPhy: stage: RFU configurations - hard reset ComPhy\n"));
 
@@ -1183,7 +1167,7 @@ ComPhySataPowerUp (
 
   DEBUG((DEBUG_INFO, "ComPhy: stage: ComPhy power up\n"));
 
-  ComPhySataPhyPowerUp (Desc->AhciBaseAddresses[SataHostId]);
+  ComPhySataPhyPowerUp (Desc[ChipId].SoC->AhciBaseAddress);
 
   DEBUG((DEBUG_INFO, "ComPhy: stage: Check PLL\n"));
 
@@ -1884,6 +1868,8 @@ ComPhyCp110Init (
   EFI_STATUS Status;
   COMPHY_MAP *PtrComPhyMap, *SerdesMap;
   EFI_PHYSICAL_ADDRESS ComPhyBaseAddr, HpipeBaseAddr;
+  MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+  MV_BOARD_AHCI_DESC *AhciBoardDesc;
   UINT32 ComPhyMaxCount, Lane;
   UINT32 PcieWidth = 0;
   UINT8 ChipId;
@@ -1927,11 +1913,29 @@ ComPhyCp110Init (
       break;
     case COMPHY_TYPE_SATA0:
     case COMPHY_TYPE_SATA1:
-      Status = ComPhySataPowerUp (Lane, HpipeBaseAddr, ComPhyBaseAddr, MVHW_CP0_AHCI0_ID);
-      break;
     case COMPHY_TYPE_SATA2:
     case COMPHY_TYPE_SATA3:
-      Status = ComPhySataPowerUp (Lane, HpipeBaseAddr, ComPhyBaseAddr, MVHW_CP1_AHCI0_ID);
+      /* Obtain AHCI board description */
+      Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+                      NULL,
+                      (VOID **)&BoardDescProtocol);
+      if (EFI_ERROR (Status)) {
+        break;
+      }
+
+      Status = BoardDescProtocol->BoardDescAhciGet (BoardDescProtocol,
+                                    &AhciBoardDesc);
+      if (EFI_ERROR (Status)) {
+        break;
+      }
+
+      Status = ComPhySataPowerUp (ChipId,
+                 Lane,
+                 HpipeBaseAddr,
+                 ComPhyBaseAddr,
+                 AhciBoardDesc);
+
+      BoardDescProtocol->BoardDescFree (AhciBoardDesc);
       break;
     case COMPHY_TYPE_USB3_HOST0:
     case COMPHY_TYPE_USB3_HOST1:
-- 
2.7.4

[platforms: PATCH v2 15/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information

[Marcin Wojtas]

This patch introduces new library callback (ArmadaSoCDescComPhyGet ()),
which dynamically allocates and fills MV_SOC_COMPHY_DESC structure with
the SoC description of ComPhy SerDes controllers.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h |  8 +++++
 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                             | 20 ++++++++++++
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 33 ++++++++++++++++++++
 3 files changed, 61 insertions(+)

diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
index 94fd6fa..f372ca0 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
@@ -30,6 +30,14 @@
 #define MV_SOC_AHCI_ID(Cp)               ((Cp) % 2)
 
 //
+// Platform description of ComPhy controllers
+//
+#define MV_SOC_COMPHY_BASE(Cp)           (MV_SOC_CP_BASE ((Cp)) + 0x441000)
+#define MV_SOC_HPIPE3_BASE(Cp)           (MV_SOC_CP_BASE ((Cp)) + 0x120000)
+#define MV_SOC_COMPHY_LANE_COUNT         6
+#define MV_SOC_COMPHY_MUX_BITS           4
+
+//
 // Platform description of PP2 NIC
 //
 #define MV_SOC_PP2_BASE(Cp)              MV_SOC_CP_BASE ((Cp))
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
index 3b29d78..a133d1c 100644
--- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -14,9 +14,29 @@
 #ifndef __ARMADA_SOC_DESC_LIB_H__
 #define __ARMADA_SOC_DESC_LIB_H__
 
+#include <Library/MvComPhyLib.h>
 #include <Library/NonDiscoverableDeviceRegistrationLib.h>
 
 //
+// ComPhy SoC description
+//
+typedef struct {
+  UINTN ComPhyId;
+  UINTN ComPhyBaseAddress;
+  UINTN ComPhyHpipe3BaseAddress;
+  UINTN ComPhyLaneCount;
+  UINTN ComPhyMuxBitCount;
+  MV_COMPHY_CHIP_TYPE ComPhyChipType;
+} MV_SOC_COMPHY_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescComPhyGet (
+  IN OUT MV_SOC_COMPHY_DESC  **ComPhyDesc,
+  IN OUT UINTN                *DescCount
+  );
+
+//
 // NonDiscoverable devices SoC description
 //
 // AHCI
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index 97fe3f8..580c0f4 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -30,6 +30,39 @@
 
 EFI_STATUS
 EFIAPI
+ArmadaSoCDescComPhyGet (
+  IN OUT MV_SOC_COMPHY_DESC  **ComPhyDesc,
+  IN OUT UINTN                *DescCount
+  )
+{
+  MV_SOC_COMPHY_DESC *Desc;
+  UINTN CpCount, CpIndex;
+
+  CpCount = FixedPcdGet8 (PcdMaxCpCount);
+
+  Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_COMPHY_DESC));
+  if (Desc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+    Desc[CpIndex].ComPhyBaseAddress = MV_SOC_COMPHY_BASE (CpIndex);
+    Desc[CpIndex].ComPhyHpipe3BaseAddress = MV_SOC_HPIPE3_BASE (CpIndex);
+    Desc[CpIndex].ComPhyLaneCount = MV_SOC_COMPHY_LANE_COUNT;
+    Desc[CpIndex].ComPhyMuxBitCount = MV_SOC_COMPHY_MUX_BITS;
+    Desc[CpIndex].ComPhyChipType = MvComPhyTypeCp110;
+    Desc[CpIndex].ComPhyId = CpIndex;
+  }
+
+  *ComPhyDesc = Desc;
+  *DescCount = CpCount;
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
 ArmadaSoCDescAhciGet (
   IN OUT MV_SOC_AHCI_DESC  **AhciDesc,
   IN OUT UINTN              *DescCount
-- 
2.7.4

[platforms: PATCH v2 16/25] Marvell/Drivers: MvBoardDesc: Extend protocol with ComPhy support

[Marcin Wojtas]

Introduce new callback that can provide information
about ComPhy controllers to the ComPhyLib.

Extend ArmadaBoardDescLib with new structure MV_BOARD_COMPHY_DESC,
for holding board specific data. In further steps it can
be extended and replace PCD SerDes lanes' representation with the
appropriate structures.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf |  1 +
 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h |  8 +++
 Silicon/Marvell/Include/Protocol/BoardDesc.h         |  8 +++
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c   | 64 ++++++++++++++++++++
 4 files changed, 81 insertions(+)

diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
index cc0d9d4..dea99fd 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -57,6 +57,7 @@
   gMarvellBoardDescProtocolGuid
 
 [Pcd]
+  gMarvellTokenSpaceGuid.PcdComPhyDevices
   gMarvellTokenSpaceGuid.PcdPciEAhci
   gMarvellTokenSpaceGuid.PcdPciESdhci
   gMarvellTokenSpaceGuid.PcdPciEXhci
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index 7e4fa4d..32bd915 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -17,6 +17,14 @@
 #include <Library/ArmadaSoCDescLib.h>
 
 //
+// COMPHY controllers per-board description
+//
+typedef struct {
+  MV_SOC_COMPHY_DESC *SoC;
+  UINTN               ComPhyDevCount;
+} MV_BOARD_COMPHY_DESC;
+
+//
 // NonDiscoverableDevices per-board description
 //
 
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index edf9491..b6dac75 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
 
 typedef
 EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_COMPHY_GET) (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_COMPHY_DESC    **ComPhyDesc
+  );
+
+typedef
+EFI_STATUS
 (EFIAPI *MV_BOARD_DESC_AHCI_GET) (
   IN MARVELL_BOARD_DESC_PROTOCOL  *This,
   IN OUT MV_BOARD_AHCI_DESC      **AhciDesc
@@ -84,6 +91,7 @@ VOID
 
 struct _MARVELL_BOARD_DESC_PROTOCOL {
   MV_BOARD_DESC_AHCI_GET         BoardDescAhciGet;
+  MV_BOARD_DESC_COMPHY_GET       BoardDescComPhyGet;
   MV_BOARD_DESC_PP2_GET          BoardDescPp2Get;
   MV_BOARD_DESC_SDMMC_GET        BoardDescSdMmcGet;
   MV_BOARD_DESC_UTMI_GET         BoardDescUtmiGet;
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 3439017..6bbe40b 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -37,6 +37,69 @@ MV_BOARD_DESC *mBoardDescInstance;
 
 STATIC
 EFI_STATUS
+MvBoardDescComPhyGet (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_COMPHY_DESC    **ComPhyDesc
+  )
+{
+  UINT8 *ComPhyDeviceEnabled;
+  UINTN ComPhyCount, ComPhyDeviceTableSize, ComPhyIndex, Index;
+  MV_BOARD_COMPHY_DESC *BoardDesc;
+  MV_SOC_COMPHY_DESC *SoCDesc;
+  EFI_STATUS Status;
+
+  /* Get SoC data about all available ComPhy controllers */
+  Status = ArmadaSoCDescComPhyGet (&SoCDesc, &ComPhyCount);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  /*
+   * Obtain table with enabled ComPhy controllers
+   * which is represented as an array of UINT8 values
+   * (0x0 - disabled, 0x1 enabled).
+   */
+  ComPhyDeviceEnabled = PcdGetPtr (PcdComPhyDevices);
+  if (ComPhyDeviceEnabled == NULL) {
+    /* No ComPhy controllers declared */
+    return EFI_NOT_FOUND;
+  }
+
+  ComPhyDeviceTableSize = PcdGetSize (PcdComPhyDevices);
+
+  /* Check if PCD with ComPhy is correctly defined */
+  if (ComPhyDeviceTableSize > ComPhyCount) {
+    DEBUG ((DEBUG_ERROR, "%a: Wrong PcdComPhyDevices format\n", __FUNCTION__));
+    return EFI_INVALID_PARAMETER;
+  }
+
+  /* Allocate and fill board description */
+  BoardDesc = AllocateZeroPool (ComPhyDeviceTableSize * sizeof (MV_BOARD_COMPHY_DESC));
+  if (BoardDesc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  ComPhyIndex = 0;
+  for (Index = 0; Index < ComPhyDeviceTableSize; Index++) {
+    if (!ComPhyDeviceEnabled[Index]) {
+      DEBUG ((DEBUG_ERROR, "%a: Skip ComPhy controller %d\n", __FUNCTION__, Index));
+      continue;
+    }
+
+    BoardDesc[ComPhyIndex].SoC = &SoCDesc[Index];
+    ComPhyIndex++;
+  }
+
+  BoardDesc->ComPhyDevCount = ComPhyIndex;
+
+  *ComPhyDesc = BoardDesc;
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
 MvBoardDescAhciGet (
   IN MARVELL_BOARD_DESC_PROTOCOL  *This,
   IN OUT MV_BOARD_AHCI_DESC      **AhciDesc
@@ -392,6 +455,7 @@ MvBoardDescInitProtocol (
   )
 {
   BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
+  BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet;
   BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
   BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
   BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
-- 
2.7.4

[platforms: PATCH v2 17/25] Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC

[Marcin Wojtas]

MvComPhyLib library used to get Armada7k8k SerDes multiplexing
controller description from hardcoded values stored in the header
file MvHwDescLib.h. As a result it is very hard to support other
Armada SoC families with this library.

This patch updates the library, so that it can obtain the
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Include/Library/MvHwDescLib.h | 39 -----------
 Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c | 74 ++++++++++++--------
 2 files changed, 45 insertions(+), 68 deletions(-)

diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 9f383f4..423ca17 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -35,8 +35,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #ifndef __MVHWDESCLIB_H__
 #define __MVHWDESCLIB_H__
 
-#include <Library/MvComPhyLib.h>
-
 //
 // Helper macros
 //
@@ -45,20 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #define MVHW_DEV_ENABLED(type, index) (type ## DeviceTable[index])
 
 //
-// CommonPhy devices description template definition
-//
-#define MVHW_MAX_COMPHY_DEVS       4
-
-typedef struct {
-  UINT8 ComPhyDevCount;
-  UINTN ComPhyBaseAddresses[MVHW_MAX_COMPHY_DEVS];
-  UINTN ComPhyHpipe3BaseAddresses[MVHW_MAX_COMPHY_DEVS];
-  UINTN ComPhyLaneCount[MVHW_MAX_COMPHY_DEVS];
-  UINTN ComPhyMuxBitCount[MVHW_MAX_COMPHY_DEVS];
-  MV_COMPHY_CHIP_TYPE ComPhyChipType[MVHW_MAX_COMPHY_DEVS];
-} MVHW_COMPHY_DESC;
-
-//
 // I2C devices description template definition
 //
 #define MVHW_MAX_I2C_DEVS         4
@@ -79,29 +63,6 @@ typedef struct {
 } MVHW_MDIO_DESC;
 
 //
-// Platform description of CommonPhy devices
-//
-#define MVHW_CP0_COMPHY_BASE       0xF2441000
-#define MVHW_CP0_HPIPE3_BASE       0xF2120000
-#define MVHW_CP0_COMPHY_LANES      6
-#define MVHW_CP0_COMPHY_MUX_BITS   4
-#define MVHW_CP1_COMPHY_BASE       0xF4441000
-#define MVHW_CP1_HPIPE3_BASE       0xF4120000
-#define MVHW_CP1_COMPHY_LANES      6
-#define MVHW_CP1_COMPHY_MUX_BITS   4
-
-#define DECLARE_A7K8K_COMPHY_TEMPLATE \
-STATIC \
-MVHW_COMPHY_DESC mA7k8kComPhyDescTemplate = {\
-  2,\
-  { MVHW_CP0_COMPHY_BASE, MVHW_CP1_COMPHY_BASE },\
-  { MVHW_CP0_HPIPE3_BASE, MVHW_CP1_HPIPE3_BASE },\
-  { MVHW_CP0_COMPHY_LANES, MVHW_CP1_COMPHY_LANES },\
-  { MVHW_CP0_COMPHY_MUX_BITS, MVHW_CP1_COMPHY_MUX_BITS },\
-  { MvComPhyTypeCp110, MvComPhyTypeCp110 }\
-}
-
-//
 // Platform description of I2C devices
 //
 #define MVHW_CP0_I2C0_BASE       0xF2701000
diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
index b03bc35..2ef9af4 100644
--- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
+++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
@@ -34,9 +34,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 #include "ComPhyLib.h"
 #include <Library/MvComPhyLib.h>
-#include <Library/MvHwDescLib.h>
-
-DECLARE_A7K8K_COMPHY_TEMPLATE;
 
 CHAR16 * TypeStringTable [] = {L"unconnected", L"PCIE0", L"PCIE1", L"PCIE2",
                            L"PCIE3", L"SATA0", L"SATA1", L"SATA2", L"SATA3",
@@ -182,22 +179,20 @@ VOID
 InitComPhyConfig (
   IN  OUT  CHIP_COMPHY_CONFIG *ChipConfig,
   IN  OUT  PCD_LANE_MAP       *LaneData,
-  IN       UINT8               Id
+  IN       MV_BOARD_COMPHY_DESC *Desc
   )
 {
-  MVHW_COMPHY_DESC *Desc = &mA7k8kComPhyDescTemplate;
-
-  ChipConfig->ChipType = Desc->ComPhyChipType[Id];
-  ChipConfig->ComPhyBaseAddr = Desc->ComPhyBaseAddresses[Id];
-  ChipConfig->Hpipe3BaseAddr = Desc->ComPhyHpipe3BaseAddresses[Id];
-  ChipConfig->LanesCount = Desc->ComPhyLaneCount[Id];
-  ChipConfig->MuxBitCount = Desc->ComPhyMuxBitCount[Id];
-  ChipConfig->ChipId = Id;
+  ChipConfig->ChipType = Desc->SoC->ComPhyChipType;
+  ChipConfig->ComPhyBaseAddr = Desc->SoC->ComPhyBaseAddress;
+  ChipConfig->Hpipe3BaseAddr = Desc->SoC->ComPhyHpipe3BaseAddress;
+  ChipConfig->LanesCount = Desc->SoC->ComPhyLaneCount;
+  ChipConfig->MuxBitCount = Desc->SoC->ComPhyMuxBitCount;
+  ChipConfig->ChipId = Desc->SoC->ComPhyId;
 
   /*
    * Below macro contains variable name concatenation (used to form PCD's name).
    */
-  switch (Id) {
+  switch (ChipConfig->ChipId) {
   case 0:
     GetComPhyPcd (LaneData, 0);
     break;
@@ -219,32 +214,49 @@ MvComPhyInit (
   )
 {
   EFI_STATUS Status;
-  CHIP_COMPHY_CONFIG ChipConfig[MVHW_MAX_COMPHY_DEVS], *PtrChipCfg;
-  PCD_LANE_MAP LaneData[MVHW_MAX_COMPHY_DEVS];
+  CHIP_COMPHY_CONFIG *ChipConfig, *PtrChipCfg;
+  MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+  MV_BOARD_COMPHY_DESC *ComPhyBoardDesc;
+  PCD_LANE_MAP *LaneData;
   UINT32 Lane, MaxComphyCount;
-  UINT8 *ComPhyDeviceTable, Index;
+  UINTN Index;
 
   /* Obtain table with enabled ComPhy devices */
-  ComPhyDeviceTable = (UINT8 *)PcdGetPtr (PcdComPhyDevices);
-  if (ComPhyDeviceTable == NULL) {
-    DEBUG ((DEBUG_ERROR, "Missing PcdComPhyDevices\n"));
-    return EFI_INVALID_PARAMETER;
+  Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+                  NULL,
+                  (VOID **)&BoardDescProtocol);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  Status = BoardDescProtocol->BoardDescComPhyGet (BoardDescProtocol,
+                                &ComPhyBoardDesc);
+  if (EFI_ERROR (Status)) {
+    return Status;
   }
 
-  if (PcdGetSize (PcdComPhyDevices) > MVHW_MAX_COMPHY_DEVS) {
-    DEBUG ((DEBUG_ERROR, "Wrong PcdComPhyDevices format\n"));
-    return EFI_INVALID_PARAMETER;
+  ChipConfig = AllocateZeroPool (ComPhyBoardDesc->ComPhyDevCount *
+                                 sizeof (CHIP_COMPHY_CONFIG));
+  if (ChipConfig == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    BoardDescProtocol->BoardDescFree (ComPhyBoardDesc);
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  LaneData = AllocateZeroPool (ComPhyBoardDesc->ComPhyDevCount *
+                               sizeof (PCD_LANE_MAP));
+  if (ChipConfig == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    BoardDescProtocol->BoardDescFree (ComPhyBoardDesc);
+    FreePool (ChipConfig);
+    return EFI_OUT_OF_RESOURCES;
   }
 
   /* Initialize enabled chips */
-  for (Index = 0; Index < PcdGetSize (PcdComPhyDevices); Index++) {
-    if (!MVHW_DEV_ENABLED (ComPhy, Index)) {
-      DEBUG ((DEBUG_ERROR, "Skip ComPhy chip %d\n", Index));
-      continue;
-    }
+  for (Index = 0; Index < ComPhyBoardDesc->ComPhyDevCount; Index++) {
 
     PtrChipCfg = &ChipConfig[Index];
-    InitComPhyConfig(PtrChipCfg, LaneData, Index);
+    InitComPhyConfig (PtrChipCfg, LaneData, &ComPhyBoardDesc[Index]);
 
     /* Get the count of the SerDes of the specific chip */
     MaxComphyCount = PtrChipCfg->LanesCount;
@@ -275,5 +287,9 @@ MvComPhyInit (
     PtrChipCfg->Init (PtrChipCfg);
   }
 
+  BoardDescProtocol->BoardDescFree (ComPhyBoardDesc);
+  FreePool (ChipConfig);
+  FreePool (LaneData);
+
   return EFI_SUCCESS;
 }
-- 
2.7.4

[platforms: PATCH v2 18/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information

[Marcin Wojtas]

This patch introduces new library callback (ArmadaSoCDescMdioGet ()),
which dynamically allocates and fills MV_SOC_MDIO_DESC structure with
the SoC description of Mdio controllers.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h |  6 ++++
 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                             | 15 ++++++++++
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 29 ++++++++++++++++++++
 3 files changed, 50 insertions(+)

diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
index f372ca0..c864f94 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
@@ -38,6 +38,12 @@
 #define MV_SOC_COMPHY_MUX_BITS           4
 
 //
+// Platform description of MDIO controllers
+//
+#define MV_SOC_MDIO_BASE(Cp)             (MV_SOC_CP_BASE ((Cp)) + 0x12A200)
+#define MV_SOC_MDIO_ID(Cp)               (Cp)
+
+//
 // Platform description of PP2 NIC
 //
 #define MV_SOC_PP2_BASE(Cp)              MV_SOC_CP_BASE ((Cp))
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
index a133d1c..304d068 100644
--- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -37,6 +37,21 @@ ArmadaSoCDescComPhyGet (
   );
 
 //
+// MDIO
+//
+typedef struct {
+  UINTN MdioId;
+  UINTN MdioBaseAddress;
+} MV_SOC_MDIO_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescMdioGet (
+  IN OUT MV_SOC_MDIO_DESC  **MdioDesc,
+  IN OUT UINTN              *DescCount
+  );
+
+//
 // NonDiscoverable devices SoC description
 //
 // AHCI
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index 580c0f4..652677f 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -63,6 +63,35 @@ ArmadaSoCDescComPhyGet (
 
 EFI_STATUS
 EFIAPI
+ArmadaSoCDescMdioGet (
+  IN OUT MV_SOC_MDIO_DESC  **MdioDesc,
+  IN OUT UINTN              *DescCount
+  )
+{
+  MV_SOC_MDIO_DESC *Desc;
+  UINTN CpCount, CpIndex;
+
+  CpCount = FixedPcdGet8 (PcdMaxCpCount);
+
+  Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_MDIO_DESC));
+  if (Desc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+    Desc[CpIndex].MdioId = MV_SOC_MDIO_ID (CpIndex);
+    Desc[CpIndex].MdioBaseAddress = MV_SOC_MDIO_BASE (CpIndex);
+  }
+
+  *MdioDesc = Desc;
+  *DescCount = CpCount;
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
 ArmadaSoCDescAhciGet (
   IN OUT MV_SOC_AHCI_DESC  **AhciDesc,
   IN OUT UINTN              *DescCount
-- 
2.7.4

[platforms: PATCH v2 19/25] Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support

[Marcin Wojtas]

Introduce new callback that can provide information
about MDIO controllers to the Mdio driver.

Extend ArmadaBoardDescLib with new structure MV_BOARD_MDIO_DESC,
for holding board specific data.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h |  8 +++++
 Silicon/Marvell/Include/Protocol/BoardDesc.h         |  8 +++++
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c   | 36 ++++++++++++++++++++
 3 files changed, 52 insertions(+)

diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index 32bd915..b11fa9d 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -25,6 +25,14 @@ typedef struct {
 } MV_BOARD_COMPHY_DESC;
 
 //
+// MDIO devices per-board description
+//
+typedef struct {
+  MV_SOC_MDIO_DESC *SoC;
+  UINTN             MdioDevCount;
+} MV_BOARD_MDIO_DESC;
+
+//
 // NonDiscoverableDevices per-board description
 //
 
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index b6dac75..55297f5 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -50,6 +50,13 @@ EFI_STATUS
 
 typedef
 EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_MDIO_GET) (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_MDIO_DESC      **MdioDesc
+  );
+
+typedef
+EFI_STATUS
 (EFIAPI *MV_BOARD_DESC_AHCI_GET) (
   IN MARVELL_BOARD_DESC_PROTOCOL  *This,
   IN OUT MV_BOARD_AHCI_DESC      **AhciDesc
@@ -92,6 +99,7 @@ VOID
 struct _MARVELL_BOARD_DESC_PROTOCOL {
   MV_BOARD_DESC_AHCI_GET         BoardDescAhciGet;
   MV_BOARD_DESC_COMPHY_GET       BoardDescComPhyGet;
+  MV_BOARD_DESC_MDIO_GET         BoardDescMdioGet;
   MV_BOARD_DESC_PP2_GET          BoardDescPp2Get;
   MV_BOARD_DESC_SDMMC_GET        BoardDescSdMmcGet;
   MV_BOARD_DESC_UTMI_GET         BoardDescUtmiGet;
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 6bbe40b..5dfc559 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -100,6 +100,41 @@ MvBoardDescComPhyGet (
 
 STATIC
 EFI_STATUS
+MvBoardDescMdioGet (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_MDIO_DESC      **MdioDesc
+  )
+{
+  MV_BOARD_MDIO_DESC *BoardDesc;
+  MV_SOC_MDIO_DESC *SoCDesc;
+  UINTN MdioCount, Index;
+  EFI_STATUS Status;
+
+  /* Get SoC data about all available MDIO controllers */
+  Status = ArmadaSoCDescMdioGet (&SoCDesc, &MdioCount);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  /* Allocate and fill board description */
+  BoardDesc = AllocateZeroPool (MdioCount * sizeof (MV_BOARD_MDIO_DESC));
+  if (BoardDesc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  for (Index = 0; Index < MdioCount; Index++) {
+    BoardDesc[Index].SoC = &SoCDesc[Index];
+  }
+
+  BoardDesc->MdioDevCount = MdioCount;
+  *MdioDesc = BoardDesc;
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
 MvBoardDescAhciGet (
   IN MARVELL_BOARD_DESC_PROTOCOL  *This,
   IN OUT MV_BOARD_AHCI_DESC      **AhciDesc
@@ -456,6 +491,7 @@ MvBoardDescInitProtocol (
 {
   BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
   BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet;
+  BoardDescProtocol->BoardDescMdioGet = MvBoardDescMdioGet;
   BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
   BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
   BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
-- 
2.7.4

[platforms: PATCH v2 20/25] Marvell/Drivers: MvMdioDxe: Enable 64bit addressing

[Marcin Wojtas]

In order to be prepared for operating on registers
in 64-bit address space, this patch adjusts the
MDIO controllers base address array.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
index 12aabad..6c0a129 100644
--- a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
+++ b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
@@ -70,7 +70,7 @@ MdioCheckParam (
 STATIC
 EFI_STATUS
 MdioWaitReady (
-  UINT32 MdioBase
+  UINTN MdioBase
   )
 {
   UINT32 Timeout = MVEBU_SMI_TIMEOUT;
@@ -92,7 +92,7 @@ MdioWaitReady (
 STATIC
 EFI_STATUS
 MdioWaitValid (
-  UINT32 MdioBase
+  UINTN MdioBase
   )
 {
   UINT32 Timeout = MVEBU_SMI_TIMEOUT;
@@ -122,7 +122,7 @@ MdioOperation (
   IN OUT UINT32 *Data
   )
 {
-  UINT32 MdioBase = This->BaseAddresses[MdioIndex];
+  UINTN MdioBase = This->BaseAddresses[MdioIndex];
   UINT32 MdioReg;
   EFI_STATUS Status;
 
-- 
2.7.4

[platforms: PATCH v2 21/25] Marvell/Drivers: MvMdioDxe: Switch driver to use MARVELL_BOARD_DESC

[Marcin Wojtas]

MvMdioDxe driver used to get Armada7k8k controller description
from hardcoded values stored in the header file MvHwDescLib.h.
As a result it is very hard to support other
Armada SoC families with this driver.

This patch updates the driver, so that it can obtain the
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf |  1 +
 Silicon/Marvell/Include/Library/MvHwDescLib.h       | 23 -------------
 Silicon/Marvell/Include/Protocol/Mdio.h             |  4 +--
 Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c   | 35 ++++++++++++++++----
 4 files changed, 31 insertions(+), 32 deletions(-)

diff --git a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf
index c070785..739576f 100644
--- a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf
+++ b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf
@@ -60,6 +60,7 @@
   UefiLib
 
 [Protocols]
+  gMarvellBoardDescProtocolGuid
   gMarvellMdioProtocolGuid
 
 [Depex]
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 423ca17..0de435d 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -53,16 +53,6 @@ typedef struct {
 } MVHW_I2C_DESC;
 
 //
-// MDIO devices description template definition
-//
-#define MVHW_MAX_MDIO_DEVS         2
-
-typedef struct {
-  UINT8 MdioDevCount;
-  UINTN MdioBaseAddresses[MVHW_MAX_MDIO_DEVS];
-} MVHW_MDIO_DESC;
-
-//
 // Platform description of I2C devices
 //
 #define MVHW_CP0_I2C0_BASE       0xF2701000
@@ -77,17 +67,4 @@ MVHW_I2C_DESC mA7k8kI2cDescTemplate = {\
   { MVHW_CP0_I2C0_BASE, MVHW_CP0_I2C1_BASE, MVHW_CP1_I2C0_BASE, MVHW_CP1_I2C1_BASE }\
 }
 
-//
-// Platform description of MDIO devices
-//
-#define MVHW_CP0_MDIO_BASE       0xF212A200
-#define MVHW_CP1_MDIO_BASE       0xF412A200
-
-#define DECLARE_A7K8K_MDIO_TEMPLATE \
-STATIC \
-MVHW_MDIO_DESC mA7k8kMdioDescTemplate = {\
-  2,\
-  { MVHW_CP0_MDIO_BASE, MVHW_CP1_MDIO_BASE }\
-}
-
 #endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Include/Protocol/Mdio.h b/Silicon/Marvell/Include/Protocol/Mdio.h
index d077a8f..076ea26 100644
--- a/Silicon/Marvell/Include/Protocol/Mdio.h
+++ b/Silicon/Marvell/Include/Protocol/Mdio.h
@@ -35,8 +35,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #ifndef __MDIO_H__
 #define __MDIO_H__
 
-#include <Library/MvHwDescLib.h>
-
 #define MARVELL_MDIO_PROTOCOL_GUID { 0x40010b03, 0x5f08, 0x496a, { 0xa2, 0x64, 0x10, 0x5e, 0x72, 0xd3, 0x71, 0xaa }}
 
 typedef struct _MARVELL_MDIO_PROTOCOL MARVELL_MDIO_PROTOCOL;
@@ -64,7 +62,7 @@ EFI_STATUS
 struct _MARVELL_MDIO_PROTOCOL {
   MARVELL_MDIO_READ Read;
   MARVELL_MDIO_WRITE Write;
-  UINTN BaseAddresses[MVHW_MAX_MDIO_DEVS];
+  UINTN *BaseAddresses;
   UINTN ControllerCount;
 };
 
diff --git a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
index 6c0a129..72e88bd 100644
--- a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
+++ b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
@@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 *******************************************************************************/
 
+#include <Protocol/BoardDesc.h>
 #include <Protocol/DriverBinding.h>
 #include <Protocol/Mdio.h>
 
@@ -46,8 +47,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 #include "MvMdioDxe.h"
 
-DECLARE_A7K8K_MDIO_TEMPLATE;
-
 STATIC
 EFI_STATUS
 MdioCheckParam (
@@ -216,24 +215,46 @@ MvMdioDxeInitialise (
   IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  MVHW_MDIO_DESC *Desc = &mA7k8kMdioDescTemplate;
+  MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+  MV_BOARD_MDIO_DESC *MdioBoardDesc;
   UINT8 Index;
   MARVELL_MDIO_PROTOCOL *Mdio;
   EFI_STATUS Status;
   EFI_HANDLE Handle = NULL;
 
+  /* Obtain list of available controllers */
+  Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+                  NULL,
+                  (VOID **)&BoardDescProtocol);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  Status = BoardDescProtocol->BoardDescMdioGet (BoardDescProtocol,
+                                &MdioBoardDesc);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
   Mdio = AllocateZeroPool (sizeof (MARVELL_MDIO_PROTOCOL));
   if (Mdio == NULL) {
     DEBUG ((DEBUG_ERROR, "MdioDxe: Protocol allocation failed\n"));
     return EFI_OUT_OF_RESOURCES;
   }
 
+  Mdio->BaseAddresses = AllocateZeroPool (MdioBoardDesc->MdioDevCount *
+                                          sizeof (UINTN));
+  if (Mdio->BaseAddresses == NULL) {
+    DEBUG ((DEBUG_ERROR, "MdioDxe: Protocol allocation failed\n"));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
   /* Obtain base addresses of all possible controllers */
-  for (Index = 0; Index < Desc->MdioDevCount; Index++) {
-    Mdio->BaseAddresses[Index] = Desc->MdioBaseAddresses[Index];
+  for (Index = 0; Index < MdioBoardDesc->MdioDevCount; Index++) {
+    Mdio->BaseAddresses[Index] = MdioBoardDesc[Index].SoC->MdioBaseAddress;
   }
 
-  Mdio->ControllerCount = Desc->MdioDevCount;
+  Mdio->ControllerCount = MdioBoardDesc->MdioDevCount;
   Mdio->Read = MvMdioRead;
   Mdio->Write = MvMdioWrite;
 
@@ -248,5 +269,7 @@ MvMdioDxeInitialise (
     return Status;
   }
 
+  BoardDescProtocol->BoardDescFree (MdioBoardDesc);
+
   return EFI_SUCCESS;
 }
-- 
2.7.4

[platforms: PATCH v2 22/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information

[Marcin Wojtas]

This patch introduces new library callback (ArmadaSoCDescI2cGet ()),
which dynamically allocates and fills MV_SOC_I2C_DESC structure with
the SoC description of I2c controllers.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h |  6 ++++
 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                             | 15 ++++++++++
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 31 ++++++++++++++++++++
 3 files changed, 52 insertions(+)

diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
index c864f94..b1219c4 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
@@ -38,6 +38,12 @@
 #define MV_SOC_COMPHY_MUX_BITS           4
 
 //
+// Platform description of I2C controllers
+//
+#define MV_SOC_I2C_PER_CP_COUNT          2
+#define MV_SOC_I2C_BASE(I2c)             (0x701000 + ((I2c) * 0x100))
+
+//
 // Platform description of MDIO controllers
 //
 #define MV_SOC_MDIO_BASE(Cp)             (MV_SOC_CP_BASE ((Cp)) + 0x12A200)
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
index 304d068..d2bcf2a 100644
--- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -37,6 +37,21 @@ ArmadaSoCDescComPhyGet (
   );
 
 //
+// I2C
+//
+typedef struct {
+  UINTN I2cId;
+  UINTN I2cBaseAddress;
+} MV_SOC_I2C_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescI2cGet (
+  IN OUT MV_SOC_I2C_DESC  **I2cDesc,
+  IN OUT UINTN             *DescCount
+  );
+
+//
 // MDIO
 //
 typedef struct {
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index 652677f..6ce6bad 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -63,6 +63,37 @@ ArmadaSoCDescComPhyGet (
 
 EFI_STATUS
 EFIAPI
+ArmadaSoCDescI2cGet (
+  IN OUT MV_SOC_I2C_DESC  **I2cDesc,
+  IN OUT UINTN             *DescCount
+  )
+{
+  MV_SOC_I2C_DESC *Desc;
+  UINTN CpCount, CpIndex, Index;
+
+  CpCount = FixedPcdGet8 (PcdMaxCpCount);
+
+  *DescCount = CpCount * MV_SOC_I2C_PER_CP_COUNT;
+  Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_I2C_DESC));
+  if (Desc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  *I2cDesc = Desc;
+
+  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+    for (Index = 0; Index < MV_SOC_I2C_PER_CP_COUNT; Index++) {
+      Desc->I2cBaseAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_I2C_BASE (Index);
+      Desc++;
+    }
+  }
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
 ArmadaSoCDescMdioGet (
   IN OUT MV_SOC_MDIO_DESC  **MdioDesc,
   IN OUT UINTN              *DescCount
-- 
2.7.4

[platforms: PATCH v2 23/25] Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support

[Marcin Wojtas]

Introduce new callback that can provide information
about I2C controllers to the I2c driver.

Extend ArmadaBoardDescLib with new structure MV_BOARD_I2C_DESC,
for holding board specific data. In further steps it should
be extended and replace PCD I2C devices' representation with the
appropriate structures.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf |  1 +
 Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h |  8 +++
 Silicon/Marvell/Include/Protocol/BoardDesc.h         |  8 +++
 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c   | 66 ++++++++++++++++++++
 4 files changed, 83 insertions(+)

diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
index dea99fd..41f72d6 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -58,6 +58,7 @@
 
 [Pcd]
   gMarvellTokenSpaceGuid.PcdComPhyDevices
+  gMarvellTokenSpaceGuid.PcdI2cControllersEnabled
   gMarvellTokenSpaceGuid.PcdPciEAhci
   gMarvellTokenSpaceGuid.PcdPciESdhci
   gMarvellTokenSpaceGuid.PcdPciEXhci
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index b11fa9d..ee8e06e 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -25,6 +25,14 @@ typedef struct {
 } MV_BOARD_COMPHY_DESC;
 
 //
+// I2C devices per-board description
+//
+typedef struct {
+  MV_SOC_I2C_DESC *SoC;
+  UINTN            I2cDevCount;
+} MV_BOARD_I2C_DESC;
+
+//
 // MDIO devices per-board description
 //
 typedef struct {
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index 55297f5..1d57a16 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -50,6 +50,13 @@ EFI_STATUS
 
 typedef
 EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_I2C_GET) (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_I2C_DESC       **I2cDesc
+  );
+
+typedef
+EFI_STATUS
 (EFIAPI *MV_BOARD_DESC_MDIO_GET) (
   IN MARVELL_BOARD_DESC_PROTOCOL  *This,
   IN OUT MV_BOARD_MDIO_DESC      **MdioDesc
@@ -99,6 +106,7 @@ VOID
 struct _MARVELL_BOARD_DESC_PROTOCOL {
   MV_BOARD_DESC_AHCI_GET         BoardDescAhciGet;
   MV_BOARD_DESC_COMPHY_GET       BoardDescComPhyGet;
+  MV_BOARD_DESC_I2C_GET          BoardDescI2cGet;
   MV_BOARD_DESC_MDIO_GET         BoardDescMdioGet;
   MV_BOARD_DESC_PP2_GET          BoardDescPp2Get;
   MV_BOARD_DESC_SDMMC_GET        BoardDescSdMmcGet;
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 5dfc559..39dc06c 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -100,6 +100,71 @@ MvBoardDescComPhyGet (
 
 STATIC
 EFI_STATUS
+MvBoardDescI2cGet (
+  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
+  IN OUT MV_BOARD_I2C_DESC       **I2cDesc
+  )
+{
+  UINT8 *I2cDeviceEnabled;
+  UINTN I2cCount, I2cDeviceEnabledSize, I2cIndex, Index;
+  MV_BOARD_I2C_DESC *BoardDesc;
+  MV_SOC_I2C_DESC *SoCDesc;
+  EFI_STATUS Status;
+
+  /* Get SoC data about all available I2C controllers */
+  Status = ArmadaSoCDescI2cGet (&SoCDesc, &I2cCount);
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
+
+  /*
+   * Obtain table with enabled I2C controllers
+   * which is represented as an array of UINT8 values
+   * (0x0 - disabled, 0x1 enabled).
+   */
+  I2cDeviceEnabled = PcdGetPtr (PcdI2cControllersEnabled);
+  if (I2cDeviceEnabled == NULL) {
+    /* No I2C on platform */
+    return EFI_SUCCESS;
+  }
+
+  I2cDeviceEnabledSize = PcdGetSize (PcdI2cControllersEnabled);
+
+  /* Check if PCD with I2C controllers is correctly defined */
+  if (I2cDeviceEnabledSize > I2cCount) {
+    DEBUG ((DEBUG_ERROR,
+      "%a: Wrong PcdI2cControllersEnabled format\n",
+      __FUNCTION__));
+    return EFI_INVALID_PARAMETER;
+  }
+
+  /* Allocate and fill board description */
+  BoardDesc = AllocateZeroPool (I2cDeviceEnabledSize * sizeof (MV_BOARD_I2C_DESC));
+  if (BoardDesc == NULL) {
+    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  I2cIndex = 0;
+  for (Index = 0; Index < I2cDeviceEnabledSize; Index++) {
+    if (!I2cDeviceEnabled[Index]) {
+      DEBUG ((DEBUG_INFO, "%a: Skip I2c controller %d\n", __FUNCTION__, Index));
+      continue;
+    }
+
+    BoardDesc[I2cIndex].SoC = &SoCDesc[Index];
+    I2cIndex++;
+  }
+
+  BoardDesc->I2cDevCount = I2cIndex;
+
+  *I2cDesc = BoardDesc;
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
 MvBoardDescMdioGet (
   IN MARVELL_BOARD_DESC_PROTOCOL  *This,
   IN OUT MV_BOARD_MDIO_DESC      **MdioDesc
@@ -491,6 +556,7 @@ MvBoardDescInitProtocol (
 {
   BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
   BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet;
+  BoardDescProtocol->BoardDescI2cGet = MvBoardDescI2cGet;
   BoardDescProtocol->BoardDescMdioGet = MvBoardDescMdioGet;
   BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
   BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
-- 
2.7.4

[platforms: PATCH v2 24/25] Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC

[Marcin Wojtas]

MvI2cDxe driver used to get Armada7k8k controller description
from hardcoded values stored in the header file MvHwDescLib.h.
As a result it is very hard to support other
Armada SoC families with this driver.

This patch updates the driver, so that it can obtain the
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf |  1 +
 Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c   | 37 +++++++++-----------
 2 files changed, 18 insertions(+), 20 deletions(-)

diff --git a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
index a7cf52e..0eef350 100755
--- a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
+++ b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
@@ -61,6 +61,7 @@
   gEfiDevicePathProtocolGuid
   gEfiI2cEnumerateProtocolGuid
   gEfiI2cBusConfigurationManagementProtocolGuid
+  gMarvellBoardDescProtocolGuid
 
 [Pcd]
   gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses
diff --git a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
index d6f590d..9ec4929 100755
--- a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
+++ b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
@@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 *******************************************************************************/
 
+#include <Protocol/BoardDesc.h>
 #include <Protocol/I2cMaster.h>
 #include <Protocol/I2cEnumerate.h>
 #include <Protocol/I2cBusConfigurationManagement.h>
@@ -43,13 +44,10 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include <Library/PcdLib.h>
 #include <Library/UefiLib.h>
 #include <Library/MemoryAllocationLib.h>
-#include <Library/MvHwDescLib.h>
 #include <Library/UefiBootServicesTableLib.h>
 
 #include "MvI2cDxe.h"
 
-DECLARE_A7K8K_I2C_TEMPLATE;
-
 STATIC MV_I2C_BAUD_RATE baud_rate;
 
 STATIC MV_I2C_DEVICE_PATH MvI2cDevicePathProtocol = {
@@ -174,38 +172,37 @@ MvI2cInitialise (
   IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  MVHW_I2C_DESC *Desc = &mA7k8kI2cDescTemplate;
-  UINT8 *I2cDeviceTable, Index;
+  MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+  MV_BOARD_I2C_DESC *Desc;
   EFI_STATUS Status;
+  UINTN Index;
 
-  /* Obtain table with enabled I2c devices */
-  I2cDeviceTable = (UINT8 *)PcdGetPtr (PcdI2cControllersEnabled);
-  if (I2cDeviceTable == NULL) {
-    DEBUG ((DEBUG_ERROR, "Missing PcdI2cControllersEnabled\n"));
-    return EFI_INVALID_PARAMETER;
+  /* Obtain list of available controllers */
+  Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
+                  NULL,
+                  (VOID **)&BoardDescProtocol);
+  if (EFI_ERROR (Status)) {
+    return Status;
   }
 
-  if (PcdGetSize (PcdI2cControllersEnabled) > MVHW_MAX_I2C_DEVS) {
-    DEBUG ((DEBUG_ERROR, "Wrong PcdI2cControllersEnabled format\n"));
-    return EFI_INVALID_PARAMETER;
+  Status = BoardDescProtocol->BoardDescI2cGet (BoardDescProtocol, &Desc);
+  if (EFI_ERROR (Status)) {
+    return Status;
   }
 
   /* Initialize enabled chips */
-  for (Index = 0; Index < PcdGetSize (PcdI2cControllersEnabled); Index++) {
-    if (!MVHW_DEV_ENABLED (I2c, Index)) {
-      DEBUG ((DEBUG_ERROR, "Skip I2c chip %d\n", Index));
-      continue;
-    }
-
+  for (Index = 0; Index < Desc->I2cDevCount; Index++) {
     Status = MvI2cInitialiseController(
         ImageHandle,
         SystemTable,
-        Desc->I2cBaseAddresses[Index]
+        Desc[Index].SoC->I2cBaseAddress
         );
     if (EFI_ERROR(Status))
       return Status;
   }
 
+  BoardDescProtocol->BoardDescFree (Desc);
+
   return EFI_SUCCESS;
 }
 
-- 
2.7.4

[platforms: PATCH v2 25/25] Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency

[Marcin Wojtas]

Finally, after switching to new MV_BOARD_DESC solution
in all drivers, stop using MvHwDescLib.h by its last user
and safely remove this header.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Include/Library/MvHwDescLib.h   | 70 --------------------
 Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c |  4 +-
 2 files changed, 2 insertions(+), 72 deletions(-)
 delete mode 100644 Silicon/Marvell/Include/Library/MvHwDescLib.h

diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
deleted file mode 100644
index 0de435d..0000000
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/********************************************************************************
-Copyright (C) 2017 Marvell International Ltd.
-
-Marvell BSD License Option
-
-If you received this File from Marvell, you may opt to use, redistribute and/or
-modify this File under the following licensing terms.
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice,
-  this list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright
-  notice, this list of conditions and the following disclaimer in the
-  documentation and/or other materials provided with the distribution.
-
-* Neither the name of Marvell nor the names of its contributors may be
-  used to endorse or promote products derived from this software without
-  specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
-ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-*******************************************************************************/
-
-#ifndef __MVHWDESCLIB_H__
-#define __MVHWDESCLIB_H__
-
-//
-// Helper macros
-//
-
-// Check if device is enabled - it expects PCD to be read to '<type>DeviceTable' array
-#define MVHW_DEV_ENABLED(type, index) (type ## DeviceTable[index])
-
-//
-// I2C devices description template definition
-//
-#define MVHW_MAX_I2C_DEVS         4
-
-typedef struct {
-  UINT8 I2cDevCount;
-  UINTN I2cBaseAddresses[MVHW_MAX_I2C_DEVS];
-} MVHW_I2C_DESC;
-
-//
-// Platform description of I2C devices
-//
-#define MVHW_CP0_I2C0_BASE       0xF2701000
-#define MVHW_CP0_I2C1_BASE       0xF2701100
-#define MVHW_CP1_I2C0_BASE       0xF4701000
-#define MVHW_CP1_I2C1_BASE       0xF4701100
-
-#define DECLARE_A7K8K_I2C_TEMPLATE \
-STATIC \
-MVHW_I2C_DESC mA7k8kI2cDescTemplate = {\
-  4,\
-  { MVHW_CP0_I2C0_BASE, MVHW_CP0_I2C1_BASE, MVHW_CP1_I2C0_BASE, MVHW_CP1_I2C1_BASE }\
-}
-
-#endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c b/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
index dd2edae..9be0489 100644
--- a/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
+++ b/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
@@ -41,7 +41,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #include <Library/DebugLib.h>
 #include <Library/IoLib.h>
 #include <Library/MemoryAllocationLib.h>
-#include <Library/MvHwDescLib.h>
 #include <Library/PcdLib.h>
 #include <Library/UefiBootServicesTableLib.h>
 #include <Library/UefiLib.h>
@@ -380,7 +379,8 @@ MvPhyInit (
   MdioIndex = Phy2MdioController[PhyIndex];
 
   /* Verify correctness of PHY <-> MDIO assignment */
-  if (!MVHW_DEV_ENABLED (Mdio, MdioIndex) || MdioIndex >= Mdio->ControllerCount) {
+  if ((MdioDeviceTable[MdioIndex] == 0) ||
+      (MdioIndex >= Mdio->ControllerCount)) {
     DEBUG ((DEBUG_ERROR, "MvPhyDxe: Incorrect Mdio controller assignment for PHY#%d", PhyIndex));
     return EFI_INVALID_PARAMETER;
   }
-- 
2.7.4

Re: [platforms: PATCH v2 01/25] Marvell/Library: Introduce ArmadaSoCDescLib class

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:11:41PM +0200, Marcin Wojtas wrote:
> From: jinghua <jinghua@marvell.com>
> 
> ArmadaSoCDescLib is a per SoC family library, which provides SoC
> description, like register base of some hardware module controller,
> COMPHY/I2C/NETWORK etc., which right now is hardcoded in MvHwDescLib.h.
> There will be a new protocol, which gets SoC description from this
> library, and provides board description based on enable/disable
> values of each hardware module controller in dsc file.
> 
> As a first example implement obtaining UTMI controllers information.
> Remaining interfaces will be added in follow-up commits.
> This patch introduces new library callback (ArmadaSoCDescUtmiGet ()),
> which dynamically allocates and fills MV_SOC_UTMI_DESC structure,
> SoC description of UTMI PHYs. A new PCD is introduced (PcdMaxCpCount)
> which stores maximal amount of CP110 blocks in the SoC family.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: jinghua <jinghua@marvell.com>

Several of these pre-existing Signed-off-by remain in this set. I did
only comment it on 2/25, but it remains there as well.

Please send a v3 with this addressed across all patches.
But please wait until I've had a chance to go through this set.
When you do so, this one has
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

I will comment explicitly on all such patches in this set, apart from
the one where I already gave Reviewed-by (but please delete all other
signed-off-bys than your own from those as well).

/
    Leif

> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
>  Silicon/Marvell/Marvell.dec                                                      |  4 ++
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf | 37 +++++++++++
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h   | 35 +++++++++++
>  Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                               | 33 ++++++++++
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c   | 65 ++++++++++++++++++++
>  5 files changed, 174 insertions(+)
>  create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
>  create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
>  create mode 100644 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
>  create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> 
> diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
> index be74b4e..2a92eff 100644
> --- a/Silicon/Marvell/Marvell.dec
> +++ b/Silicon/Marvell/Marvell.dec
> @@ -60,6 +60,7 @@
>    gMarvellSpiFlashDxeGuid = { 0x49d7fb74, 0x306d, 0x42bd, { 0x94, 0xc8, 0xc0, 0xc5, 0x4b, 0x18, 0x1d, 0xd7 } }
>  
>  [LibraryClasses]
> +  ArmadaSoCDescLib|Include/Library/ArmadaSoCDescLib.h
>    SampleAtResetLib|Include/Library/SampleAtResetLib.h
>  
>  [Protocols]
> @@ -68,6 +69,9 @@
>    gMarvellPlatformInitCompleteProtocolGuid = { 0x465b8cf7, 0x016f, 0x4ba6, { 0xbe, 0x6b, 0x28, 0x0e, 0x3a, 0x7d, 0x38, 0x6f } }
>  
>  [PcdsFixedAtBuild.common]
> +#Board description
> +  gMarvellTokenSpaceGuid.PcdMaxCpCount|0x2|UINT8|0x30000072
> +
>  #MPP
>    gMarvellTokenSpaceGuid.PcdMppChipCount|0|UINT32|0x30000001
>  
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
> new file mode 100644
> index 0000000..2b73b73
> --- /dev/null
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
> @@ -0,0 +1,37 @@
> +## @file
> +#
> +#  Copyright (C) 2018, Marvell International Ltd. and its affiliates<BR>
> +#
> +#  This program and the accompanying materials are licensed and made available
> +#  under the terms and conditions of the BSD License which accompanies this
> +#  distribution. The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> +#  IMPLIED.
> +#
> +##
> +
> +[Defines]
> +  INF_VERSION                    = 0x0001001A
> +  BASE_NAME                      = Armada7k8kDescLib
> +  FILE_GUID                      = c64f0048-4ca3-4573-b0a6-c2e9e6457285
> +  MODULE_TYPE                    = BASE
> +  VERSION_STRING                 = 1.0
> +  LIBRARY_CLASS                  = ArmadaSoCDescLib
> +
> +[Sources]
> +  Armada7k8kSoCDescLib.c
> +
> +[Packages]
> +  MdeModulePkg/MdeModulePkg.dec
> +  MdePkg/MdePkg.dec
> +  Silicon/Marvell/Marvell.dec
> +
> +[LibraryClasses]
> +  DebugLib
> +  IoLib
> +  PcdLib
> +
> +[FixedPcd]
> +  gMarvellTokenSpaceGuid.PcdMaxCpCount
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> new file mode 100644
> index 0000000..c5711b0
> --- /dev/null
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> @@ -0,0 +1,35 @@
> +/**
> +*
> +*  Copyright (C) 2018, Marvell International Ltd. and its affiliates.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution. The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +*  Glossary - abbreviations used in Marvell SampleAtReset library implementation:
> +*  AP - Application Processor hardware block (Armada 7k8k incorporates AP806)
> +*  CP - South Bridge hardware blocks (Armada 7k8k incorporates CP110)
> +**/
> +
> +#ifndef __ARMADA7K8K_SOC_DESC_LIB_H__
> +#define __ARMADA7K8K_SOC_DESC_LIB_H__
> +
> +//
> +// Common macros
> +//
> +#define MV_SOC_CP_BASE(Cp)               (0xF2000000 + ((Cp) * 0x2000000))
> +
> +//
> +// Platform description of UTMI PHY's
> +//
> +#define MV_SOC_UTMI_PER_CP_COUNT         2
> +#define MV_SOC_UTMI_ID(Utmi)             (Utmi)
> +#define MV_SOC_UTMI_BASE(Utmi)           (0x580000 + ((Utmi) * 0x1000))
> +#define MV_SOC_UTMI_CFG_BASE             0x440440
> +#define MV_SOC_UTMI_USB_CFG_BASE         0x440420
> +
> +#endif
> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> new file mode 100644
> index 0000000..0d45684
> --- /dev/null
> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> @@ -0,0 +1,33 @@
> +/**
> +*
> +*  Copyright (C) 2018, Marvell International Ltd. and its affiliates
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution. The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +#ifndef __ARMADA_SOC_DESC_LIB_H__
> +#define __ARMADA_SOC_DESC_LIB_H__
> +
> +//
> +// UTMI PHY devices SoC description
> +//
> +typedef struct {
> +  UINT8 UtmiPhyId;
> +  UINTN UtmiBaseAddress;
> +  UINTN UtmiConfigAddress;
> +  UINTN UsbConfigAddress;
> +} MV_SOC_UTMI_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescUtmiGet (
> +  IN OUT MV_SOC_UTMI_DESC  **UtmiDesc,
> +  IN OUT UINTN              *DescCount
> +  );
> +#endif /* __ARMADA_SOC_DESC_LIB_H__ */
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> new file mode 100644
> index 0000000..63fb224
> --- /dev/null
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> @@ -0,0 +1,65 @@
> +/**
> +*
> +*  Copyright (C) 2018, Marvell International Ltd. and its affiliates.
> +*
> +*  This program and the accompanying materials are licensed and made available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution. The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +*  Glossary - abbreviations used in Marvell SampleAtReset library implementation:
> +*  AP - Application Processor hardware block (Armada 7k8k incorporates AP806)
> +*  CP - South Bridge hardware blocks (Armada 7k8k incorporates CP110)
> +**/
> +
> +#include <Uefi.h>
> +
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +
> +#include <Protocol/BoardDesc.h>
> +
> +#include "Armada7k8kSoCDescLib.h"
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescUtmiGet (
> +  IN OUT MV_SOC_UTMI_DESC  **UtmiDesc,
> +  IN OUT UINTN              *DescCount
> +  )
> +{
> +  MV_SOC_UTMI_DESC *Desc;
> +  UINTN CpCount, CpIndex, Index, UtmiIndex;
> +
> +  CpCount = FixedPcdGet8 (PcdMaxCpCount);
> +
> +  *DescCount = CpCount * MV_SOC_UTMI_PER_CP_COUNT;
> +  Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_UTMI_DESC));
> +  if (Desc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  *UtmiDesc = Desc;
> +
> +  UtmiIndex = 0;
> +  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> +    for (Index = 0; Index < MV_SOC_UTMI_PER_CP_COUNT; Index++) {
> +      Desc->UtmiPhyId = MV_SOC_UTMI_ID (UtmiIndex);
> +      Desc->UtmiBaseAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_BASE (Index);
> +      Desc->UtmiConfigAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_CFG_BASE;
> +      Desc->UsbConfigAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_USB_CFG_BASE;
> +      Desc++;
> +      UtmiIndex++;
> +    }
> +  }
> +
> +  return EFI_SUCCESS;
> +}
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 04/25] Marvell/Drivers: MvBoardDesc: Introduce board description driver

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:11:44PM +0200, Marcin Wojtas wrote:
> From: jinghua <jinghua@marvell.com>
> 
> This patch introduces a producer of MARVELL_BOARD_DESC_PROTOCOL, which
> gets SoC description from ArmadaSoCDescLib, then based on dsc file,
> provide only enabled hardware module controllers for the consumers,
> which are typically controllers' drivers. Thanks to that
> there is a separation between obtaining the platform description and
> the drivers. A first example of the board description callback
> is information about UTMI controllers and type.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: jinghua <jinghua@marvell.com>

Drop this S-o-b.

Other than that, much happier with this version.
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
>  Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf |  65 ++++++++
>  Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h   |  57 +++++++
>  Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c   | 176 ++++++++++++++++++++
>  3 files changed, 298 insertions(+)
>  create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
>  create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
>  create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> 
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> new file mode 100644
> index 0000000..5da5f21
> --- /dev/null
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> @@ -0,0 +1,65 @@
> +#
> +# Marvell BSD License Option
> +#
> +# If you received this File from Marvell, you may opt to use, redistribute
> +# and/or modify this File under the following licensing terms.
> +# Redistribution and use in source and binary forms, with or without
> +# modification, are permitted provided that the following conditions are met:
> +#
> +# * Redistributions of source code must retain the above copyright notice,
> +# this list of conditions and the following disclaimer.
> +#
> +# * Redistributions in binary form must reproduce the above copyright
> +# notice, this list of conditions and the following disclaimer in the
> +# documentation and/or other materials provided with the distribution.
> +#
> +# * Neither the name of Marvell nor the names of its contributors may be
> +# used to endorse or promote products derived from this software without
> +# specific prior written permission.
> +#
> +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
> +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
> +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
> +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
> +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
> +# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
> +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> +#
> +
> +[Defines]
> +  INF_VERSION                    = 0x0001001A
> +  BASE_NAME                      = BoardDescDxe
> +  FILE_GUID                      = 4ed385f9-5d2c-4774-95c5-d5d9d70b3c37
> +  MODULE_TYPE                    = DXE_DRIVER
> +  VERSION_STRING                 = 1.0
> +  ENTRY_POINT                    = MvBoardDescEntryPoint
> +
> +[Sources]
> +  MvBoardDescDxe.c
> +  MvBoardDescDxe.h
> +
> +[Packages]
> +  MdeModulePkg/MdeModulePkg.dec
> +  MdePkg/MdePkg.dec
> +  Silicon/Marvell/Marvell.dec
> +
> +[LibraryClasses]
> +  ArmadaSoCDescLib
> +  DebugLib
> +  MemoryAllocationLib
> +  UefiDriverEntryPoint
> +  UefiLib
> +
> +[Protocols]
> +  gMarvellBoardDescProtocolGuid
> +
> +[Pcd]
> +  gMarvellTokenSpaceGuid.PcdPciEXhci
> +  gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
> +  gMarvellTokenSpaceGuid.PcdUtmiPortType
> +
> +[Depex]
> +  TRUE
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
> new file mode 100644
> index 0000000..2813f0d
> --- /dev/null
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h
> @@ -0,0 +1,57 @@
> +/*******************************************************************************
> +Copyright (C) 2018 Marvell International Ltd.
> +Marvell BSD License Option
> +
> +If you received this File from Marvell, you may opt to use, redistribute and/or
> +modify this File under the following licensing terms.
> +Redistribution and use in source and binary forms, with or without modification,
> +are permitted provided that the following conditions are met:
> +
> +* Redistributions of source code must retain the above copyright notice,
> +  this list of conditions and the following disclaimer.
> +
> +* Redistributions in binary form must reproduce the above copyright
> +  notice, this list of conditions and the following disclaimer in the
> +  documentation and/or other materials provided with the distribution.
> +
> +* Neither the name of Marvell nor the names of its contributors may be
> +  used to endorse or promote products derived from this software without
> +  specific prior written permission.
> +
> +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
> +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
> +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
> +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> +
> +*******************************************************************************/
> +#ifndef __MV_BOARD_DESC_H__
> +#define __MV_BOARD_DESC_H__
> +
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiLib.h>
> +
> +#include <Protocol/BoardDesc.h>
> +
> +#include <Uefi/UefiBaseType.h>
> +
> +#define MV_BOARD_DESC_SIGNATURE SIGNATURE_64 ('M', 'V', 'B', 'R', 'D', 'D', 'S', 'C')
> +
> +typedef struct {
> +  MARVELL_BOARD_DESC_PROTOCOL   BoardDescProtocol;
> +  UINTN                   Signature;
> +  EFI_HANDLE              Handle;
> +  EFI_LOCK                Lock;
> +} MV_BOARD_DESC;
> +
> +#endif // __MV_BOARD_DESC_H__
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> new file mode 100644
> index 0000000..0232a21
> --- /dev/null
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> @@ -0,0 +1,176 @@
> +/*******************************************************************************
> +Copyright (C) 2018 Marvell International Ltd.
> +
> +Marvell BSD License Option
> +
> +If you received this File from Marvell, you may opt to use, redistribute and/or
> +modify this File under the following licensing terms.
> +Redistribution and use in source and binary forms, with or without modification,
> +are permitted provided that the following conditions are met:
> +
> +* Redistributions of source code must retain the above copyright notice,
> +  this list of conditions and the following disclaimer.
> +
> +* Redistributions in binary form must reproduce the above copyright
> +  notice, this list of conditions and the following disclaimer in the
> +  documentation and/or other materials provided with the distribution.
> +
> +* Neither the name of Marvell nor the names of its contributors may be
> +  used to endorse or promote products derived from this software without
> +  specific prior written permission.
> +
> +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
> +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
> +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
> +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> +
> +*******************************************************************************/
> +#include "MvBoardDescDxe.h"
> +
> +MV_BOARD_DESC *mBoardDescInstance;
> +
> +STATIC
> +EFI_STATUS
> +MvBoardDescUtmiGet (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_UTMI_DESC      **UtmiDesc
> +  )
> +{
> +  UINT8 *UtmiDeviceEnabled, *XhciDeviceEnabled, *UtmiPortType;
> +  UINTN UtmiCount, UtmiDeviceTableSize, UtmiIndex, Index;
> +  MV_BOARD_UTMI_DESC *BoardDesc;
> +  MV_SOC_UTMI_DESC *SoCDesc;
> +  EFI_STATUS Status;
> +
> +  /* Get SoC data about all available UTMI controllers */
> +  Status = ArmadaSoCDescUtmiGet (&SoCDesc, &UtmiCount);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
> +  }
> +
> +  /*
> +   * Obtain table with enabled Utmi PHY's,
> +   * which is represented as an array of UINT8 values
> +   * (0x0 - disabled, 0x1 enabled).
> +   */
> +  UtmiDeviceEnabled = PcdGetPtr (PcdUtmiControllersEnabled);
> +  if (UtmiDeviceEnabled == NULL) {
> +    /* No UTMI PHY on platform */
> +    return EFI_SUCCESS;
> +  }
> +
> +  /* Make sure XHCI controllers table is present */
> +  XhciDeviceEnabled = PcdGetPtr (PcdPciEXhci);
> +  if (XhciDeviceEnabled == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Missing PcdPciEXhci\n", __FUNCTION__));
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
> +  UtmiDeviceTableSize = PcdGetSize (PcdUtmiControllersEnabled);
> +
> +  /* Check if PCD with UTMI PHYs is correctly defined */
> +  if ((UtmiDeviceTableSize > UtmiCount) ||
> +      (UtmiDeviceTableSize > PcdGetSize (PcdPciEXhci))) {
> +    DEBUG ((DEBUG_ERROR,
> +      "%a: Wrong PcdUtmiControllersEnabled format\n",
> +      __FUNCTION__));
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
> +  /* Obtain port type table - also stored as UINT8 array */
> +  UtmiPortType = PcdGetPtr (PcdUtmiPortType);
> +  if ((UtmiPortType == NULL) ||
> +      (PcdGetSize (PcdUtmiPortType) != UtmiDeviceTableSize)) {
> +    DEBUG ((DEBUG_ERROR, "%a: Wrong PcdUtmiPortType format\n", __FUNCTION__));
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
> +  /* Allocate and fill board description */
> +  BoardDesc = AllocateZeroPool (UtmiDeviceTableSize * sizeof (MV_BOARD_UTMI_DESC));
> +  if (BoardDesc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  UtmiIndex = 0;
> +  for (Index = 0; Index < UtmiDeviceTableSize; Index++) {
> +    if (!UtmiDeviceEnabled[Index]) {
> +      continue;
> +    }
> +
> +    /* UTMI PHY without enabled XHCI controller is useless */
> +    if (!XhciDeviceEnabled[Index]) {
> +      DEBUG ((DEBUG_ERROR,
> +             "%a: Disabled Xhci controller %d\n",
> +             Index,
> +             __FUNCTION__));
> +      return EFI_INVALID_PARAMETER;
> +    }
> +
> +    BoardDesc[UtmiIndex].SoC = &SoCDesc[Index];
> +    BoardDesc[UtmiIndex].UtmiPortType = UtmiPortType[Index];
> +    UtmiIndex++;
> +  }
> +
> +  BoardDesc->UtmiDevCount = UtmiIndex;
> +
> +  *UtmiDesc = BoardDesc;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +STATIC
> +VOID
> +MvBoardDescFree (
> +  IN VOID *BoardDesc
> +  )
> +{
> +  FreePool (BoardDesc);
> +}
> +
> +STATIC
> +EFI_STATUS
> +MvBoardDescInitProtocol (
> +  IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
> +  )
> +{
> +  BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
> +  BoardDescProtocol->BoardDescFree = MvBoardDescFree;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +EFIAPI
> +MvBoardDescEntryPoint (
> +  IN EFI_HANDLE       ImageHandle,
> +  IN EFI_SYSTEM_TABLE *SystemTable
> +  )
> +{
> +  EFI_STATUS Status;
> +
> +  mBoardDescInstance = AllocateZeroPool (sizeof (MV_BOARD_DESC));
> +  if (mBoardDescInstance == NULL) {
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  MvBoardDescInitProtocol (&mBoardDescInstance->BoardDescProtocol);
> +
> +  mBoardDescInstance->Signature = MV_BOARD_DESC_SIGNATURE;
> +
> +  Status = gBS->InstallMultipleProtocolInterfaces (&(mBoardDescInstance->Handle),
> +                  &gMarvellBoardDescProtocolGuid,
> +                  &(mBoardDescInstance->BoardDescProtocol));
> +  if (EFI_ERROR (Status)) {
> +    FreePool (mBoardDescInstance);
> +    return Status;
> +  }
> +
> +  return EFI_SUCCESS;
> +}
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 08/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:11:48PM +0200, Marcin Wojtas wrote:
> This patch introduces new library callback (ArmadaSoCDescPp2Get ()),
> which dynamically allocates and fills MV_SOC_PP2_DESC structure with
> the SoC description of PP2 NICs.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h |  6 ++++
>  Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                             | 15 ++++++++++
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 29 ++++++++++++++++++++
>  3 files changed, 50 insertions(+)
> 
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> index c5711b0..d63c3b5 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> @@ -24,6 +24,12 @@
>  #define MV_SOC_CP_BASE(Cp)               (0xF2000000 + ((Cp) * 0x2000000))
>  
>  //
> +// Platform description of PP2 NIC
> +//
> +#define MV_SOC_PP2_BASE(Cp)              MV_SOC_CP_BASE ((Cp))
> +#define MV_SOC_PP2_CLK_FREQ              333333333
> +
> +//
>  // Platform description of UTMI PHY's
>  //
>  #define MV_SOC_UTMI_PER_CP_COUNT         2
> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> index 0d45684..cafcc0f 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> @@ -15,6 +15,21 @@
>  #define __ARMADA_SOC_DESC_LIB_H__
>  
>  //
> +// PP2 NIC devices SoC description
> +//
> +typedef struct {
> +  UINTN Pp2BaseAddress;
> +  UINTN Pp2ClockFrequency;
> +} MV_SOC_PP2_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescPp2Get (
> +  IN OUT MV_SOC_PP2_DESC  **Pp2Desc,
> +  IN OUT UINTN             *DescCount
> +  );
> +
> +//
>  // UTMI PHY devices SoC description
>  //
>  typedef struct {
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> index 63fb224..61b4e30 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> @@ -30,6 +30,35 @@
>  
>  EFI_STATUS
>  EFIAPI
> +ArmadaSoCDescPp2Get (
> +  IN OUT MV_SOC_PP2_DESC  **Pp2Desc,
> +  IN OUT UINTN             *DescCount
> +  )
> +{
> +  MV_SOC_PP2_DESC *Desc;
> +  UINTN CpCount, CpIndex;
> +
> +  CpCount = FixedPcdGet8 (PcdMaxCpCount);
> +
> +  Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_PP2_DESC));
> +  if (Desc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> +    Desc[CpIndex].Pp2BaseAddress = MV_SOC_PP2_BASE (CpIndex);
> +    Desc[CpIndex].Pp2ClockFrequency = MV_SOC_PP2_CLK_FREQ;
> +  }
> +
> +  *Pp2Desc = Desc;
> +  *DescCount = CpCount;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +EFIAPI
>  ArmadaSoCDescUtmiGet (
>    IN OUT MV_SOC_UTMI_DESC  **UtmiDesc,
>    IN OUT UINTN              *DescCount
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 09/25] Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:11:49PM +0200, Marcin Wojtas wrote:
> Introduce new callback that can provide information
> about PP2 NICs to the Pp2Dxe driver.
> 
> Extend ArmadaBoardDescLib with new structure MV_BOARD_PP2_DESC,
> for holding board specific data. In further steps it should
> be extended and replace PCD port's representation with the
> appropriate structures.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf |  1 +
>  Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h |  8 +++
>  Silicon/Marvell/Include/Protocol/BoardDesc.h         |  8 +++
>  Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c   | 63 ++++++++++++++++++++
>  4 files changed, 80 insertions(+)
> 
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> index 5da5f21..6f57f06 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> @@ -58,6 +58,7 @@
>  
>  [Pcd]
>    gMarvellTokenSpaceGuid.PcdPciEXhci
> +  gMarvellTokenSpaceGuid.PcdPp2Controllers
>    gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
>    gMarvellTokenSpaceGuid.PcdUtmiPortType
>  
> diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> index 068535a..ab94877 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> @@ -17,6 +17,14 @@
>  #include <Library/ArmadaSoCDescLib.h>
>  
>  //
> +// PP2 NIC devices per-board description
> +//
> +typedef struct {
> +  MV_SOC_PP2_DESC *SoC;
> +  UINT8            Pp2DevCount;
> +} MV_BOARD_PP2_DESC;
> +
> +//
>  // UTMI PHY devices per-board description
>  //
>  typedef struct {
> diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> index f8a2902..114a0ec 100644
> --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
> +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> @@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
>  
>  typedef
>  EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_PP2_GET) (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_PP2_DESC       **Pp2Desc
> +  );
> +
> +typedef
> +EFI_STATUS
>  (EFIAPI *MV_BOARD_DESC_UTMI_GET) (
>    IN MARVELL_BOARD_DESC_PROTOCOL  *This,
>    IN OUT MV_BOARD_UTMI_DESC      **UtmiDesc
> @@ -55,6 +62,7 @@ VOID
>    );
>  
>  struct _MARVELL_BOARD_DESC_PROTOCOL {
> +  MV_BOARD_DESC_PP2_GET          BoardDescPp2Get;
>    MV_BOARD_DESC_UTMI_GET         BoardDescUtmiGet;
>    MV_BOARD_DESC_FREE             BoardDescFree;
>  };
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> index 0232a21..7c0bc39 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> @@ -37,6 +37,68 @@ MV_BOARD_DESC *mBoardDescInstance;
>  
>  STATIC
>  EFI_STATUS
> +MvBoardDescPp2Get (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_PP2_DESC       **Pp2Desc
> +  )
> +{
> +  UINT8 *Pp2DeviceEnabled;
> +  UINTN Pp2Count, Pp2DeviceTableSize, Pp2Index, Index;
> +  MV_BOARD_PP2_DESC *BoardDesc;
> +  MV_SOC_PP2_DESC *SoCDesc;
> +  EFI_STATUS Status;
> +
> +  /* Get SoC data about all available PP2 controllers */
> +  Status = ArmadaSoCDescPp2Get (&SoCDesc, &Pp2Count);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
> +  }
> +
> +  /*
> +   * Obtain table with enabled Pp2 controllers,
> +   * which is represented as an array of UINT8 values
> +   * (0x0 - disabled, 0x1 enabled).
> +   */
> +  Pp2DeviceEnabled = PcdGetPtr (PcdPp2Controllers);
> +  if (Pp2DeviceEnabled == NULL) {
> +    /* No PP2 NIC on platform */
> +    return EFI_SUCCESS;
> +  }
> +
> +  Pp2DeviceTableSize = PcdGetSize (PcdPp2Controllers);
> +
> +  /* Check if PCD with PP2 NICs is correctly defined */
> +  if (Pp2DeviceTableSize > Pp2Count) {
> +    DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPp2Controllers format\n", __FUNCTION__));
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
> +  /* Allocate and fill board description */
> +  BoardDesc = AllocateZeroPool (Pp2DeviceTableSize * sizeof (MV_BOARD_PP2_DESC));
> +  if (BoardDesc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  Pp2Index = 0;
> +  for (Index = 0; Index < Pp2DeviceTableSize; Index++) {
> +    if (!Pp2DeviceEnabled[Index]) {
> +      continue;
> +    }
> +
> +    BoardDesc[Pp2Index].SoC = &SoCDesc[Index];
> +    Pp2Index++;
> +  }
> +
> +  BoardDesc->Pp2DevCount = Pp2Index;
> +
> +  *Pp2Desc = BoardDesc;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
>  MvBoardDescUtmiGet (
>    IN MARVELL_BOARD_DESC_PROTOCOL  *This,
>    IN OUT MV_BOARD_UTMI_DESC      **UtmiDesc
> @@ -140,6 +202,7 @@ MvBoardDescInitProtocol (
>    IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
>    )
>  {
> +  BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
>    BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
>    BoardDescProtocol->BoardDescFree = MvBoardDescFree;
>  
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 10/25] Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:11:50PM +0200, Marcin Wojtas wrote:
> Pp2Dxe driver used to get Armada7k8k PP2 controller description from
> hardcoded values stored in the header file MvHwDescLib.h.
> As a result it is very hard to support other Armada SoC families
> with this driver.
> 
> This patch updates the driver to get PP2 controller description from
> newly introduced MARVELL_BOARD_DESC protocol, and removes the dependency
> on the hardcoded structures.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf |  2 +-
>  Silicon/Marvell/Include/Library/MvHwDescLib.h | 26 ------------
>  Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c   | 43 ++++++++------------
>  3 files changed, 19 insertions(+), 52 deletions(-)
> 
> diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
> index fcd0611..be536ab 100644
> --- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
> +++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
> @@ -67,11 +67,11 @@
>    gEfiSimpleNetworkProtocolGuid
>    gEfiDevicePathProtocolGuid
>    gEfiCpuArchProtocolGuid
> +  gMarvellBoardDescProtocolGuid
>    gMarvellMdioProtocolGuid
>    gMarvellPhyProtocolGuid
>  
>  [Pcd]
> -  gMarvellTokenSpaceGuid.PcdPp2Controllers
>    gMarvellTokenSpaceGuid.PcdPp2GopIndexes
>    gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp
>    gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed
> diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> index 34d03d4..5fd514c 100644
> --- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
> +++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> @@ -105,17 +105,6 @@ typedef struct {
>  } MVHW_NONDISCOVERABLE_DESC;
>  
>  //
> -// PP2 NIC devices description template definition
> -//
> -#define MVHW_MAX_PP2_DEVS         4
> -
> -typedef struct {
> -  UINT8 Pp2DevCount;
> -  UINTN Pp2BaseAddresses[MVHW_MAX_PP2_DEVS];
> -  UINTN Pp2ClockFrequency[MVHW_MAX_PP2_DEVS];
> -} MVHW_PP2_DESC;
> -
> -//
>  // Platform description of CommonPhy devices
>  //
>  #define MVHW_CP0_COMPHY_BASE       0xF2441000
> @@ -200,19 +189,4 @@ MVHW_NONDISCOVERABLE_DESC mA7k8kNonDiscoverableDescTemplate = {\
>    { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent }\
>  }
>  
> -//
> -// Platform description of Pp2 NIC devices
> -//
> -#define MVHW_CP0_PP2_BASE       0xF2000000
> -#define MVHW_CP1_PP2_BASE       0xF4000000
> -#define MVHW_PP2_CLK_FREQ       333333333
> -
> -#define DECLARE_A7K8K_PP2_TEMPLATE \
> -STATIC \
> -MVHW_PP2_DESC mA7k8kPp2DescTemplate = {\
> -  2,\
> -  { MVHW_CP0_PP2_BASE, MVHW_CP1_PP2_BASE },\
> -  { MVHW_PP2_CLK_FREQ, MVHW_PP2_CLK_FREQ } \
> -}
> -
>  #endif /* __MVHWDESCLIB_H__ */
> diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
> index 3ed10f6..02b2798 100644
> --- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
> +++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
> @@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  
>  *******************************************************************************/
>  
> +#include <Protocol/BoardDesc.h>
>  #include <Protocol/DevicePath.h>
>  #include <Protocol/DriverBinding.h>
>  #include <Protocol/SimpleNetwork.h>
> @@ -42,7 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  #include <Library/DebugLib.h>
>  #include <Library/IoLib.h>
>  #include <Library/MemoryAllocationLib.h>
> -#include <Library/MvHwDescLib.h>
>  #include <Library/NetLib.h>
>  #include <Library/PcdLib.h>
>  #include <Library/UefiBootServicesTableLib.h>
> @@ -54,8 +54,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  
>  #define ReturnUnlock(tpl, status) do { gBS->RestoreTPL (tpl); return (status); } while(0)
>  
> -DECLARE_A7K8K_PP2_TEMPLATE;
> -
>  STATIC PP2_DEVICE_PATH Pp2DevicePathTemplate = {
>    {
>      {
> @@ -1343,35 +1341,28 @@ Pp2DxeInitialise (
>    IN EFI_SYSTEM_TABLE *SystemTable
>    )
>  {
> -  MVHW_PP2_DESC *Desc = &mA7k8kPp2DescTemplate;
> -  UINT8 *Pp2DeviceTable, Index;
> +  MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
> +  MV_BOARD_PP2_DESC *Pp2BoardDesc;
>    MVPP2_SHARED *Mvpp2Shared;
>    EFI_STATUS Status;
> +  UINTN Index;
>  
>    /* Obtain table with enabled Pp2 devices */
> -  Pp2DeviceTable = (UINT8 *)PcdGetPtr (PcdPp2Controllers);
> -  if (Pp2DeviceTable == NULL) {
> -    DEBUG ((DEBUG_ERROR, "Missing PcdPp2Controllers\n"));
> -    return EFI_INVALID_PARAMETER;
> -  }
> -
> -  if (PcdGetSize (PcdPp2Controllers) > MVHW_MAX_PP2_DEVS) {
> -    DEBUG ((DEBUG_ERROR, "Wrong PcdPp2Controllers format\n"));
> -    return EFI_INVALID_PARAMETER;
> +  Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
> +                  NULL,
> +                  (VOID **)&BoardDescProtocol);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
>    }
>  
> -  /* Check amount of declared ports */
> -  if (PcdGetSize (PcdPp2Port2Controller) > Desc->Pp2DevCount * MVPP2_MAX_PORT) {
> -    DEBUG ((DEBUG_ERROR, "Pp2Dxe: Wrong too many ports declared\n"));
> -    return EFI_INVALID_PARAMETER;
> +  Status = BoardDescProtocol->BoardDescPp2Get (BoardDescProtocol,
> +                                &Pp2BoardDesc);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
>    }
>  
>    /* Initialize enabled chips */
> -  for (Index = 0; Index < PcdGetSize (PcdPp2Controllers); Index++) {
> -    if (!MVHW_DEV_ENABLED (Pp2, Index)) {
> -      DEBUG ((DEBUG_ERROR, "Skip Pp2 controller %d\n", Index));
> -      continue;
> -    }
> +  for (Index = 0; Index < Pp2BoardDesc->Pp2DevCount; Index++) {
>  
>      /* Initialize private data */
>      Mvpp2Shared = AllocateZeroPool (sizeof (MVPP2_SHARED));
> @@ -1383,8 +1374,8 @@ Pp2DxeInitialise (
>      Status = Pp2DxeInitialiseController (
>                      Index,
>                      Mvpp2Shared,
> -                    Desc->Pp2BaseAddresses[Index],
> -                    Desc->Pp2ClockFrequency[Index]
> +                    Pp2BoardDesc[Index].SoC->Pp2BaseAddress,
> +                    Pp2BoardDesc[Index].SoC->Pp2ClockFrequency
>                      );
>      if (EFI_ERROR(Status)) {
>        FreePool (Mvpp2Shared);
> @@ -1393,5 +1384,7 @@ Pp2DxeInitialise (
>      }
>    }
>  
> +  BoardDescProtocol->BoardDescFree (Pp2BoardDesc);
> +
>    return EFI_SUCCESS;
>  }
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 01/25] Marvell/Library: Introduce ArmadaSoCDescLib class

[Marcin Wojtas]

Hi Leif,

2018-06-18 17:44 GMT+02:00 Leif Lindholm <leif.lindholm@linaro.org>:
> On Sun, Jun 17, 2018 at 10:11:41PM +0200, Marcin Wojtas wrote:
>> From: jinghua <jinghua@marvell.com>
>>
>> ArmadaSoCDescLib is a per SoC family library, which provides SoC
>> description, like register base of some hardware module controller,
>> COMPHY/I2C/NETWORK etc., which right now is hardcoded in MvHwDescLib.h.
>> There will be a new protocol, which gets SoC description from this
>> library, and provides board description based on enable/disable
>> values of each hardware module controller in dsc file.
>>
>> As a first example implement obtaining UTMI controllers information.
>> Remaining interfaces will be added in follow-up commits.
>> This patch introduces new library callback (ArmadaSoCDescUtmiGet ()),
>> which dynamically allocates and fills MV_SOC_UTMI_DESC structure,
>> SoC description of UTMI PHYs. A new PCD is introduced (PcdMaxCpCount)
>> which stores maximal amount of CP110 blocks in the SoC family.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: jinghua <jinghua@marvell.com>
>
> Several of these pre-existing Signed-off-by remain in this set. I did
> only comment it on 2/25, but it remains there as well.

As I understood, the problem was 'Reviewed-by' from internal review -
all those were dropped. So far when the commit was authored by someone
else (at least in OpenPlatformPkg times) we used to leave the
authorship and authors 'Signed-off-by' - in such case I had to add my
own Signed-off-by, as I was sending this to the lists.

>
> Please send a v3 with this addressed across all patches.
> But please wait until I've had a chance to go through this set.
> When you do so, this one has
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
> I will comment explicitly on all such patches in this set, apart from
> the one where I already gave Reviewed-by (but please delete all other
> signed-off-bys than your own from those as well).
>

I will update  according to your wish and the new policy.

Best regards,
Marcin

> /
>     Leif
>
>> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
>> ---
>>  Silicon/Marvell/Marvell.dec                                                      |  4 ++
>>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf | 37 +++++++++++
>>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h   | 35 +++++++++++
>>  Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                               | 33 ++++++++++
>>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c   | 65 ++++++++++++++++++++
>>  5 files changed, 174 insertions(+)
>>  create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
>>  create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
>>  create mode 100644 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
>>  create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
>>
>> diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
>> index be74b4e..2a92eff 100644
>> --- a/Silicon/Marvell/Marvell.dec
>> +++ b/Silicon/Marvell/Marvell.dec
>> @@ -60,6 +60,7 @@
>>    gMarvellSpiFlashDxeGuid = { 0x49d7fb74, 0x306d, 0x42bd, { 0x94, 0xc8, 0xc0, 0xc5, 0x4b, 0x18, 0x1d, 0xd7 } }
>>
>>  [LibraryClasses]
>> +  ArmadaSoCDescLib|Include/Library/ArmadaSoCDescLib.h
>>    SampleAtResetLib|Include/Library/SampleAtResetLib.h
>>
>>  [Protocols]
>> @@ -68,6 +69,9 @@
>>    gMarvellPlatformInitCompleteProtocolGuid = { 0x465b8cf7, 0x016f, 0x4ba6, { 0xbe, 0x6b, 0x28, 0x0e, 0x3a, 0x7d, 0x38, 0x6f } }
>>
>>  [PcdsFixedAtBuild.common]
>> +#Board description
>> +  gMarvellTokenSpaceGuid.PcdMaxCpCount|0x2|UINT8|0x30000072
>> +
>>  #MPP
>>    gMarvellTokenSpaceGuid.PcdMppChipCount|0|UINT32|0x30000001
>>
>> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
>> new file mode 100644
>> index 0000000..2b73b73
>> --- /dev/null
>> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
>> @@ -0,0 +1,37 @@
>> +## @file
>> +#
>> +#  Copyright (C) 2018, Marvell International Ltd. and its affiliates<BR>
>> +#
>> +#  This program and the accompanying materials are licensed and made available
>> +#  under the terms and conditions of the BSD License which accompanies this
>> +#  distribution. The full text of the license may be found at
>> +#  http://opensource.org/licenses/bsd-license.php
>> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
>> +#  IMPLIED.
>> +#
>> +##
>> +
>> +[Defines]
>> +  INF_VERSION                    = 0x0001001A
>> +  BASE_NAME                      = Armada7k8kDescLib
>> +  FILE_GUID                      = c64f0048-4ca3-4573-b0a6-c2e9e6457285
>> +  MODULE_TYPE                    = BASE
>> +  VERSION_STRING                 = 1.0
>> +  LIBRARY_CLASS                  = ArmadaSoCDescLib
>> +
>> +[Sources]
>> +  Armada7k8kSoCDescLib.c
>> +
>> +[Packages]
>> +  MdeModulePkg/MdeModulePkg.dec
>> +  MdePkg/MdePkg.dec
>> +  Silicon/Marvell/Marvell.dec
>> +
>> +[LibraryClasses]
>> +  DebugLib
>> +  IoLib
>> +  PcdLib
>> +
>> +[FixedPcd]
>> +  gMarvellTokenSpaceGuid.PcdMaxCpCount
>> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
>> new file mode 100644
>> index 0000000..c5711b0
>> --- /dev/null
>> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
>> @@ -0,0 +1,35 @@
>> +/**
>> +*
>> +*  Copyright (C) 2018, Marvell International Ltd. and its affiliates.
>> +*
>> +*  This program and the accompanying materials are licensed and made available
>> +*  under the terms and conditions of the BSD License which accompanies this
>> +*  distribution. The full text of the license may be found at
>> +*  http://opensource.org/licenses/bsd-license.php
>> +*
>> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +*  Glossary - abbreviations used in Marvell SampleAtReset library implementation:
>> +*  AP - Application Processor hardware block (Armada 7k8k incorporates AP806)
>> +*  CP - South Bridge hardware blocks (Armada 7k8k incorporates CP110)
>> +**/
>> +
>> +#ifndef __ARMADA7K8K_SOC_DESC_LIB_H__
>> +#define __ARMADA7K8K_SOC_DESC_LIB_H__
>> +
>> +//
>> +// Common macros
>> +//
>> +#define MV_SOC_CP_BASE(Cp)               (0xF2000000 + ((Cp) * 0x2000000))
>> +
>> +//
>> +// Platform description of UTMI PHY's
>> +//
>> +#define MV_SOC_UTMI_PER_CP_COUNT         2
>> +#define MV_SOC_UTMI_ID(Utmi)             (Utmi)
>> +#define MV_SOC_UTMI_BASE(Utmi)           (0x580000 + ((Utmi) * 0x1000))
>> +#define MV_SOC_UTMI_CFG_BASE             0x440440
>> +#define MV_SOC_UTMI_USB_CFG_BASE         0x440420
>> +
>> +#endif
>> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
>> new file mode 100644
>> index 0000000..0d45684
>> --- /dev/null
>> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
>> @@ -0,0 +1,33 @@
>> +/**
>> +*
>> +*  Copyright (C) 2018, Marvell International Ltd. and its affiliates
>> +*
>> +*  This program and the accompanying materials are licensed and made available
>> +*  under the terms and conditions of the BSD License which accompanies this
>> +*  distribution. The full text of the license may be found at
>> +*  http://opensource.org/licenses/bsd-license.php
>> +*
>> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +#ifndef __ARMADA_SOC_DESC_LIB_H__
>> +#define __ARMADA_SOC_DESC_LIB_H__
>> +
>> +//
>> +// UTMI PHY devices SoC description
>> +//
>> +typedef struct {
>> +  UINT8 UtmiPhyId;
>> +  UINTN UtmiBaseAddress;
>> +  UINTN UtmiConfigAddress;
>> +  UINTN UsbConfigAddress;
>> +} MV_SOC_UTMI_DESC;
>> +
>> +EFI_STATUS
>> +EFIAPI
>> +ArmadaSoCDescUtmiGet (
>> +  IN OUT MV_SOC_UTMI_DESC  **UtmiDesc,
>> +  IN OUT UINTN              *DescCount
>> +  );
>> +#endif /* __ARMADA_SOC_DESC_LIB_H__ */
>> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
>> new file mode 100644
>> index 0000000..63fb224
>> --- /dev/null
>> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
>> @@ -0,0 +1,65 @@
>> +/**
>> +*
>> +*  Copyright (C) 2018, Marvell International Ltd. and its affiliates.
>> +*
>> +*  This program and the accompanying materials are licensed and made available
>> +*  under the terms and conditions of the BSD License which accompanies this
>> +*  distribution. The full text of the license may be found at
>> +*  http://opensource.org/licenses/bsd-license.php
>> +*
>> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +*  Glossary - abbreviations used in Marvell SampleAtReset library implementation:
>> +*  AP - Application Processor hardware block (Armada 7k8k incorporates AP806)
>> +*  CP - South Bridge hardware blocks (Armada 7k8k incorporates CP110)
>> +**/
>> +
>> +#include <Uefi.h>
>> +
>> +#include <Library/BaseMemoryLib.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/IoLib.h>
>> +#include <Library/MemoryAllocationLib.h>
>> +#include <Library/PcdLib.h>
>> +#include <Library/UefiBootServicesTableLib.h>
>> +
>> +#include <Protocol/BoardDesc.h>
>> +
>> +#include "Armada7k8kSoCDescLib.h"
>> +
>> +EFI_STATUS
>> +EFIAPI
>> +ArmadaSoCDescUtmiGet (
>> +  IN OUT MV_SOC_UTMI_DESC  **UtmiDesc,
>> +  IN OUT UINTN              *DescCount
>> +  )
>> +{
>> +  MV_SOC_UTMI_DESC *Desc;
>> +  UINTN CpCount, CpIndex, Index, UtmiIndex;
>> +
>> +  CpCount = FixedPcdGet8 (PcdMaxCpCount);
>> +
>> +  *DescCount = CpCount * MV_SOC_UTMI_PER_CP_COUNT;
>> +  Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_UTMI_DESC));
>> +  if (Desc == NULL) {
>> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
>> +    return EFI_OUT_OF_RESOURCES;
>> +  }
>> +
>> +  *UtmiDesc = Desc;
>> +
>> +  UtmiIndex = 0;
>> +  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
>> +    for (Index = 0; Index < MV_SOC_UTMI_PER_CP_COUNT; Index++) {
>> +      Desc->UtmiPhyId = MV_SOC_UTMI_ID (UtmiIndex);
>> +      Desc->UtmiBaseAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_BASE (Index);
>> +      Desc->UtmiConfigAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_CFG_BASE;
>> +      Desc->UsbConfigAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_USB_CFG_BASE;
>> +      Desc++;
>> +      UtmiIndex++;
>> +    }
>> +  }
>> +
>> +  return EFI_SUCCESS;
>> +}
>> --
>> 2.7.4
>>

Re: [platforms: PATCH v2 11/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:11:51PM +0200, Marcin Wojtas wrote:
> This patch introduces new library callbacks for NonDiscoverable devices
> i.e. AHCI/XHCI/SDMMC. They dynamically allocate and fill according
> structures with the SoC description of the devices.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h | 18 ++++
>  Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                             | 48 ++++++++++
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 92 ++++++++++++++++++++
>  3 files changed, 158 insertions(+)
> 
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> index d63c3b5..94fd6fa 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> @@ -24,12 +24,24 @@
>  #define MV_SOC_CP_BASE(Cp)               (0xF2000000 + ((Cp) * 0x2000000))
>  
>  //
> +// Platform description of AHCI controllers
> +//
> +#define MV_SOC_AHCI_BASE(Cp)             (MV_SOC_CP_BASE ((Cp)) + 0x540000)
> +#define MV_SOC_AHCI_ID(Cp)               ((Cp) % 2)
> +
> +//
>  // Platform description of PP2 NIC
>  //
>  #define MV_SOC_PP2_BASE(Cp)              MV_SOC_CP_BASE ((Cp))

(It might not hurt with a later patch changing these ((Cp)) to (Cp),
but don't worry about it for this patch. I'm guessing there could be
more than these two instances in this file?)

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

>  #define MV_SOC_PP2_CLK_FREQ              333333333
>  
>  //
> +// Platform description of SDMMC controllers
> +//
> +#define MV_SOC_MAX_SDMMC_COUNT           2
> +#define MV_SOC_SDMMC_BASE(Index)         ((Index) == 0 ? 0xF06E0000 : 0xF2780000)
> +
> +//
>  // Platform description of UTMI PHY's
>  //
>  #define MV_SOC_UTMI_PER_CP_COUNT         2
> @@ -38,4 +50,10 @@
>  #define MV_SOC_UTMI_CFG_BASE             0x440440
>  #define MV_SOC_UTMI_USB_CFG_BASE         0x440420
>  
> +//
> +// Platform description of XHCI controllers
> +//
> +#define MV_SOC_XHCI_PER_CP_COUNT         2
> +#define MV_SOC_XHCI_BASE(Xhci)           (0x500000 + ((Xhci) * 0x10000))
> +
>  #endif
> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> index cafcc0f..3b29d78 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> @@ -14,6 +14,54 @@
>  #ifndef __ARMADA_SOC_DESC_LIB_H__
>  #define __ARMADA_SOC_DESC_LIB_H__
>  
> +#include <Library/NonDiscoverableDeviceRegistrationLib.h>
> +
> +//
> +// NonDiscoverable devices SoC description
> +//
> +// AHCI
> +typedef struct {
> +  UINTN AhciId;
> +  UINTN AhciBaseAddress;
> +  UINTN AhciMemSize;
> +  NON_DISCOVERABLE_DEVICE_DMA_TYPE AhciDmaType;
> +} MV_SOC_AHCI_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescAhciGet (
> +  IN OUT MV_SOC_AHCI_DESC  **AhciDesc,
> +  IN OUT UINTN              *DescCount
> +  );
> +
> +// SDMMC
> +typedef struct {
> +  UINTN SdMmcBaseAddress;
> +  UINTN SdMmcMemSize;
> +  NON_DISCOVERABLE_DEVICE_DMA_TYPE SdMmcDmaType;
> +} MV_SOC_SDMMC_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescSdMmcGet (
> +  IN OUT MV_SOC_SDMMC_DESC  **SdMmcDesc,
> +  IN OUT UINTN               *DescCount
> +  );
> +
> +// XHCI
> +typedef struct {
> +  UINTN XhciBaseAddress;
> +  UINTN XhciMemSize;
> +  NON_DISCOVERABLE_DEVICE_DMA_TYPE XhciDmaType;
> +} MV_SOC_XHCI_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescXhciGet (
> +  IN OUT MV_SOC_XHCI_DESC  **XhciDesc,
> +  IN OUT UINTN              *DescCount
> +  );
> +
>  //
>  // PP2 NIC devices SoC description
>  //
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> index 61b4e30..97fe3f8 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> @@ -30,6 +30,37 @@
>  
>  EFI_STATUS
>  EFIAPI
> +ArmadaSoCDescAhciGet (
> +  IN OUT MV_SOC_AHCI_DESC  **AhciDesc,
> +  IN OUT UINTN              *DescCount
> +  )
> +{
> +  MV_SOC_AHCI_DESC *Desc;
> +  UINTN CpCount, CpIndex;
> +
> +  CpCount = FixedPcdGet8 (PcdMaxCpCount);
> +
> +  Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_AHCI_DESC));
> +  if (Desc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> +    Desc[CpIndex].AhciId = MV_SOC_AHCI_ID (CpIndex);
> +    Desc[CpIndex].AhciBaseAddress = MV_SOC_AHCI_BASE (CpIndex);
> +    Desc[CpIndex].AhciMemSize = SIZE_8KB;
> +    Desc[CpIndex].AhciDmaType = NonDiscoverableDeviceDmaTypeCoherent;
> +  }
> +
> +  *AhciDesc = Desc;
> +  *DescCount = CpCount;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +EFIAPI
>  ArmadaSoCDescPp2Get (
>    IN OUT MV_SOC_PP2_DESC  **Pp2Desc,
>    IN OUT UINTN             *DescCount
> @@ -59,6 +90,34 @@ ArmadaSoCDescPp2Get (
>  
>  EFI_STATUS
>  EFIAPI
> +ArmadaSoCDescSdMmcGet (
> +  IN OUT MV_SOC_SDMMC_DESC  **SdMmcDesc,
> +  IN OUT UINTN               *DescCount
> +  )
> +{
> +  MV_SOC_SDMMC_DESC *Desc;
> +  UINTN Index;
> +
> +  Desc = AllocateZeroPool (MV_SOC_MAX_SDMMC_COUNT * sizeof (MV_SOC_SDMMC_DESC));
> +  if (Desc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  for (Index = 0; Index < MV_SOC_MAX_SDMMC_COUNT; Index++) {
> +    Desc[Index].SdMmcBaseAddress = MV_SOC_SDMMC_BASE (Index);
> +    Desc[Index].SdMmcMemSize = SIZE_1KB;
> +    Desc[Index].SdMmcDmaType = NonDiscoverableDeviceDmaTypeCoherent;
> +  }
> +
> +  *SdMmcDesc = Desc;
> +  *DescCount = MV_SOC_MAX_SDMMC_COUNT;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +EFIAPI
>  ArmadaSoCDescUtmiGet (
>    IN OUT MV_SOC_UTMI_DESC  **UtmiDesc,
>    IN OUT UINTN              *DescCount
> @@ -92,3 +151,36 @@ ArmadaSoCDescUtmiGet (
>  
>    return EFI_SUCCESS;
>  }
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescXhciGet (
> +  IN OUT MV_SOC_XHCI_DESC  **XhciDesc,
> +  IN OUT UINTN              *DescCount
> +  )
> +{
> +  MV_SOC_XHCI_DESC *Desc;
> +  UINTN CpCount, CpIndex, Index;
> +
> +  CpCount = FixedPcdGet8 (PcdMaxCpCount);
> +
> +  *DescCount = CpCount * MV_SOC_XHCI_PER_CP_COUNT;
> +  Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_XHCI_DESC));
> +  if (Desc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  *XhciDesc = Desc;
> +
> +  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> +    for (Index = 0; Index < MV_SOC_XHCI_PER_CP_COUNT; Index++) {
> +      Desc->XhciBaseAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_XHCI_BASE (Index);
> +      Desc->XhciMemSize = SIZE_16KB;
> +      Desc->XhciDmaType = NonDiscoverableDeviceDmaTypeCoherent;
> +      Desc++;
> +    }
> +  }
> +
> +  return EFI_SUCCESS;
> +}
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 12/25] Marvell/Drivers: MvBoardDesc: Extend protocol with AHCI/SDMMC/XHCI

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:11:52PM +0200, Marcin Wojtas wrote:
> Introduce new callback that can provide information
> about NonDiscoverableDevices to the relevant drivers and libraries.
> 
> Extend ArmadaBoardDescLib with new structures (MV_BOARD_AHCI_DESC/
> MV_BOARD_SDMMC_DESC/MV_BOARD_XHCI_DESC) for holding board specific
> data.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf |   2 +
>  Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h |  28 +++
>  Silicon/Marvell/Include/Protocol/BoardDesc.h         |  24 +++
>  Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c   | 192 ++++++++++++++++++++
>  4 files changed, 246 insertions(+)
> 
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> index 6f57f06..cc0d9d4 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> @@ -57,6 +57,8 @@
>    gMarvellBoardDescProtocolGuid
>  
>  [Pcd]
> +  gMarvellTokenSpaceGuid.PcdPciEAhci
> +  gMarvellTokenSpaceGuid.PcdPciESdhci
>    gMarvellTokenSpaceGuid.PcdPciEXhci
>    gMarvellTokenSpaceGuid.PcdPp2Controllers
>    gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
> diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> index ab94877..7e4fa4d 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> @@ -17,6 +17,34 @@
>  #include <Library/ArmadaSoCDescLib.h>
>  
>  //
> +// NonDiscoverableDevices per-board description
> +//
> +
> +//
> +// AHCI devices per-board description
> +//
> +typedef struct {
> +  MV_SOC_AHCI_DESC *SoC;
> +  UINTN             AhciDevCount;
> +} MV_BOARD_AHCI_DESC;
> +
> +//
> +// SDMMC devices per-board description
> +//
> +typedef struct {
> +  MV_SOC_SDMMC_DESC *SoC;
> +  UINTN              SdMmcDevCount;
> +} MV_BOARD_SDMMC_DESC;
> +
> +//
> +// XHCI devices per-board description
> +//
> +typedef struct {
> +  MV_SOC_XHCI_DESC *SoC;
> +  UINTN             XhciDevCount;
> +} MV_BOARD_XHCI_DESC;
> +
> +//
>  // PP2 NIC devices per-board description
>  //
>  typedef struct {
> diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> index 114a0ec..edf9491 100644
> --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
> +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> @@ -43,6 +43,27 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
>  
>  typedef
>  EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_AHCI_GET) (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_AHCI_DESC      **AhciDesc
> +  );
> +
> +typedef
> +EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_SDMMC_GET) (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_SDMMC_DESC     **SdMmcDesc
> +  );
> +
> +typedef
> +EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_XHCI_GET) (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_XHCI_DESC      **XhciDesc
> +  );
> +
> +typedef
> +EFI_STATUS
>  (EFIAPI *MV_BOARD_DESC_PP2_GET) (
>    IN MARVELL_BOARD_DESC_PROTOCOL  *This,
>    IN OUT MV_BOARD_PP2_DESC       **Pp2Desc
> @@ -62,8 +83,11 @@ VOID
>    );
>  
>  struct _MARVELL_BOARD_DESC_PROTOCOL {
> +  MV_BOARD_DESC_AHCI_GET         BoardDescAhciGet;
>    MV_BOARD_DESC_PP2_GET          BoardDescPp2Get;
> +  MV_BOARD_DESC_SDMMC_GET        BoardDescSdMmcGet;
>    MV_BOARD_DESC_UTMI_GET         BoardDescUtmiGet;
> +  MV_BOARD_DESC_XHCI_GET         BoardDescXhciGet;
>    MV_BOARD_DESC_FREE             BoardDescFree;
>  };
>  
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> index 7c0bc39..3439017 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> @@ -37,6 +37,195 @@ MV_BOARD_DESC *mBoardDescInstance;
>  
>  STATIC
>  EFI_STATUS
> +MvBoardDescAhciGet (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_AHCI_DESC      **AhciDesc
> +  )
> +{
> +  UINT8 *AhciDeviceEnabled;
> +  UINTN AhciCount, AhciDeviceTableSize, AhciIndex, Index;
> +  MV_BOARD_AHCI_DESC *BoardDesc;
> +  MV_SOC_AHCI_DESC *SoCDesc;
> +  EFI_STATUS Status;
> +
> +  /* Get SoC data about all available AHCI controllers */
> +  Status = ArmadaSoCDescAhciGet (&SoCDesc, &AhciCount);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
> +  }
> +
> +  /*
> +   * Obtain table with enabled AHCI controllers
> +   * which is represented as an array of UINT8 values
> +   * (0x0 - disabled, 0x1 enabled).
> +   */
> +  AhciDeviceEnabled = PcdGetPtr (PcdPciEAhci);
> +  if (AhciDeviceEnabled == NULL) {
> +    /* No AHCI on the platform */
> +    return EFI_SUCCESS;
> +  }
> +
> +  AhciDeviceTableSize = PcdGetSize (PcdPciEAhci);
> +
> +  /* Check if PCD with AHCI controllers is correctly defined */
> +  if (AhciDeviceTableSize > AhciCount) {
> +    DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEAhci format\n", __FUNCTION__));
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
> +  /* Allocate and fill board description */
> +  BoardDesc = AllocateZeroPool (AhciDeviceTableSize * sizeof (MV_BOARD_AHCI_DESC));
> +  if (BoardDesc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  AhciIndex = 0;
> +  for (Index = 0; Index < AhciDeviceTableSize; Index++) {
> +    if (!AhciDeviceEnabled[Index]) {
> +      DEBUG ((DEBUG_INFO, "%a: Skip Ahci controller %d\n", __FUNCTION__, Index));
> +      continue;
> +    }
> +
> +    BoardDesc[AhciIndex].SoC = &SoCDesc[Index];
> +    AhciIndex++;
> +  }
> +
> +  BoardDesc->AhciDevCount = AhciIndex;
> +
> +  *AhciDesc = BoardDesc;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
> +MvBoardDescSdMmcGet (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_SDMMC_DESC     **SdMmcDesc
> +  )
> +{
> +  UINT8 *SdMmcDeviceEnabled;
> +  UINTN SdMmcCount, SdMmcDeviceTableSize, SdMmcIndex, Index;
> +  MV_BOARD_SDMMC_DESC *BoardDesc;
> +  MV_SOC_SDMMC_DESC *SoCDesc;
> +  EFI_STATUS Status;
> +
> +  /* Get SoC data about all available SDMMC controllers */
> +  Status = ArmadaSoCDescSdMmcGet (&SoCDesc, &SdMmcCount);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
> +  }
> +
> +  /*
> +   * Obtain table with enabled SDMMC controllers
> +   * which is represented as an array of UINT8 values
> +   * (0x0 - disabled, 0x1 enabled).
> +   */
> +  SdMmcDeviceEnabled = PcdGetPtr (PcdPciESdhci);
> +  if (SdMmcDeviceEnabled == NULL) {
> +    /* No SDMMC on platform */
> +    return EFI_SUCCESS;
> +  }
> +
> +  SdMmcDeviceTableSize = PcdGetSize (PcdPciESdhci);
> +
> +  /* Check if PCD with SDMMC controllers is correctly defined */
> +  if (SdMmcDeviceTableSize > SdMmcCount) {
> +    DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciESdhci format\n", __FUNCTION__));
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
> +  /* Allocate and fill board description */
> +  BoardDesc = AllocateZeroPool (SdMmcDeviceTableSize * sizeof (MV_BOARD_SDMMC_DESC));
> +  if (BoardDesc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  SdMmcIndex = 0;
> +  for (Index = 0; Index < SdMmcDeviceTableSize; Index++) {
> +    if (!SdMmcDeviceEnabled[Index]) {
> +      DEBUG ((DEBUG_INFO, "%a: Skip SdMmc controller %d\n", __FUNCTION__, Index));
> +      continue;
> +    }
> +
> +    BoardDesc[SdMmcIndex].SoC = &SoCDesc[Index];
> +    SdMmcIndex++;
> +  }
> +
> +  BoardDesc->SdMmcDevCount = SdMmcIndex;
> +
> +  *SdMmcDesc = BoardDesc;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
> +MvBoardDescXhciGet (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_XHCI_DESC      **XhciDesc
> +  )
> +{
> +  UINT8 *XhciDeviceEnabled;
> +  UINTN XhciCount, XhciDeviceTableSize, XhciIndex, Index;
> +  MV_BOARD_XHCI_DESC *BoardDesc;
> +  MV_SOC_XHCI_DESC *SoCDesc;
> +  EFI_STATUS Status;
> +
> +  /* Get SoC data about all available XHCI controllers */
> +  Status = ArmadaSoCDescXhciGet (&SoCDesc, &XhciCount);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
> +  }
> +
> +  /*
> +   * Obtain table with enabled XHCI controllers
> +   * which is represented as an array of UINT8 values
> +   * (0x0 - disabled, 0x1 enabled).
> +   */
> +  XhciDeviceEnabled = PcdGetPtr (PcdPciEXhci);
> +  if (XhciDeviceEnabled == NULL) {
> +    /* No XHCI on platform */
> +    return EFI_SUCCESS;
> +  }
> +
> +  XhciDeviceTableSize = PcdGetSize (PcdPciEXhci);
> +
> +  /* Check if PCD with XHCI controllers is correctly defined */
> +  if (XhciDeviceTableSize > XhciCount) {
> +    DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEXhci format\n", __FUNCTION__));
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
> +  /* Allocate and fill board description */
> +  BoardDesc = AllocateZeroPool (XhciDeviceTableSize * sizeof (MV_BOARD_XHCI_DESC));
> +  if (BoardDesc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  XhciIndex = 0;
> +  for (Index = 0; Index < XhciDeviceTableSize; Index++) {
> +    if (!XhciDeviceEnabled[Index]) {
> +      DEBUG ((DEBUG_INFO, "%a: Skip Xhci controller %d\n", __FUNCTION__, Index));
> +      continue;
> +    }
> +
> +    BoardDesc[XhciIndex].SoC = &SoCDesc[Index];
> +    XhciIndex++;
> +  }
> +
> +  BoardDesc->XhciDevCount = XhciIndex;
> +
> +  *XhciDesc = BoardDesc;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
>  MvBoardDescPp2Get (
>    IN MARVELL_BOARD_DESC_PROTOCOL  *This,
>    IN OUT MV_BOARD_PP2_DESC       **Pp2Desc
> @@ -202,8 +391,11 @@ MvBoardDescInitProtocol (
>    IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol
>    )
>  {
> +  BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
>    BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
> +  BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
>    BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
> +  BoardDescProtocol->BoardDescXhciGet = MvBoardDescXhciGet;
>    BoardDescProtocol->BoardDescFree = MvBoardDescFree;
>  
>    return EFI_SUCCESS;
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 14/25] Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:11:54PM +0200, Marcin Wojtas wrote:
> ComPhy Library used to get Armada7k8k AHCI/SDMMC/XHCI controller
> description from hardcoded values stored in the header file
> MvHwDescLib.h. As a result it is very hard to support other
> Armada SoC families with this library.
> 
> This patch updates the driver to get AHCI controller
> description from newly introduced MARVELL_BOARD_DESC protocol,
> and removes the dependency on the hardcoded structures.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf |  1 -
>  Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf                    |  6 +-
>  Silicon/Marvell/Include/Library/MvHwDescLib.h                      | 60 --------------------
>  Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h                      |  4 ++
>  Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c                    | 50 ++++++++--------
>  5 files changed, 35 insertions(+), 86 deletions(-)
> 
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
> index f2c173c..e888566 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
> @@ -47,7 +47,6 @@
>  
>  [LibraryClasses]
>    ArmLib
> -  ComPhyLib
>    DebugLib
>    MemoryAllocationLib
>    MppLib
> diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
> index ce0af54..f36c701 100644
> --- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
> +++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
> @@ -52,12 +52,16 @@
>    PcdLib
>    SampleAtResetLib
>    IoLib
> +  UefiBootServicesTableLib
>  
>  [Sources.common]
>    ComPhyLib.c
>    ComPhyCp110.c
>    ComPhyMux.c
>  
> +[Protocols]
> +  gMarvellBoardDescProtocolGuid  ## CONSUMES
> +
>  [FixedPcd]
>    gMarvellTokenSpaceGuid.PcdComPhyDevices
>  
> @@ -80,5 +84,3 @@
>    gMarvellTokenSpaceGuid.PcdChip3ComPhyTypes
>    gMarvellTokenSpaceGuid.PcdChip3ComPhySpeeds
>    gMarvellTokenSpaceGuid.PcdChip3ComPhyInvFlags
> -
> -  gMarvellTokenSpaceGuid.PcdPciEAhci
> diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> index 5fd514c..9f383f4 100644
> --- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
> +++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> @@ -36,7 +36,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  #define __MVHWDESCLIB_H__
>  
>  #include <Library/MvComPhyLib.h>
> -#include <Library/NonDiscoverableDeviceRegistrationLib.h>
>  
>  //
>  // Helper macros
> @@ -80,31 +79,6 @@ typedef struct {
>  } MVHW_MDIO_DESC;
>  
>  //
> -// NonDiscoverable devices description template definition
> -//
> -#define MVHW_MAX_XHCI_DEVS         4
> -#define MVHW_MAX_AHCI_DEVS         4
> -#define MVHW_MAX_SDHCI_DEVS        4
> -
> -typedef struct {
> -  // XHCI
> -  UINT8 XhciDevCount;
> -  UINTN XhciBaseAddresses[MVHW_MAX_XHCI_DEVS];
> -  UINTN XhciMemSize[MVHW_MAX_XHCI_DEVS];
> -  NON_DISCOVERABLE_DEVICE_DMA_TYPE XhciDmaType[MVHW_MAX_XHCI_DEVS];
> -  // AHCI
> -  UINT8 AhciDevCount;
> -  UINTN AhciBaseAddresses[MVHW_MAX_AHCI_DEVS];
> -  UINTN AhciMemSize[MVHW_MAX_AHCI_DEVS];
> -  NON_DISCOVERABLE_DEVICE_DMA_TYPE AhciDmaType[MVHW_MAX_AHCI_DEVS];
> -  // SDHCI
> -  UINT8 SdhciDevCount;
> -  UINTN SdhciBaseAddresses[MVHW_MAX_SDHCI_DEVS];
> -  UINTN SdhciMemSize[MVHW_MAX_SDHCI_DEVS];
> -  NON_DISCOVERABLE_DEVICE_DMA_TYPE SdhciDmaType[MVHW_MAX_SDHCI_DEVS];
> -} MVHW_NONDISCOVERABLE_DESC;
> -
> -//
>  // Platform description of CommonPhy devices
>  //
>  #define MVHW_CP0_COMPHY_BASE       0xF2441000
> @@ -155,38 +129,4 @@ MVHW_MDIO_DESC mA7k8kMdioDescTemplate = {\
>    { MVHW_CP0_MDIO_BASE, MVHW_CP1_MDIO_BASE }\
>  }
>  
> -//
> -// Platform description of NonDiscoverable devices
> -//
> -#define MVHW_CP0_XHCI0_BASE        0xF2500000
> -#define MVHW_CP0_XHCI1_BASE        0xF2510000
> -#define MVHW_CP1_XHCI0_BASE        0xF4500000
> -#define MVHW_CP1_XHCI1_BASE        0xF4510000
> -
> -#define MVHW_CP0_AHCI0_BASE        0xF2540000
> -#define MVHW_CP0_AHCI0_ID          0
> -#define MVHW_CP1_AHCI0_BASE        0xF4540000
> -#define MVHW_CP1_AHCI0_ID          1
> -
> -#define MVHW_AP0_SDHCI0_BASE       0xF06E0000
> -#define MVHW_CP0_SDHCI0_BASE       0xF2780000
> -
> -#define DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE   \
> -STATIC \
> -MVHW_NONDISCOVERABLE_DESC mA7k8kNonDiscoverableDescTemplate = {\
> -  4, /* XHCI */\
> -  { MVHW_CP0_XHCI0_BASE, MVHW_CP0_XHCI1_BASE, MVHW_CP1_XHCI0_BASE, MVHW_CP1_XHCI1_BASE },\
> -  { SIZE_16KB, SIZE_16KB, SIZE_16KB, SIZE_16KB },\
> -  { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent,\
> -    NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent },\
> -  2, /* AHCI */\
> -  { MVHW_CP0_AHCI0_BASE, MVHW_CP1_AHCI0_BASE },\
> -  { SIZE_8KB, SIZE_8KB },\
> -  { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent },\
> -  2, /* SDHCI */\
> -  { MVHW_AP0_SDHCI0_BASE, MVHW_CP0_SDHCI0_BASE },\
> -  { SIZE_1KB, SIZE_1KB },\
> -  { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent }\
> -}
> -
>  #endif /* __MVHWDESCLIB_H__ */
> diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h
> index c675d74..090116d 100644
> --- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h
> +++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h
> @@ -35,6 +35,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  #ifndef __COMPHY_H__
>  #define __COMPHY_H__
>  
> +#include <Uefi.h>
>  #include <Library/ArmLib.h>
>  #include <Library/ArmPlatformLib.h>
>  #include <Library/DebugLib.h>
> @@ -43,6 +44,9 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  #include <Library/MvComPhyLib.h>
>  #include <Library/IoLib.h>
>  #include <Library/TimerLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +
> +#include <Protocol/BoardDesc.h>
>  
>  #define MAX_LANE_OPTIONS          10
>  
> diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c b/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c
> index 09994ca..5e0ebf6 100755
> --- a/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c
> +++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c
> @@ -33,7 +33,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  *******************************************************************************/
>  
>  #include "ComPhyLib.h"
> -#include <Library/MvHwDescLib.h>
>  #include <Library/SampleAtResetLib.h>
>  
>  #define SD_LANE_ADDR_WIDTH          0x1000
> @@ -46,8 +45,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  #define CP110_PCIE_REF_CLK_TYPE0    0
>  #define CP110_PCIE_REF_CLK_TYPE12   1
>  
> -DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE;
> -
>  /*
>   * For CP-110 we have 2 Selector registers "PHY Selectors"
>   * and " PIPE Selectors".
> @@ -1138,36 +1135,23 @@ ComPhySataCheckPll (
>  STATIC
>  UINTN
>  ComPhySataPowerUp (
> +  IN UINTN ChipId,
>    IN UINT32 Lane,
>    IN EFI_PHYSICAL_ADDRESS HpipeBase,
>    IN EFI_PHYSICAL_ADDRESS ComPhyBase,
> -  IN UINT8 SataHostId
> +  IN MV_BOARD_AHCI_DESC *Desc
>    )
>  {
>    EFI_STATUS Status;
> -  UINT8 *SataDeviceTable;
> -  MVHW_NONDISCOVERABLE_DESC *Desc = &mA7k8kNonDiscoverableDescTemplate;
>    EFI_PHYSICAL_ADDRESS HpipeAddr = HPIPE_ADDR(HpipeBase, Lane);
>    EFI_PHYSICAL_ADDRESS SdIpAddr = SD_ADDR(HpipeBase, Lane);
>    EFI_PHYSICAL_ADDRESS ComPhyAddr = COMPHY_ADDR(ComPhyBase, Lane);
>  
> -  SataDeviceTable = (UINT8 *) PcdGetPtr (PcdPciEAhci);
> -
> -  if (SataDeviceTable == NULL || SataHostId >= PcdGetSize (PcdPciEAhci)) {
> -    DEBUG ((DEBUG_ERROR, "ComPhySata: Sata host %d is undefined\n", SataHostId));
> -    return EFI_INVALID_PARAMETER;
> -  }
> -
> -  if (!MVHW_DEV_ENABLED (Sata, SataHostId)) {
> -    DEBUG ((DEBUG_ERROR, "ComPhySata: Sata host %d is disabled\n", SataHostId));
> -    return EFI_INVALID_PARAMETER;
> -  }
> -
>    DEBUG ((DEBUG_INFO, "ComPhySata: Initialize SATA PHYs\n"));
>  
>    DEBUG((DEBUG_INFO, "ComPhySataPowerUp: stage: MAC configuration - power down ComPhy\n"));
>  
> -  ComPhySataMacPowerDown (Desc->AhciBaseAddresses[SataHostId]);
> +  ComPhySataMacPowerDown (Desc[ChipId].SoC->AhciBaseAddress);
>  
>    DEBUG((DEBUG_INFO, "ComPhy: stage: RFU configurations - hard reset ComPhy\n"));
>  
> @@ -1183,7 +1167,7 @@ ComPhySataPowerUp (
>  
>    DEBUG((DEBUG_INFO, "ComPhy: stage: ComPhy power up\n"));
>  
> -  ComPhySataPhyPowerUp (Desc->AhciBaseAddresses[SataHostId]);
> +  ComPhySataPhyPowerUp (Desc[ChipId].SoC->AhciBaseAddress);
>  
>    DEBUG((DEBUG_INFO, "ComPhy: stage: Check PLL\n"));
>  
> @@ -1884,6 +1868,8 @@ ComPhyCp110Init (
>    EFI_STATUS Status;
>    COMPHY_MAP *PtrComPhyMap, *SerdesMap;
>    EFI_PHYSICAL_ADDRESS ComPhyBaseAddr, HpipeBaseAddr;
> +  MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
> +  MV_BOARD_AHCI_DESC *AhciBoardDesc;
>    UINT32 ComPhyMaxCount, Lane;
>    UINT32 PcieWidth = 0;
>    UINT8 ChipId;
> @@ -1927,11 +1913,29 @@ ComPhyCp110Init (
>        break;
>      case COMPHY_TYPE_SATA0:
>      case COMPHY_TYPE_SATA1:
> -      Status = ComPhySataPowerUp (Lane, HpipeBaseAddr, ComPhyBaseAddr, MVHW_CP0_AHCI0_ID);
> -      break;
>      case COMPHY_TYPE_SATA2:
>      case COMPHY_TYPE_SATA3:
> -      Status = ComPhySataPowerUp (Lane, HpipeBaseAddr, ComPhyBaseAddr, MVHW_CP1_AHCI0_ID);
> +      /* Obtain AHCI board description */
> +      Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
> +                      NULL,
> +                      (VOID **)&BoardDescProtocol);
> +      if (EFI_ERROR (Status)) {
> +        break;
> +      }
> +
> +      Status = BoardDescProtocol->BoardDescAhciGet (BoardDescProtocol,
> +                                    &AhciBoardDesc);
> +      if (EFI_ERROR (Status)) {
> +        break;
> +      }
> +
> +      Status = ComPhySataPowerUp (ChipId,
> +                 Lane,
> +                 HpipeBaseAddr,
> +                 ComPhyBaseAddr,
> +                 AhciBoardDesc);
> +
> +      BoardDescProtocol->BoardDescFree (AhciBoardDesc);
>        break;
>      case COMPHY_TYPE_USB3_HOST0:
>      case COMPHY_TYPE_USB3_HOST1:
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 15/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:11:55PM +0200, Marcin Wojtas wrote:
> This patch introduces new library callback (ArmadaSoCDescComPhyGet ()),
> which dynamically allocates and fills MV_SOC_COMPHY_DESC structure with
> the SoC description of ComPhy SerDes controllers.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h |  8 +++++
>  Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                             | 20 ++++++++++++
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 33 ++++++++++++++++++++
>  3 files changed, 61 insertions(+)
> 
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> index 94fd6fa..f372ca0 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> @@ -30,6 +30,14 @@
>  #define MV_SOC_AHCI_ID(Cp)               ((Cp) % 2)
>  
>  //
> +// Platform description of ComPhy controllers
> +//
> +#define MV_SOC_COMPHY_BASE(Cp)           (MV_SOC_CP_BASE ((Cp)) + 0x441000)
> +#define MV_SOC_HPIPE3_BASE(Cp)           (MV_SOC_CP_BASE ((Cp)) + 0x120000)
> +#define MV_SOC_COMPHY_LANE_COUNT         6
> +#define MV_SOC_COMPHY_MUX_BITS           4
> +
> +//
>  // Platform description of PP2 NIC
>  //
>  #define MV_SOC_PP2_BASE(Cp)              MV_SOC_CP_BASE ((Cp))
> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> index 3b29d78..a133d1c 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> @@ -14,9 +14,29 @@
>  #ifndef __ARMADA_SOC_DESC_LIB_H__
>  #define __ARMADA_SOC_DESC_LIB_H__
>  
> +#include <Library/MvComPhyLib.h>
>  #include <Library/NonDiscoverableDeviceRegistrationLib.h>
>  
>  //
> +// ComPhy SoC description
> +//
> +typedef struct {
> +  UINTN ComPhyId;
> +  UINTN ComPhyBaseAddress;
> +  UINTN ComPhyHpipe3BaseAddress;
> +  UINTN ComPhyLaneCount;
> +  UINTN ComPhyMuxBitCount;
> +  MV_COMPHY_CHIP_TYPE ComPhyChipType;
> +} MV_SOC_COMPHY_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescComPhyGet (
> +  IN OUT MV_SOC_COMPHY_DESC  **ComPhyDesc,
> +  IN OUT UINTN                *DescCount
> +  );
> +
> +//
>  // NonDiscoverable devices SoC description
>  //
>  // AHCI
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> index 97fe3f8..580c0f4 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> @@ -30,6 +30,39 @@
>  
>  EFI_STATUS
>  EFIAPI
> +ArmadaSoCDescComPhyGet (
> +  IN OUT MV_SOC_COMPHY_DESC  **ComPhyDesc,
> +  IN OUT UINTN                *DescCount
> +  )
> +{
> +  MV_SOC_COMPHY_DESC *Desc;
> +  UINTN CpCount, CpIndex;
> +
> +  CpCount = FixedPcdGet8 (PcdMaxCpCount);
> +
> +  Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_COMPHY_DESC));
> +  if (Desc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> +    Desc[CpIndex].ComPhyBaseAddress = MV_SOC_COMPHY_BASE (CpIndex);
> +    Desc[CpIndex].ComPhyHpipe3BaseAddress = MV_SOC_HPIPE3_BASE (CpIndex);
> +    Desc[CpIndex].ComPhyLaneCount = MV_SOC_COMPHY_LANE_COUNT;
> +    Desc[CpIndex].ComPhyMuxBitCount = MV_SOC_COMPHY_MUX_BITS;
> +    Desc[CpIndex].ComPhyChipType = MvComPhyTypeCp110;
> +    Desc[CpIndex].ComPhyId = CpIndex;
> +  }
> +
> +  *ComPhyDesc = Desc;
> +  *DescCount = CpCount;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +EFIAPI
>  ArmadaSoCDescAhciGet (
>    IN OUT MV_SOC_AHCI_DESC  **AhciDesc,
>    IN OUT UINTN              *DescCount
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 16/25] Marvell/Drivers: MvBoardDesc: Extend protocol with ComPhy support

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:11:56PM +0200, Marcin Wojtas wrote:
> Introduce new callback that can provide information
> about ComPhy controllers to the ComPhyLib.
> 
> Extend ArmadaBoardDescLib with new structure MV_BOARD_COMPHY_DESC,
> for holding board specific data. In further steps it can
> be extended and replace PCD SerDes lanes' representation with the
> appropriate structures.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf |  1 +
>  Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h |  8 +++
>  Silicon/Marvell/Include/Protocol/BoardDesc.h         |  8 +++
>  Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c   | 64 ++++++++++++++++++++
>  4 files changed, 81 insertions(+)
> 
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> index cc0d9d4..dea99fd 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> @@ -57,6 +57,7 @@
>    gMarvellBoardDescProtocolGuid
>  
>  [Pcd]
> +  gMarvellTokenSpaceGuid.PcdComPhyDevices
>    gMarvellTokenSpaceGuid.PcdPciEAhci
>    gMarvellTokenSpaceGuid.PcdPciESdhci
>    gMarvellTokenSpaceGuid.PcdPciEXhci
> diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> index 7e4fa4d..32bd915 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> @@ -17,6 +17,14 @@
>  #include <Library/ArmadaSoCDescLib.h>
>  
>  //
> +// COMPHY controllers per-board description
> +//
> +typedef struct {
> +  MV_SOC_COMPHY_DESC *SoC;
> +  UINTN               ComPhyDevCount;
> +} MV_BOARD_COMPHY_DESC;
> +
> +//
>  // NonDiscoverableDevices per-board description
>  //
>  
> diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> index edf9491..b6dac75 100644
> --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
> +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> @@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL;
>  
>  typedef
>  EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_COMPHY_GET) (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_COMPHY_DESC    **ComPhyDesc
> +  );
> +
> +typedef
> +EFI_STATUS
>  (EFIAPI *MV_BOARD_DESC_AHCI_GET) (
>    IN MARVELL_BOARD_DESC_PROTOCOL  *This,
>    IN OUT MV_BOARD_AHCI_DESC      **AhciDesc
> @@ -84,6 +91,7 @@ VOID
>  
>  struct _MARVELL_BOARD_DESC_PROTOCOL {
>    MV_BOARD_DESC_AHCI_GET         BoardDescAhciGet;
> +  MV_BOARD_DESC_COMPHY_GET       BoardDescComPhyGet;
>    MV_BOARD_DESC_PP2_GET          BoardDescPp2Get;
>    MV_BOARD_DESC_SDMMC_GET        BoardDescSdMmcGet;
>    MV_BOARD_DESC_UTMI_GET         BoardDescUtmiGet;
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> index 3439017..6bbe40b 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> @@ -37,6 +37,69 @@ MV_BOARD_DESC *mBoardDescInstance;
>  
>  STATIC
>  EFI_STATUS
> +MvBoardDescComPhyGet (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_COMPHY_DESC    **ComPhyDesc
> +  )
> +{
> +  UINT8 *ComPhyDeviceEnabled;
> +  UINTN ComPhyCount, ComPhyDeviceTableSize, ComPhyIndex, Index;
> +  MV_BOARD_COMPHY_DESC *BoardDesc;
> +  MV_SOC_COMPHY_DESC *SoCDesc;
> +  EFI_STATUS Status;
> +
> +  /* Get SoC data about all available ComPhy controllers */
> +  Status = ArmadaSoCDescComPhyGet (&SoCDesc, &ComPhyCount);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
> +  }
> +
> +  /*
> +   * Obtain table with enabled ComPhy controllers
> +   * which is represented as an array of UINT8 values
> +   * (0x0 - disabled, 0x1 enabled).
> +   */
> +  ComPhyDeviceEnabled = PcdGetPtr (PcdComPhyDevices);
> +  if (ComPhyDeviceEnabled == NULL) {
> +    /* No ComPhy controllers declared */
> +    return EFI_NOT_FOUND;
> +  }
> +
> +  ComPhyDeviceTableSize = PcdGetSize (PcdComPhyDevices);
> +
> +  /* Check if PCD with ComPhy is correctly defined */
> +  if (ComPhyDeviceTableSize > ComPhyCount) {
> +    DEBUG ((DEBUG_ERROR, "%a: Wrong PcdComPhyDevices format\n", __FUNCTION__));
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
> +  /* Allocate and fill board description */
> +  BoardDesc = AllocateZeroPool (ComPhyDeviceTableSize * sizeof (MV_BOARD_COMPHY_DESC));
> +  if (BoardDesc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  ComPhyIndex = 0;
> +  for (Index = 0; Index < ComPhyDeviceTableSize; Index++) {
> +    if (!ComPhyDeviceEnabled[Index]) {
> +      DEBUG ((DEBUG_ERROR, "%a: Skip ComPhy controller %d\n", __FUNCTION__, Index));
> +      continue;
> +    }
> +
> +    BoardDesc[ComPhyIndex].SoC = &SoCDesc[Index];
> +    ComPhyIndex++;
> +  }
> +
> +  BoardDesc->ComPhyDevCount = ComPhyIndex;
> +
> +  *ComPhyDesc = BoardDesc;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
>  MvBoardDescAhciGet (
>    IN MARVELL_BOARD_DESC_PROTOCOL  *This,
>    IN OUT MV_BOARD_AHCI_DESC      **AhciDesc
> @@ -392,6 +455,7 @@ MvBoardDescInitProtocol (
>    )
>  {
>    BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
> +  BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet;
>    BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
>    BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
>    BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 17/25] Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:11:57PM +0200, Marcin Wojtas wrote:
> MvComPhyLib library used to get Armada7k8k SerDes multiplexing
> controller description from hardcoded values stored in the header
> file MvHwDescLib.h. As a result it is very hard to support other
> Armada SoC families with this library.
> 
> This patch updates the library, so that it can obtain the
> description from newly introduced MARVELL_BOARD_DESC protocol,
> and removes the dependency on the hardcoded structures.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Silicon/Marvell/Include/Library/MvHwDescLib.h | 39 -----------
>  Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c | 74 ++++++++++++--------
>  2 files changed, 45 insertions(+), 68 deletions(-)
> 
> diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> index 9f383f4..423ca17 100644
> --- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
> +++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> @@ -35,8 +35,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  #ifndef __MVHWDESCLIB_H__
>  #define __MVHWDESCLIB_H__
>  
> -#include <Library/MvComPhyLib.h>
> -
>  //
>  // Helper macros
>  //
> @@ -45,20 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  #define MVHW_DEV_ENABLED(type, index) (type ## DeviceTable[index])
>  
>  //
> -// CommonPhy devices description template definition
> -//
> -#define MVHW_MAX_COMPHY_DEVS       4
> -
> -typedef struct {
> -  UINT8 ComPhyDevCount;
> -  UINTN ComPhyBaseAddresses[MVHW_MAX_COMPHY_DEVS];
> -  UINTN ComPhyHpipe3BaseAddresses[MVHW_MAX_COMPHY_DEVS];
> -  UINTN ComPhyLaneCount[MVHW_MAX_COMPHY_DEVS];
> -  UINTN ComPhyMuxBitCount[MVHW_MAX_COMPHY_DEVS];
> -  MV_COMPHY_CHIP_TYPE ComPhyChipType[MVHW_MAX_COMPHY_DEVS];
> -} MVHW_COMPHY_DESC;
> -
> -//
>  // I2C devices description template definition
>  //
>  #define MVHW_MAX_I2C_DEVS         4
> @@ -79,29 +63,6 @@ typedef struct {
>  } MVHW_MDIO_DESC;
>  
>  //
> -// Platform description of CommonPhy devices
> -//
> -#define MVHW_CP0_COMPHY_BASE       0xF2441000
> -#define MVHW_CP0_HPIPE3_BASE       0xF2120000
> -#define MVHW_CP0_COMPHY_LANES      6
> -#define MVHW_CP0_COMPHY_MUX_BITS   4
> -#define MVHW_CP1_COMPHY_BASE       0xF4441000
> -#define MVHW_CP1_HPIPE3_BASE       0xF4120000
> -#define MVHW_CP1_COMPHY_LANES      6
> -#define MVHW_CP1_COMPHY_MUX_BITS   4
> -
> -#define DECLARE_A7K8K_COMPHY_TEMPLATE \
> -STATIC \
> -MVHW_COMPHY_DESC mA7k8kComPhyDescTemplate = {\
> -  2,\
> -  { MVHW_CP0_COMPHY_BASE, MVHW_CP1_COMPHY_BASE },\
> -  { MVHW_CP0_HPIPE3_BASE, MVHW_CP1_HPIPE3_BASE },\
> -  { MVHW_CP0_COMPHY_LANES, MVHW_CP1_COMPHY_LANES },\
> -  { MVHW_CP0_COMPHY_MUX_BITS, MVHW_CP1_COMPHY_MUX_BITS },\
> -  { MvComPhyTypeCp110, MvComPhyTypeCp110 }\
> -}
> -
> -//
>  // Platform description of I2C devices
>  //
>  #define MVHW_CP0_I2C0_BASE       0xF2701000
> diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
> index b03bc35..2ef9af4 100644
> --- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
> +++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
> @@ -34,9 +34,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  
>  #include "ComPhyLib.h"
>  #include <Library/MvComPhyLib.h>
> -#include <Library/MvHwDescLib.h>
> -
> -DECLARE_A7K8K_COMPHY_TEMPLATE;
>  
>  CHAR16 * TypeStringTable [] = {L"unconnected", L"PCIE0", L"PCIE1", L"PCIE2",
>                             L"PCIE3", L"SATA0", L"SATA1", L"SATA2", L"SATA3",
> @@ -182,22 +179,20 @@ VOID
>  InitComPhyConfig (
>    IN  OUT  CHIP_COMPHY_CONFIG *ChipConfig,
>    IN  OUT  PCD_LANE_MAP       *LaneData,
> -  IN       UINT8               Id
> +  IN       MV_BOARD_COMPHY_DESC *Desc
>    )
>  {
> -  MVHW_COMPHY_DESC *Desc = &mA7k8kComPhyDescTemplate;
> -
> -  ChipConfig->ChipType = Desc->ComPhyChipType[Id];
> -  ChipConfig->ComPhyBaseAddr = Desc->ComPhyBaseAddresses[Id];
> -  ChipConfig->Hpipe3BaseAddr = Desc->ComPhyHpipe3BaseAddresses[Id];
> -  ChipConfig->LanesCount = Desc->ComPhyLaneCount[Id];
> -  ChipConfig->MuxBitCount = Desc->ComPhyMuxBitCount[Id];
> -  ChipConfig->ChipId = Id;
> +  ChipConfig->ChipType = Desc->SoC->ComPhyChipType;
> +  ChipConfig->ComPhyBaseAddr = Desc->SoC->ComPhyBaseAddress;
> +  ChipConfig->Hpipe3BaseAddr = Desc->SoC->ComPhyHpipe3BaseAddress;
> +  ChipConfig->LanesCount = Desc->SoC->ComPhyLaneCount;
> +  ChipConfig->MuxBitCount = Desc->SoC->ComPhyMuxBitCount;
> +  ChipConfig->ChipId = Desc->SoC->ComPhyId;
>  
>    /*
>     * Below macro contains variable name concatenation (used to form PCD's name).
>     */
> -  switch (Id) {
> +  switch (ChipConfig->ChipId) {
>    case 0:
>      GetComPhyPcd (LaneData, 0);
>      break;
> @@ -219,32 +214,49 @@ MvComPhyInit (
>    )
>  {
>    EFI_STATUS Status;
> -  CHIP_COMPHY_CONFIG ChipConfig[MVHW_MAX_COMPHY_DEVS], *PtrChipCfg;
> -  PCD_LANE_MAP LaneData[MVHW_MAX_COMPHY_DEVS];
> +  CHIP_COMPHY_CONFIG *ChipConfig, *PtrChipCfg;
> +  MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
> +  MV_BOARD_COMPHY_DESC *ComPhyBoardDesc;
> +  PCD_LANE_MAP *LaneData;
>    UINT32 Lane, MaxComphyCount;
> -  UINT8 *ComPhyDeviceTable, Index;
> +  UINTN Index;
>  
>    /* Obtain table with enabled ComPhy devices */
> -  ComPhyDeviceTable = (UINT8 *)PcdGetPtr (PcdComPhyDevices);
> -  if (ComPhyDeviceTable == NULL) {
> -    DEBUG ((DEBUG_ERROR, "Missing PcdComPhyDevices\n"));
> -    return EFI_INVALID_PARAMETER;
> +  Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
> +                  NULL,
> +                  (VOID **)&BoardDescProtocol);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
> +  }
> +
> +  Status = BoardDescProtocol->BoardDescComPhyGet (BoardDescProtocol,
> +                                &ComPhyBoardDesc);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
>    }
>  
> -  if (PcdGetSize (PcdComPhyDevices) > MVHW_MAX_COMPHY_DEVS) {
> -    DEBUG ((DEBUG_ERROR, "Wrong PcdComPhyDevices format\n"));
> -    return EFI_INVALID_PARAMETER;
> +  ChipConfig = AllocateZeroPool (ComPhyBoardDesc->ComPhyDevCount *
> +                                 sizeof (CHIP_COMPHY_CONFIG));
> +  if (ChipConfig == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    BoardDescProtocol->BoardDescFree (ComPhyBoardDesc);
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  LaneData = AllocateZeroPool (ComPhyBoardDesc->ComPhyDevCount *
> +                               sizeof (PCD_LANE_MAP));
> +  if (ChipConfig == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    BoardDescProtocol->BoardDescFree (ComPhyBoardDesc);
> +    FreePool (ChipConfig);
> +    return EFI_OUT_OF_RESOURCES;
>    }
>  
>    /* Initialize enabled chips */
> -  for (Index = 0; Index < PcdGetSize (PcdComPhyDevices); Index++) {
> -    if (!MVHW_DEV_ENABLED (ComPhy, Index)) {
> -      DEBUG ((DEBUG_ERROR, "Skip ComPhy chip %d\n", Index));
> -      continue;
> -    }
> +  for (Index = 0; Index < ComPhyBoardDesc->ComPhyDevCount; Index++) {
>  
>      PtrChipCfg = &ChipConfig[Index];
> -    InitComPhyConfig(PtrChipCfg, LaneData, Index);
> +    InitComPhyConfig (PtrChipCfg, LaneData, &ComPhyBoardDesc[Index]);
>  
>      /* Get the count of the SerDes of the specific chip */
>      MaxComphyCount = PtrChipCfg->LanesCount;
> @@ -275,5 +287,9 @@ MvComPhyInit (
>      PtrChipCfg->Init (PtrChipCfg);
>    }
>  
> +  BoardDescProtocol->BoardDescFree (ComPhyBoardDesc);
> +  FreePool (ChipConfig);
> +  FreePool (LaneData);
> +
>    return EFI_SUCCESS;
>  }
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 18/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:11:58PM +0200, Marcin Wojtas wrote:
> This patch introduces new library callback (ArmadaSoCDescMdioGet ()),
> which dynamically allocates and fills MV_SOC_MDIO_DESC structure with
> the SoC description of Mdio controllers.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h |  6 ++++
>  Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                             | 15 ++++++++++
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 29 ++++++++++++++++++++
>  3 files changed, 50 insertions(+)
> 
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> index f372ca0..c864f94 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> @@ -38,6 +38,12 @@
>  #define MV_SOC_COMPHY_MUX_BITS           4
>  
>  //
> +// Platform description of MDIO controllers
> +//
> +#define MV_SOC_MDIO_BASE(Cp)             (MV_SOC_CP_BASE ((Cp)) + 0x12A200)

Still pointless double parentheses around this Cp :)
Save that for a single patch later on, as commented on earlier patch
in set.
(This version already fixes the bug.)

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> +#define MV_SOC_MDIO_ID(Cp)               (Cp)
> +
> +//
>  // Platform description of PP2 NIC
>  //
>  #define MV_SOC_PP2_BASE(Cp)              MV_SOC_CP_BASE ((Cp))
> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> index a133d1c..304d068 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> @@ -37,6 +37,21 @@ ArmadaSoCDescComPhyGet (
>    );
>  
>  //
> +// MDIO
> +//
> +typedef struct {
> +  UINTN MdioId;
> +  UINTN MdioBaseAddress;
> +} MV_SOC_MDIO_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescMdioGet (
> +  IN OUT MV_SOC_MDIO_DESC  **MdioDesc,
> +  IN OUT UINTN              *DescCount
> +  );
> +
> +//
>  // NonDiscoverable devices SoC description
>  //
>  // AHCI
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> index 580c0f4..652677f 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> @@ -63,6 +63,35 @@ ArmadaSoCDescComPhyGet (
>  
>  EFI_STATUS
>  EFIAPI
> +ArmadaSoCDescMdioGet (
> +  IN OUT MV_SOC_MDIO_DESC  **MdioDesc,
> +  IN OUT UINTN              *DescCount
> +  )
> +{
> +  MV_SOC_MDIO_DESC *Desc;
> +  UINTN CpCount, CpIndex;
> +
> +  CpCount = FixedPcdGet8 (PcdMaxCpCount);
> +
> +  Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_MDIO_DESC));
> +  if (Desc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> +    Desc[CpIndex].MdioId = MV_SOC_MDIO_ID (CpIndex);
> +    Desc[CpIndex].MdioBaseAddress = MV_SOC_MDIO_BASE (CpIndex);
> +  }
> +
> +  *MdioDesc = Desc;
> +  *DescCount = CpCount;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +EFIAPI
>  ArmadaSoCDescAhciGet (
>    IN OUT MV_SOC_AHCI_DESC  **AhciDesc,
>    IN OUT UINTN              *DescCount
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 18/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information

[Marcin Wojtas]

2018-06-18 18:23 GMT+02:00 Leif Lindholm <leif.lindholm@linaro.org>:
> On Sun, Jun 17, 2018 at 10:11:58PM +0200, Marcin Wojtas wrote:
>> This patch introduces new library callback (ArmadaSoCDescMdioGet ()),
>> which dynamically allocates and fills MV_SOC_MDIO_DESC structure with
>> the SoC description of Mdio controllers.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
>> ---
>>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h |  6 ++++
>>  Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                             | 15 ++++++++++
>>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 29 ++++++++++++++++++++
>>  3 files changed, 50 insertions(+)
>>
>> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
>> index f372ca0..c864f94 100644
>> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
>> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
>> @@ -38,6 +38,12 @@
>>  #define MV_SOC_COMPHY_MUX_BITS           4
>>
>>  //
>> +// Platform description of MDIO controllers
>> +//
>> +#define MV_SOC_MDIO_BASE(Cp)             (MV_SOC_CP_BASE ((Cp)) + 0x12A200)
>
> Still pointless double parentheses around this Cp :)
> Save that for a single patch later on, as commented on earlier patch
> in set.
> (This version already fixes the bug.)

I can quickly update each patch, unless you really wish to do it
separately. Please confirm your preferences.

Thanks,
Marcin

>
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
>> +#define MV_SOC_MDIO_ID(Cp)               (Cp)
>> +
>> +//
>>  // Platform description of PP2 NIC
>>  //
>>  #define MV_SOC_PP2_BASE(Cp)              MV_SOC_CP_BASE ((Cp))
>> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
>> index a133d1c..304d068 100644
>> --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
>> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
>> @@ -37,6 +37,21 @@ ArmadaSoCDescComPhyGet (
>>    );
>>
>>  //
>> +// MDIO
>> +//
>> +typedef struct {
>> +  UINTN MdioId;
>> +  UINTN MdioBaseAddress;
>> +} MV_SOC_MDIO_DESC;
>> +
>> +EFI_STATUS
>> +EFIAPI
>> +ArmadaSoCDescMdioGet (
>> +  IN OUT MV_SOC_MDIO_DESC  **MdioDesc,
>> +  IN OUT UINTN              *DescCount
>> +  );
>> +
>> +//
>>  // NonDiscoverable devices SoC description
>>  //
>>  // AHCI
>> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
>> index 580c0f4..652677f 100644
>> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
>> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
>> @@ -63,6 +63,35 @@ ArmadaSoCDescComPhyGet (
>>
>>  EFI_STATUS
>>  EFIAPI
>> +ArmadaSoCDescMdioGet (
>> +  IN OUT MV_SOC_MDIO_DESC  **MdioDesc,
>> +  IN OUT UINTN              *DescCount
>> +  )
>> +{
>> +  MV_SOC_MDIO_DESC *Desc;
>> +  UINTN CpCount, CpIndex;
>> +
>> +  CpCount = FixedPcdGet8 (PcdMaxCpCount);
>> +
>> +  Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_MDIO_DESC));
>> +  if (Desc == NULL) {
>> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
>> +    return EFI_OUT_OF_RESOURCES;
>> +  }
>> +
>> +  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
>> +    Desc[CpIndex].MdioId = MV_SOC_MDIO_ID (CpIndex);
>> +    Desc[CpIndex].MdioBaseAddress = MV_SOC_MDIO_BASE (CpIndex);
>> +  }
>> +
>> +  *MdioDesc = Desc;
>> +  *DescCount = CpCount;
>> +
>> +  return EFI_SUCCESS;
>> +}
>> +
>> +EFI_STATUS
>> +EFIAPI
>>  ArmadaSoCDescAhciGet (
>>    IN OUT MV_SOC_AHCI_DESC  **AhciDesc,
>>    IN OUT UINTN              *DescCount
>> --
>> 2.7.4
>>

Re: [platforms: PATCH v2 19/25] Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:11:59PM +0200, Marcin Wojtas wrote:
> Introduce new callback that can provide information
> about MDIO controllers to the Mdio driver.
> 
> Extend ArmadaBoardDescLib with new structure MV_BOARD_MDIO_DESC,
> for holding board specific data.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h |  8 +++++
>  Silicon/Marvell/Include/Protocol/BoardDesc.h         |  8 +++++
>  Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c   | 36 ++++++++++++++++++++
>  3 files changed, 52 insertions(+)
> 
> diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> index 32bd915..b11fa9d 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> @@ -25,6 +25,14 @@ typedef struct {
>  } MV_BOARD_COMPHY_DESC;
>  
>  //
> +// MDIO devices per-board description
> +//
> +typedef struct {
> +  MV_SOC_MDIO_DESC *SoC;
> +  UINTN             MdioDevCount;
> +} MV_BOARD_MDIO_DESC;
> +
> +//
>  // NonDiscoverableDevices per-board description
>  //
>  
> diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> index b6dac75..55297f5 100644
> --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
> +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> @@ -50,6 +50,13 @@ EFI_STATUS
>  
>  typedef
>  EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_MDIO_GET) (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_MDIO_DESC      **MdioDesc
> +  );
> +
> +typedef
> +EFI_STATUS
>  (EFIAPI *MV_BOARD_DESC_AHCI_GET) (
>    IN MARVELL_BOARD_DESC_PROTOCOL  *This,
>    IN OUT MV_BOARD_AHCI_DESC      **AhciDesc
> @@ -92,6 +99,7 @@ VOID
>  struct _MARVELL_BOARD_DESC_PROTOCOL {
>    MV_BOARD_DESC_AHCI_GET         BoardDescAhciGet;
>    MV_BOARD_DESC_COMPHY_GET       BoardDescComPhyGet;
> +  MV_BOARD_DESC_MDIO_GET         BoardDescMdioGet;
>    MV_BOARD_DESC_PP2_GET          BoardDescPp2Get;
>    MV_BOARD_DESC_SDMMC_GET        BoardDescSdMmcGet;
>    MV_BOARD_DESC_UTMI_GET         BoardDescUtmiGet;
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> index 6bbe40b..5dfc559 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> @@ -100,6 +100,41 @@ MvBoardDescComPhyGet (
>  
>  STATIC
>  EFI_STATUS
> +MvBoardDescMdioGet (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_MDIO_DESC      **MdioDesc
> +  )
> +{
> +  MV_BOARD_MDIO_DESC *BoardDesc;
> +  MV_SOC_MDIO_DESC *SoCDesc;
> +  UINTN MdioCount, Index;
> +  EFI_STATUS Status;
> +
> +  /* Get SoC data about all available MDIO controllers */
> +  Status = ArmadaSoCDescMdioGet (&SoCDesc, &MdioCount);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
> +  }
> +
> +  /* Allocate and fill board description */
> +  BoardDesc = AllocateZeroPool (MdioCount * sizeof (MV_BOARD_MDIO_DESC));
> +  if (BoardDesc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  for (Index = 0; Index < MdioCount; Index++) {
> +    BoardDesc[Index].SoC = &SoCDesc[Index];
> +  }
> +
> +  BoardDesc->MdioDevCount = MdioCount;
> +  *MdioDesc = BoardDesc;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
>  MvBoardDescAhciGet (
>    IN MARVELL_BOARD_DESC_PROTOCOL  *This,
>    IN OUT MV_BOARD_AHCI_DESC      **AhciDesc
> @@ -456,6 +491,7 @@ MvBoardDescInitProtocol (
>  {
>    BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
>    BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet;
> +  BoardDescProtocol->BoardDescMdioGet = MvBoardDescMdioGet;
>    BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
>    BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
>    BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 22/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:12:02PM +0200, Marcin Wojtas wrote:
> This patch introduces new library callback (ArmadaSoCDescI2cGet ()),
> which dynamically allocates and fills MV_SOC_I2C_DESC structure with
> the SoC description of I2c controllers.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h |  6 ++++
>  Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                             | 15 ++++++++++
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 31 ++++++++++++++++++++
>  3 files changed, 52 insertions(+)
> 
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> index c864f94..b1219c4 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> @@ -38,6 +38,12 @@
>  #define MV_SOC_COMPHY_MUX_BITS           4
>  
>  //
> +// Platform description of I2C controllers
> +//
> +#define MV_SOC_I2C_PER_CP_COUNT          2
> +#define MV_SOC_I2C_BASE(I2c)             (0x701000 + ((I2c) * 0x100))
> +
> +//
>  // Platform description of MDIO controllers
>  //
>  #define MV_SOC_MDIO_BASE(Cp)             (MV_SOC_CP_BASE ((Cp)) + 0x12A200)
> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> index 304d068..d2bcf2a 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> @@ -37,6 +37,21 @@ ArmadaSoCDescComPhyGet (
>    );
>  
>  //
> +// I2C
> +//
> +typedef struct {
> +  UINTN I2cId;
> +  UINTN I2cBaseAddress;
> +} MV_SOC_I2C_DESC;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaSoCDescI2cGet (
> +  IN OUT MV_SOC_I2C_DESC  **I2cDesc,
> +  IN OUT UINTN             *DescCount
> +  );
> +
> +//
>  // MDIO
>  //
>  typedef struct {
> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> index 652677f..6ce6bad 100644
> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> @@ -63,6 +63,37 @@ ArmadaSoCDescComPhyGet (
>  
>  EFI_STATUS
>  EFIAPI
> +ArmadaSoCDescI2cGet (
> +  IN OUT MV_SOC_I2C_DESC  **I2cDesc,
> +  IN OUT UINTN             *DescCount
> +  )
> +{
> +  MV_SOC_I2C_DESC *Desc;
> +  UINTN CpCount, CpIndex, Index;
> +
> +  CpCount = FixedPcdGet8 (PcdMaxCpCount);
> +
> +  *DescCount = CpCount * MV_SOC_I2C_PER_CP_COUNT;
> +  Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_I2C_DESC));
> +  if (Desc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  *I2cDesc = Desc;
> +
> +  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> +    for (Index = 0; Index < MV_SOC_I2C_PER_CP_COUNT; Index++) {
> +      Desc->I2cBaseAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_I2C_BASE (Index);
> +      Desc++;
> +    }
> +  }
> +
> +  return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +EFIAPI
>  ArmadaSoCDescMdioGet (
>    IN OUT MV_SOC_MDIO_DESC  **MdioDesc,
>    IN OUT UINTN              *DescCount
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 23/25] Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:12:03PM +0200, Marcin Wojtas wrote:
> Introduce new callback that can provide information
> about I2C controllers to the I2c driver.
> 
> Extend ArmadaBoardDescLib with new structure MV_BOARD_I2C_DESC,
> for holding board specific data. In further steps it should
> be extended and replace PCD I2C devices' representation with the
> appropriate structures.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf |  1 +
>  Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h |  8 +++
>  Silicon/Marvell/Include/Protocol/BoardDesc.h         |  8 +++
>  Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c   | 66 ++++++++++++++++++++
>  4 files changed, 83 insertions(+)
> 
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> index dea99fd..41f72d6 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
> @@ -58,6 +58,7 @@
>  
>  [Pcd]
>    gMarvellTokenSpaceGuid.PcdComPhyDevices
> +  gMarvellTokenSpaceGuid.PcdI2cControllersEnabled
>    gMarvellTokenSpaceGuid.PcdPciEAhci
>    gMarvellTokenSpaceGuid.PcdPciESdhci
>    gMarvellTokenSpaceGuid.PcdPciEXhci
> diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> index b11fa9d..ee8e06e 100644
> --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
> @@ -25,6 +25,14 @@ typedef struct {
>  } MV_BOARD_COMPHY_DESC;
>  
>  //
> +// I2C devices per-board description
> +//
> +typedef struct {
> +  MV_SOC_I2C_DESC *SoC;
> +  UINTN            I2cDevCount;
> +} MV_BOARD_I2C_DESC;
> +
> +//
>  // MDIO devices per-board description
>  //
>  typedef struct {
> diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> index 55297f5..1d57a16 100644
> --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
> +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
> @@ -50,6 +50,13 @@ EFI_STATUS
>  
>  typedef
>  EFI_STATUS
> +(EFIAPI *MV_BOARD_DESC_I2C_GET) (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_I2C_DESC       **I2cDesc
> +  );
> +
> +typedef
> +EFI_STATUS
>  (EFIAPI *MV_BOARD_DESC_MDIO_GET) (
>    IN MARVELL_BOARD_DESC_PROTOCOL  *This,
>    IN OUT MV_BOARD_MDIO_DESC      **MdioDesc
> @@ -99,6 +106,7 @@ VOID
>  struct _MARVELL_BOARD_DESC_PROTOCOL {
>    MV_BOARD_DESC_AHCI_GET         BoardDescAhciGet;
>    MV_BOARD_DESC_COMPHY_GET       BoardDescComPhyGet;
> +  MV_BOARD_DESC_I2C_GET          BoardDescI2cGet;
>    MV_BOARD_DESC_MDIO_GET         BoardDescMdioGet;
>    MV_BOARD_DESC_PP2_GET          BoardDescPp2Get;
>    MV_BOARD_DESC_SDMMC_GET        BoardDescSdMmcGet;
> diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> index 5dfc559..39dc06c 100644
> --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
> @@ -100,6 +100,71 @@ MvBoardDescComPhyGet (
>  
>  STATIC
>  EFI_STATUS
> +MvBoardDescI2cGet (
> +  IN MARVELL_BOARD_DESC_PROTOCOL  *This,
> +  IN OUT MV_BOARD_I2C_DESC       **I2cDesc
> +  )
> +{
> +  UINT8 *I2cDeviceEnabled;
> +  UINTN I2cCount, I2cDeviceEnabledSize, I2cIndex, Index;
> +  MV_BOARD_I2C_DESC *BoardDesc;
> +  MV_SOC_I2C_DESC *SoCDesc;
> +  EFI_STATUS Status;
> +
> +  /* Get SoC data about all available I2C controllers */
> +  Status = ArmadaSoCDescI2cGet (&SoCDesc, &I2cCount);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
> +  }
> +
> +  /*
> +   * Obtain table with enabled I2C controllers
> +   * which is represented as an array of UINT8 values
> +   * (0x0 - disabled, 0x1 enabled).
> +   */
> +  I2cDeviceEnabled = PcdGetPtr (PcdI2cControllersEnabled);
> +  if (I2cDeviceEnabled == NULL) {
> +    /* No I2C on platform */
> +    return EFI_SUCCESS;
> +  }
> +
> +  I2cDeviceEnabledSize = PcdGetSize (PcdI2cControllersEnabled);
> +
> +  /* Check if PCD with I2C controllers is correctly defined */
> +  if (I2cDeviceEnabledSize > I2cCount) {
> +    DEBUG ((DEBUG_ERROR,
> +      "%a: Wrong PcdI2cControllersEnabled format\n",
> +      __FUNCTION__));
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
> +  /* Allocate and fill board description */
> +  BoardDesc = AllocateZeroPool (I2cDeviceEnabledSize * sizeof (MV_BOARD_I2C_DESC));
> +  if (BoardDesc == NULL) {
> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> +    return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  I2cIndex = 0;
> +  for (Index = 0; Index < I2cDeviceEnabledSize; Index++) {
> +    if (!I2cDeviceEnabled[Index]) {
> +      DEBUG ((DEBUG_INFO, "%a: Skip I2c controller %d\n", __FUNCTION__, Index));
> +      continue;
> +    }
> +
> +    BoardDesc[I2cIndex].SoC = &SoCDesc[Index];
> +    I2cIndex++;
> +  }
> +
> +  BoardDesc->I2cDevCount = I2cIndex;
> +
> +  *I2cDesc = BoardDesc;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +STATIC
> +EFI_STATUS
>  MvBoardDescMdioGet (
>    IN MARVELL_BOARD_DESC_PROTOCOL  *This,
>    IN OUT MV_BOARD_MDIO_DESC      **MdioDesc
> @@ -491,6 +556,7 @@ MvBoardDescInitProtocol (
>  {
>    BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
>    BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet;
> +  BoardDescProtocol->BoardDescI2cGet = MvBoardDescI2cGet;
>    BoardDescProtocol->BoardDescMdioGet = MvBoardDescMdioGet;
>    BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
>    BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 24/25] Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:12:04PM +0200, Marcin Wojtas wrote:
> MvI2cDxe driver used to get Armada7k8k controller description
> from hardcoded values stored in the header file MvHwDescLib.h.
> As a result it is very hard to support other
> Armada SoC families with this driver.
> 
> This patch updates the driver, so that it can obtain the
> description from newly introduced MARVELL_BOARD_DESC protocol,
> and removes the dependency on the hardcoded structures.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf |  1 +
>  Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c   | 37 +++++++++-----------
>  2 files changed, 18 insertions(+), 20 deletions(-)
> 
> diff --git a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
> index a7cf52e..0eef350 100755
> --- a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
> +++ b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
> @@ -61,6 +61,7 @@
>    gEfiDevicePathProtocolGuid
>    gEfiI2cEnumerateProtocolGuid
>    gEfiI2cBusConfigurationManagementProtocolGuid
> +  gMarvellBoardDescProtocolGuid
>  
>  [Pcd]
>    gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses
> diff --git a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
> index d6f590d..9ec4929 100755
> --- a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
> +++ b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
> @@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  
>  *******************************************************************************/
>  
> +#include <Protocol/BoardDesc.h>
>  #include <Protocol/I2cMaster.h>
>  #include <Protocol/I2cEnumerate.h>
>  #include <Protocol/I2cBusConfigurationManagement.h>
> @@ -43,13 +44,10 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  #include <Library/PcdLib.h>
>  #include <Library/UefiLib.h>
>  #include <Library/MemoryAllocationLib.h>
> -#include <Library/MvHwDescLib.h>
>  #include <Library/UefiBootServicesTableLib.h>
>  
>  #include "MvI2cDxe.h"
>  
> -DECLARE_A7K8K_I2C_TEMPLATE;
> -
>  STATIC MV_I2C_BAUD_RATE baud_rate;
>  
>  STATIC MV_I2C_DEVICE_PATH MvI2cDevicePathProtocol = {
> @@ -174,38 +172,37 @@ MvI2cInitialise (
>    IN EFI_SYSTEM_TABLE  *SystemTable
>    )
>  {
> -  MVHW_I2C_DESC *Desc = &mA7k8kI2cDescTemplate;
> -  UINT8 *I2cDeviceTable, Index;
> +  MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
> +  MV_BOARD_I2C_DESC *Desc;
>    EFI_STATUS Status;
> +  UINTN Index;
>  
> -  /* Obtain table with enabled I2c devices */
> -  I2cDeviceTable = (UINT8 *)PcdGetPtr (PcdI2cControllersEnabled);
> -  if (I2cDeviceTable == NULL) {
> -    DEBUG ((DEBUG_ERROR, "Missing PcdI2cControllersEnabled\n"));
> -    return EFI_INVALID_PARAMETER;
> +  /* Obtain list of available controllers */
> +  Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid,
> +                  NULL,
> +                  (VOID **)&BoardDescProtocol);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
>    }
>  
> -  if (PcdGetSize (PcdI2cControllersEnabled) > MVHW_MAX_I2C_DEVS) {
> -    DEBUG ((DEBUG_ERROR, "Wrong PcdI2cControllersEnabled format\n"));
> -    return EFI_INVALID_PARAMETER;
> +  Status = BoardDescProtocol->BoardDescI2cGet (BoardDescProtocol, &Desc);
> +  if (EFI_ERROR (Status)) {
> +    return Status;
>    }
>  
>    /* Initialize enabled chips */
> -  for (Index = 0; Index < PcdGetSize (PcdI2cControllersEnabled); Index++) {
> -    if (!MVHW_DEV_ENABLED (I2c, Index)) {
> -      DEBUG ((DEBUG_ERROR, "Skip I2c chip %d\n", Index));
> -      continue;
> -    }
> -
> +  for (Index = 0; Index < Desc->I2cDevCount; Index++) {
>      Status = MvI2cInitialiseController(
>          ImageHandle,
>          SystemTable,
> -        Desc->I2cBaseAddresses[Index]
> +        Desc[Index].SoC->I2cBaseAddress
>          );
>      if (EFI_ERROR(Status))
>        return Status;
>    }
>  
> +  BoardDescProtocol->BoardDescFree (Desc);
> +
>    return EFI_SUCCESS;
>  }
>  
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 25/25] Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency

[Leif Lindholm]

On Sun, Jun 17, 2018 at 10:12:05PM +0200, Marcin Wojtas wrote:
> Finally, after switching to new MV_BOARD_DESC solution
> in all drivers, stop using MvHwDescLib.h by its last user
> and safely remove this header.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

Right, that's me done with v2.

/
    Leif

> ---
>  Silicon/Marvell/Include/Library/MvHwDescLib.h   | 70 --------------------
>  Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c |  4 +-
>  2 files changed, 2 insertions(+), 72 deletions(-)
>  delete mode 100644 Silicon/Marvell/Include/Library/MvHwDescLib.h
> 
> diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
> deleted file mode 100644
> index 0de435d..0000000
> --- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
> +++ /dev/null
> @@ -1,70 +0,0 @@
> -/********************************************************************************
> -Copyright (C) 2017 Marvell International Ltd.
> -
> -Marvell BSD License Option
> -
> -If you received this File from Marvell, you may opt to use, redistribute and/or
> -modify this File under the following licensing terms.
> -Redistribution and use in source and binary forms, with or without modification,
> -are permitted provided that the following conditions are met:
> -
> -* Redistributions of source code must retain the above copyright notice,
> -  this list of conditions and the following disclaimer.
> -
> -* Redistributions in binary form must reproduce the above copyright
> -  notice, this list of conditions and the following disclaimer in the
> -  documentation and/or other materials provided with the distribution.
> -
> -* Neither the name of Marvell nor the names of its contributors may be
> -  used to endorse or promote products derived from this software without
> -  specific prior written permission.
> -
> -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
> -ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
> -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> -(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> -LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
> -ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> -SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> -
> -*******************************************************************************/
> -
> -#ifndef __MVHWDESCLIB_H__
> -#define __MVHWDESCLIB_H__
> -
> -//
> -// Helper macros
> -//
> -
> -// Check if device is enabled - it expects PCD to be read to '<type>DeviceTable' array
> -#define MVHW_DEV_ENABLED(type, index) (type ## DeviceTable[index])
> -
> -//
> -// I2C devices description template definition
> -//
> -#define MVHW_MAX_I2C_DEVS         4
> -
> -typedef struct {
> -  UINT8 I2cDevCount;
> -  UINTN I2cBaseAddresses[MVHW_MAX_I2C_DEVS];
> -} MVHW_I2C_DESC;
> -
> -//
> -// Platform description of I2C devices
> -//
> -#define MVHW_CP0_I2C0_BASE       0xF2701000
> -#define MVHW_CP0_I2C1_BASE       0xF2701100
> -#define MVHW_CP1_I2C0_BASE       0xF4701000
> -#define MVHW_CP1_I2C1_BASE       0xF4701100
> -
> -#define DECLARE_A7K8K_I2C_TEMPLATE \
> -STATIC \
> -MVHW_I2C_DESC mA7k8kI2cDescTemplate = {\
> -  4,\
> -  { MVHW_CP0_I2C0_BASE, MVHW_CP0_I2C1_BASE, MVHW_CP1_I2C0_BASE, MVHW_CP1_I2C1_BASE }\
> -}
> -
> -#endif /* __MVHWDESCLIB_H__ */
> diff --git a/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c b/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
> index dd2edae..9be0489 100644
> --- a/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
> +++ b/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
> @@ -41,7 +41,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  #include <Library/DebugLib.h>
>  #include <Library/IoLib.h>
>  #include <Library/MemoryAllocationLib.h>
> -#include <Library/MvHwDescLib.h>
>  #include <Library/PcdLib.h>
>  #include <Library/UefiBootServicesTableLib.h>
>  #include <Library/UefiLib.h>
> @@ -380,7 +379,8 @@ MvPhyInit (
>    MdioIndex = Phy2MdioController[PhyIndex];
>  
>    /* Verify correctness of PHY <-> MDIO assignment */
> -  if (!MVHW_DEV_ENABLED (Mdio, MdioIndex) || MdioIndex >= Mdio->ControllerCount) {
> +  if ((MdioDeviceTable[MdioIndex] == 0) ||
> +      (MdioIndex >= Mdio->ControllerCount)) {
>      DEBUG ((DEBUG_ERROR, "MvPhyDxe: Incorrect Mdio controller assignment for PHY#%d", PhyIndex));
>      return EFI_INVALID_PARAMETER;
>    }
> -- 
> 2.7.4
> 

Re: [platforms: PATCH v2 01/25] Marvell/Library: Introduce ArmadaSoCDescLib class

[Leif Lindholm]

On Mon, Jun 18, 2018 at 05:58:42PM +0200, Marcin Wojtas wrote:
> Hi Leif,
> 
> 2018-06-18 17:44 GMT+02:00 Leif Lindholm <leif.lindholm@linaro.org>:
> > On Sun, Jun 17, 2018 at 10:11:41PM +0200, Marcin Wojtas wrote:
> >> From: jinghua <jinghua@marvell.com>
> >>
> >> ArmadaSoCDescLib is a per SoC family library, which provides SoC
> >> description, like register base of some hardware module controller,
> >> COMPHY/I2C/NETWORK etc., which right now is hardcoded in MvHwDescLib.h.
> >> There will be a new protocol, which gets SoC description from this
> >> library, and provides board description based on enable/disable
> >> values of each hardware module controller in dsc file.
> >>
> >> As a first example implement obtaining UTMI controllers information.
> >> Remaining interfaces will be added in follow-up commits.
> >> This patch introduces new library callback (ArmadaSoCDescUtmiGet ()),
> >> which dynamically allocates and fills MV_SOC_UTMI_DESC structure,
> >> SoC description of UTMI PHYs. A new PCD is introduced (PcdMaxCpCount)
> >> which stores maximal amount of CP110 blocks in the SoC family.
> >>
> >> Contributed-under: TianoCore Contribution Agreement 1.1
> >> Signed-off-by: jinghua <jinghua@marvell.com>
> >
> > Several of these pre-existing Signed-off-by remain in this set. I did
> > only comment it on 2/25, but it remains there as well.
> 
> As I understood, the problem was 'Reviewed-by' from internal review -
> all those were dropped. So far when the commit was authored by someone
> else (at least in OpenPlatformPkg times) we used to leave the
> authorship and authors 'Signed-off-by' - in such case I had to add my
> own Signed-off-by, as I was sending this to the lists.

We may have been poor at communicating (and if so I apologise) and
potentially on spotting this before,  but we did mean both. You are
the one contributing this to the project, so we need your sign-off
that the code is actually under the license you say it is and that you
are permitted to contribute it.

Including Jinghua's Signed-off-by on initial submission is effectively
you saying "Jinghua says this is fine to distribute under this
license", which is nice and all but untraceable and hence of no legal
value.

Jinghua's effort get recognised by the Author tag because you've kept
them in the From: field.

Now, if you and Jinghua were playing tag team and sending different
sets that got merged together, then sure. We treat Signed-off-by
(nearly) exactly like Linux. We may not be as stringent on explicitly
mentioning ourselves as signing off on changes we may make on pushing.

I see a few patches in the tree where you and Ard have been working
together in public, and then the multiple signed-off-by make sense.

You will also note that the bulk import I did to edk2-platforms does
not come with any other Signed-off-by than my own. It does come with a
commit message pointing to where I got everything from.

Best Regards,

Leif

> > Please send a v3 with this addressed across all patches.
> > But please wait until I've had a chance to go through this set.
> > When you do so, this one has
> > Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> >
> > I will comment explicitly on all such patches in this set, apart from
> > the one where I already gave Reviewed-by (but please delete all other
> > signed-off-bys than your own from those as well).
> 
> I will update  according to your wish and the new policy.
>
> Best regards,
> Marcin
> 
> > /
> >     Leif
> >
> >> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> >> ---
> >>  Silicon/Marvell/Marvell.dec                                                      |  4 ++
> >>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf | 37 +++++++++++
> >>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h   | 35 +++++++++++
> >>  Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                               | 33 ++++++++++
> >>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c   | 65 ++++++++++++++++++++
> >>  5 files changed, 174 insertions(+)
> >>  create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
> >>  create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> >>  create mode 100644 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> >>  create mode 100644 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> >>
> >> diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
> >> index be74b4e..2a92eff 100644
> >> --- a/Silicon/Marvell/Marvell.dec
> >> +++ b/Silicon/Marvell/Marvell.dec
> >> @@ -60,6 +60,7 @@
> >>    gMarvellSpiFlashDxeGuid = { 0x49d7fb74, 0x306d, 0x42bd, { 0x94, 0xc8, 0xc0, 0xc5, 0x4b, 0x18, 0x1d, 0xd7 } }
> >>
> >>  [LibraryClasses]
> >> +  ArmadaSoCDescLib|Include/Library/ArmadaSoCDescLib.h
> >>    SampleAtResetLib|Include/Library/SampleAtResetLib.h
> >>
> >>  [Protocols]
> >> @@ -68,6 +69,9 @@
> >>    gMarvellPlatformInitCompleteProtocolGuid = { 0x465b8cf7, 0x016f, 0x4ba6, { 0xbe, 0x6b, 0x28, 0x0e, 0x3a, 0x7d, 0x38, 0x6f } }
> >>
> >>  [PcdsFixedAtBuild.common]
> >> +#Board description
> >> +  gMarvellTokenSpaceGuid.PcdMaxCpCount|0x2|UINT8|0x30000072
> >> +
> >>  #MPP
> >>    gMarvellTokenSpaceGuid.PcdMppChipCount|0|UINT32|0x30000001
> >>
> >> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
> >> new file mode 100644
> >> index 0000000..2b73b73
> >> --- /dev/null
> >> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
> >> @@ -0,0 +1,37 @@
> >> +## @file
> >> +#
> >> +#  Copyright (C) 2018, Marvell International Ltd. and its affiliates<BR>
> >> +#
> >> +#  This program and the accompanying materials are licensed and made available
> >> +#  under the terms and conditions of the BSD License which accompanies this
> >> +#  distribution. The full text of the license may be found at
> >> +#  http://opensource.org/licenses/bsd-license.php
> >> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> >> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> >> +#  IMPLIED.
> >> +#
> >> +##
> >> +
> >> +[Defines]
> >> +  INF_VERSION                    = 0x0001001A
> >> +  BASE_NAME                      = Armada7k8kDescLib
> >> +  FILE_GUID                      = c64f0048-4ca3-4573-b0a6-c2e9e6457285
> >> +  MODULE_TYPE                    = BASE
> >> +  VERSION_STRING                 = 1.0
> >> +  LIBRARY_CLASS                  = ArmadaSoCDescLib
> >> +
> >> +[Sources]
> >> +  Armada7k8kSoCDescLib.c
> >> +
> >> +[Packages]
> >> +  MdeModulePkg/MdeModulePkg.dec
> >> +  MdePkg/MdePkg.dec
> >> +  Silicon/Marvell/Marvell.dec
> >> +
> >> +[LibraryClasses]
> >> +  DebugLib
> >> +  IoLib
> >> +  PcdLib
> >> +
> >> +[FixedPcd]
> >> +  gMarvellTokenSpaceGuid.PcdMaxCpCount
> >> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> >> new file mode 100644
> >> index 0000000..c5711b0
> >> --- /dev/null
> >> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> >> @@ -0,0 +1,35 @@
> >> +/**
> >> +*
> >> +*  Copyright (C) 2018, Marvell International Ltd. and its affiliates.
> >> +*
> >> +*  This program and the accompanying materials are licensed and made available
> >> +*  under the terms and conditions of the BSD License which accompanies this
> >> +*  distribution. The full text of the license may be found at
> >> +*  http://opensource.org/licenses/bsd-license.php
> >> +*
> >> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> >> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> >> +*
> >> +*  Glossary - abbreviations used in Marvell SampleAtReset library implementation:
> >> +*  AP - Application Processor hardware block (Armada 7k8k incorporates AP806)
> >> +*  CP - South Bridge hardware blocks (Armada 7k8k incorporates CP110)
> >> +**/
> >> +
> >> +#ifndef __ARMADA7K8K_SOC_DESC_LIB_H__
> >> +#define __ARMADA7K8K_SOC_DESC_LIB_H__
> >> +
> >> +//
> >> +// Common macros
> >> +//
> >> +#define MV_SOC_CP_BASE(Cp)               (0xF2000000 + ((Cp) * 0x2000000))
> >> +
> >> +//
> >> +// Platform description of UTMI PHY's
> >> +//
> >> +#define MV_SOC_UTMI_PER_CP_COUNT         2
> >> +#define MV_SOC_UTMI_ID(Utmi)             (Utmi)
> >> +#define MV_SOC_UTMI_BASE(Utmi)           (0x580000 + ((Utmi) * 0x1000))
> >> +#define MV_SOC_UTMI_CFG_BASE             0x440440
> >> +#define MV_SOC_UTMI_USB_CFG_BASE         0x440420
> >> +
> >> +#endif
> >> diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> >> new file mode 100644
> >> index 0000000..0d45684
> >> --- /dev/null
> >> +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
> >> @@ -0,0 +1,33 @@
> >> +/**
> >> +*
> >> +*  Copyright (C) 2018, Marvell International Ltd. and its affiliates
> >> +*
> >> +*  This program and the accompanying materials are licensed and made available
> >> +*  under the terms and conditions of the BSD License which accompanies this
> >> +*  distribution. The full text of the license may be found at
> >> +*  http://opensource.org/licenses/bsd-license.php
> >> +*
> >> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> >> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> >> +*
> >> +**/
> >> +#ifndef __ARMADA_SOC_DESC_LIB_H__
> >> +#define __ARMADA_SOC_DESC_LIB_H__
> >> +
> >> +//
> >> +// UTMI PHY devices SoC description
> >> +//
> >> +typedef struct {
> >> +  UINT8 UtmiPhyId;
> >> +  UINTN UtmiBaseAddress;
> >> +  UINTN UtmiConfigAddress;
> >> +  UINTN UsbConfigAddress;
> >> +} MV_SOC_UTMI_DESC;
> >> +
> >> +EFI_STATUS
> >> +EFIAPI
> >> +ArmadaSoCDescUtmiGet (
> >> +  IN OUT MV_SOC_UTMI_DESC  **UtmiDesc,
> >> +  IN OUT UINTN              *DescCount
> >> +  );
> >> +#endif /* __ARMADA_SOC_DESC_LIB_H__ */
> >> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> >> new file mode 100644
> >> index 0000000..63fb224
> >> --- /dev/null
> >> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
> >> @@ -0,0 +1,65 @@
> >> +/**
> >> +*
> >> +*  Copyright (C) 2018, Marvell International Ltd. and its affiliates.
> >> +*
> >> +*  This program and the accompanying materials are licensed and made available
> >> +*  under the terms and conditions of the BSD License which accompanies this
> >> +*  distribution. The full text of the license may be found at
> >> +*  http://opensource.org/licenses/bsd-license.php
> >> +*
> >> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> >> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> >> +*
> >> +*  Glossary - abbreviations used in Marvell SampleAtReset library implementation:
> >> +*  AP - Application Processor hardware block (Armada 7k8k incorporates AP806)
> >> +*  CP - South Bridge hardware blocks (Armada 7k8k incorporates CP110)
> >> +**/
> >> +
> >> +#include <Uefi.h>
> >> +
> >> +#include <Library/BaseMemoryLib.h>
> >> +#include <Library/DebugLib.h>
> >> +#include <Library/IoLib.h>
> >> +#include <Library/MemoryAllocationLib.h>
> >> +#include <Library/PcdLib.h>
> >> +#include <Library/UefiBootServicesTableLib.h>
> >> +
> >> +#include <Protocol/BoardDesc.h>
> >> +
> >> +#include "Armada7k8kSoCDescLib.h"
> >> +
> >> +EFI_STATUS
> >> +EFIAPI
> >> +ArmadaSoCDescUtmiGet (
> >> +  IN OUT MV_SOC_UTMI_DESC  **UtmiDesc,
> >> +  IN OUT UINTN              *DescCount
> >> +  )
> >> +{
> >> +  MV_SOC_UTMI_DESC *Desc;
> >> +  UINTN CpCount, CpIndex, Index, UtmiIndex;
> >> +
> >> +  CpCount = FixedPcdGet8 (PcdMaxCpCount);
> >> +
> >> +  *DescCount = CpCount * MV_SOC_UTMI_PER_CP_COUNT;
> >> +  Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_UTMI_DESC));
> >> +  if (Desc == NULL) {
> >> +    DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
> >> +    return EFI_OUT_OF_RESOURCES;
> >> +  }
> >> +
> >> +  *UtmiDesc = Desc;
> >> +
> >> +  UtmiIndex = 0;
> >> +  for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
> >> +    for (Index = 0; Index < MV_SOC_UTMI_PER_CP_COUNT; Index++) {
> >> +      Desc->UtmiPhyId = MV_SOC_UTMI_ID (UtmiIndex);
> >> +      Desc->UtmiBaseAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_BASE (Index);
> >> +      Desc->UtmiConfigAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_CFG_BASE;
> >> +      Desc->UsbConfigAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_UTMI_USB_CFG_BASE;
> >> +      Desc++;
> >> +      UtmiIndex++;
> >> +    }
> >> +  }
> >> +
> >> +  return EFI_SUCCESS;
> >> +}
> >> --
> >> 2.7.4
> >>

Re: [platforms: PATCH v2 18/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information

[Leif Lindholm]

On Mon, Jun 18, 2018 at 06:27:47PM +0200, Marcin Wojtas wrote:
> 2018-06-18 18:23 GMT+02:00 Leif Lindholm <leif.lindholm@linaro.org>:
> > On Sun, Jun 17, 2018 at 10:11:58PM +0200, Marcin Wojtas wrote:
> >> This patch introduces new library callback (ArmadaSoCDescMdioGet ()),
> >> which dynamically allocates and fills MV_SOC_MDIO_DESC structure with
> >> the SoC description of Mdio controllers.
> >>
> >> Contributed-under: TianoCore Contribution Agreement 1.1
> >> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> >> ---
> >>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h |  6 ++++
> >>  Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h                             | 15 ++++++++++
> >>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 29 ++++++++++++++++++++
> >>  3 files changed, 50 insertions(+)
> >>
> >> diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> >> index f372ca0..c864f94 100644
> >> --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> >> +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
> >> @@ -38,6 +38,12 @@
> >>  #define MV_SOC_COMPHY_MUX_BITS           4
> >>
> >>  //
> >> +// Platform description of MDIO controllers
> >> +//
> >> +#define MV_SOC_MDIO_BASE(Cp)             (MV_SOC_CP_BASE ((Cp)) + 0x12A200)
> >
> > Still pointless double parentheses around this Cp :)
> > Save that for a single patch later on, as commented on earlier patch
> > in set.
> > (This version already fixes the bug.)
> 
> I can quickly update each patch, unless you really wish to do it
> separately. Please confirm your preferences.

Ah, right, I got it in my head this file existed before this series,
but that isn't the case. Sure, if you can update them all on initial
introduction, that'd be nice.

Best Regards,

Leif