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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id q75-v6sm387272lfq.47.2018.06.17.13.12.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 17 Jun 2018 13:12:45 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com Date: Sun, 17 Jun 2018 22:11:56 +0200 Message-Id: <1529266325-18371-17-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529266325-18371-1-git-send-email-mw@semihalf.com> References: <1529266325-18371-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH v2 16/25] Marvell/Drivers: MvBoardDesc: Extend protocol with ComPhy support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 17 Jun 2018 20:12:48 -0000 Introduce new callback that can provide information about ComPhy controllers to the ComPhyLib. Extend ArmadaBoardDescLib with new structure MV_BOARD_COMPHY_DESC, for holding board specific data. In further steps it can be extended and replace PCD SerDes lanes' representation with the appropriate structures. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 + Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 8 +++ Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++ Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 64 ++++++++++++++++++++ 4 files changed, 81 insertions(+) diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf index cc0d9d4..dea99fd 100644 --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf @@ -57,6 +57,7 @@ gMarvellBoardDescProtocolGuid [Pcd] + gMarvellTokenSpaceGuid.PcdComPhyDevices gMarvellTokenSpaceGuid.PcdPciEAhci gMarvellTokenSpaceGuid.PcdPciESdhci gMarvellTokenSpaceGuid.PcdPciEXhci diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h index 7e4fa4d..32bd915 100644 --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h @@ -17,6 +17,14 @@ #include // +// COMPHY controllers per-board description +// +typedef struct { + MV_SOC_COMPHY_DESC *SoC; + UINTN ComPhyDevCount; +} MV_BOARD_COMPHY_DESC; + +// // NonDiscoverableDevices per-board description // diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell/Include/Protocol/BoardDesc.h index edf9491..b6dac75 100644 --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h @@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOARD_DESC_PROTOCOL; typedef EFI_STATUS +(EFIAPI *MV_BOARD_DESC_COMPHY_GET) ( + IN MARVELL_BOARD_DESC_PROTOCOL *This, + IN OUT MV_BOARD_COMPHY_DESC **ComPhyDesc + ); + +typedef +EFI_STATUS (EFIAPI *MV_BOARD_DESC_AHCI_GET) ( IN MARVELL_BOARD_DESC_PROTOCOL *This, IN OUT MV_BOARD_AHCI_DESC **AhciDesc @@ -84,6 +91,7 @@ VOID struct _MARVELL_BOARD_DESC_PROTOCOL { MV_BOARD_DESC_AHCI_GET BoardDescAhciGet; + MV_BOARD_DESC_COMPHY_GET BoardDescComPhyGet; MV_BOARD_DESC_PP2_GET BoardDescPp2Get; MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet; MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet; diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c index 3439017..6bbe40b 100644 --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c @@ -37,6 +37,69 @@ MV_BOARD_DESC *mBoardDescInstance; STATIC EFI_STATUS +MvBoardDescComPhyGet ( + IN MARVELL_BOARD_DESC_PROTOCOL *This, + IN OUT MV_BOARD_COMPHY_DESC **ComPhyDesc + ) +{ + UINT8 *ComPhyDeviceEnabled; + UINTN ComPhyCount, ComPhyDeviceTableSize, ComPhyIndex, Index; + MV_BOARD_COMPHY_DESC *BoardDesc; + MV_SOC_COMPHY_DESC *SoCDesc; + EFI_STATUS Status; + + /* Get SoC data about all available ComPhy controllers */ + Status = ArmadaSoCDescComPhyGet (&SoCDesc, &ComPhyCount); + if (EFI_ERROR (Status)) { + return Status; + } + + /* + * Obtain table with enabled ComPhy controllers + * which is represented as an array of UINT8 values + * (0x0 - disabled, 0x1 enabled). + */ + ComPhyDeviceEnabled = PcdGetPtr (PcdComPhyDevices); + if (ComPhyDeviceEnabled == NULL) { + /* No ComPhy controllers declared */ + return EFI_NOT_FOUND; + } + + ComPhyDeviceTableSize = PcdGetSize (PcdComPhyDevices); + + /* Check if PCD with ComPhy is correctly defined */ + if (ComPhyDeviceTableSize > ComPhyCount) { + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdComPhyDevices format\n", __FUNCTION__)); + return EFI_INVALID_PARAMETER; + } + + /* Allocate and fill board description */ + BoardDesc = AllocateZeroPool (ComPhyDeviceTableSize * sizeof (MV_BOARD_COMPHY_DESC)); + if (BoardDesc == NULL) { + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); + return EFI_OUT_OF_RESOURCES; + } + + ComPhyIndex = 0; + for (Index = 0; Index < ComPhyDeviceTableSize; Index++) { + if (!ComPhyDeviceEnabled[Index]) { + DEBUG ((DEBUG_ERROR, "%a: Skip ComPhy controller %d\n", __FUNCTION__, Index)); + continue; + } + + BoardDesc[ComPhyIndex].SoC = &SoCDesc[Index]; + ComPhyIndex++; + } + + BoardDesc->ComPhyDevCount = ComPhyIndex; + + *ComPhyDesc = BoardDesc; + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS MvBoardDescAhciGet ( IN MARVELL_BOARD_DESC_PROTOCOL *This, IN OUT MV_BOARD_AHCI_DESC **AhciDesc @@ -392,6 +455,7 @@ MvBoardDescInitProtocol ( ) { BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet; + BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet; BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get; BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet; BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet; -- 2.7.4