From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::242; helo=mail-lf0-x242.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf0-x242.google.com (mail-lf0-x242.google.com [IPv6:2a00:1450:4010:c07::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 01F0420972825 for ; Sun, 17 Jun 2018 13:12:53 -0700 (PDT) Received: by mail-lf0-x242.google.com with SMTP id i15-v6so21569800lfc.2 for ; Sun, 17 Jun 2018 13:12:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=8Gy3cHCMsm0ecmSBRI6IGHVj5v9VQ927WS3W+nixQpg=; b=KAPs/bsIDZjn2V/t8kRaO7tzgiCOH6oRuYI7A0d0i3HuIgOFrGcTuqePdvEZS6jjuC juzWgNIUiRpksJmjjh8QJvNC1emvOo0nvai46SafTfmV5w4wumE6RsNcduFzdG9KOjav G8S6r3qOYWLS8f+OOn/CmGMs/E3xg8XDSMdHlRc/S9ouYznS/6oZrQOdxN46cOBm4qh5 jwYn+R5igPKhwP9kojSZsE3N0he1WOGYJBEF1Yl39NcYPHKdul71CKTN48hIs1O5P5Ss Cdx8mo3znA4d848IOZoa7z9y5cxzub47J5LXrTjiCvKd7NnGgPnQcEBreov9jcfJYwFm dN4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8Gy3cHCMsm0ecmSBRI6IGHVj5v9VQ927WS3W+nixQpg=; b=Kul8OaVeCZMAkZlKawgUzN17Pjkydajsxp0JD8Tp774fvQdj2TDUXgOYiPqItexHTz OhPk/olN+Jtzr0IiaowubmCfC+z12LIcJfEa6vkmlzcSyf+FxNkNXctsqjjTj5yvKSJS t06+ABORPO1mhsGucSiTjjEvlE1a5iCjsWVivu+MD9oQDtdBLD0UCVLbHzDEXTpoFWK2 6ekwZKPCNaYj0VGhBtXnLPDyadiu4Wz8XHdzP5UoVcjbAoKUQ43FEjm4UU56tZLC4R4i Ut7RjIqg52d1hZENddK9C+3cdzQkmE+RmE2N3UfOAUpQ0yTKZ/gh8JV7VR5RaTKqrZde MJhw== X-Gm-Message-State: APt69E29STqH9YVV+3YwSUq9gNP/gNnnALum/fFfs788YkgPOLDq9W0e H2m4SzHMOu+W9Va/sQh5I9z6XK84RjU= X-Google-Smtp-Source: ADUXVKKql9kz3OYTJCnJMIqOTfB/lhtOWNc471pe0oC34NDKbmf2hfU9AttIVDHXZe0mHhPncOTAaw== X-Received: by 2002:a19:d405:: with SMTP id l5-v6mr4009732lfg.28.1529266371101; Sun, 17 Jun 2018 13:12:51 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id q75-v6sm387272lfq.47.2018.06.17.13.12.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 17 Jun 2018 13:12:50 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com Date: Sun, 17 Jun 2018 22:12:00 +0200 Message-Id: <1529266325-18371-21-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529266325-18371-1-git-send-email-mw@semihalf.com> References: <1529266325-18371-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH v2 20/25] Marvell/Drivers: MvMdioDxe: Enable 64bit addressing X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 17 Jun 2018 20:12:53 -0000 In order to be prepared for operating on registers in 64-bit address space, this patch adjusts the MDIO controllers base address array. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c index 12aabad..6c0a129 100644 --- a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c +++ b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c @@ -70,7 +70,7 @@ MdioCheckParam ( STATIC EFI_STATUS MdioWaitReady ( - UINT32 MdioBase + UINTN MdioBase ) { UINT32 Timeout = MVEBU_SMI_TIMEOUT; @@ -92,7 +92,7 @@ MdioWaitReady ( STATIC EFI_STATUS MdioWaitValid ( - UINT32 MdioBase + UINTN MdioBase ) { UINT32 Timeout = MVEBU_SMI_TIMEOUT; @@ -122,7 +122,7 @@ MdioOperation ( IN OUT UINT32 *Data ) { - UINT32 MdioBase = This->BaseAddresses[MdioIndex]; + UINTN MdioBase = This->BaseAddresses[MdioIndex]; UINT32 MdioReg; EFI_STATUS Status; -- 2.7.4