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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id q75-v6sm387272lfq.47.2018.06.17.13.12.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 17 Jun 2018 13:12:33 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com Date: Sun, 17 Jun 2018 22:11:46 +0200 Message-Id: <1529266325-18371-7-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529266325-18371-1-git-send-email-mw@semihalf.com> References: <1529266325-18371-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH v2 06/25] Marvell/Library: UtmiPhyLib: Switch to use MARVELL_BOARD_DESC protocol X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 17 Jun 2018 20:12:36 -0000 UTMI driver used to get Armada7k8k UTMI controller description from hardcoded values stored in the header file MvHwDescLib.h. As a result it is very hard to support other Armada SoC families with this driver. This patch updates the driver to get UTMI controller description from newly introduced MARVELL_BOARD_DESC protocol, and removes the dependency on the hardcoded structures. Use the protocol and pass information to further to the library init routine. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 1 - Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf | 9 ++- Silicon/Marvell/Include/Library/MvHwDescLib.h | 47 -------------- Silicon/Marvell/Include/Library/UtmiPhyLib.h | 2 + Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h | 5 ++ Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c | 65 +++++++------------- 6 files changed, 32 insertions(+), 97 deletions(-) diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf index d38b467..f2c173c 100644 --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf @@ -51,7 +51,6 @@ DebugLib MemoryAllocationLib MppLib - UtmiPhyLib [Sources.common] Armada7k8kLib.c diff --git a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf index 0876879..e2381f4 100644 --- a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf +++ b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf @@ -51,11 +51,10 @@ IoLib MemoryAllocationLib PcdLib + UefiBootServicesTableLib + +[Protocols] + gMarvellBoardDescProtocolGuid ## CONSUMES [Sources.common] UtmiPhyLib.c - -[Pcd] - gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled - gMarvellTokenSpaceGuid.PcdUtmiPortType - gMarvellTokenSpaceGuid.PcdPciEXhci diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h index 9ae03d0..e13814a 100644 --- a/Silicon/Marvell/Include/Library/MvHwDescLib.h +++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h @@ -127,19 +127,6 @@ typedef struct { } MVHW_RTC_DESC; // -// UTMI PHY's description template definition -// - -typedef struct { - UINT8 UtmiDevCount; - UINT32 UtmiPhyId[MVHW_MAX_XHCI_DEVS]; - UINTN UtmiBaseAddresses[MVHW_MAX_XHCI_DEVS]; - UINTN UtmiConfigAddresses[MVHW_MAX_XHCI_DEVS]; - UINTN UtmiUsbConfigAddresses[MVHW_MAX_XHCI_DEVS]; - UINTN UtmiMuxBitCount[MVHW_MAX_XHCI_DEVS]; -} MVHW_UTMI_DESC; - -// // Platform description of CommonPhy devices // #define MVHW_CP0_COMPHY_BASE 0xF2441000 @@ -253,38 +240,4 @@ MVHW_RTC_DESC mA7k8kRtcDescTemplate = {\ { SIZE_4KB, SIZE_4KB }\ } -// -// Platform description of UTMI PHY's -// -#define MVHW_CP0_UTMI0_BASE 0xF2580000 -#define MVHW_CP0_UTMI0_CFG_BASE 0xF2440440 -#define MVHW_CP0_UTMI0_USB_CFG_BASE 0xF2440420 -#define MVHW_CP0_UTMI0_ID 0x0 -#define MVHW_CP0_UTMI1_BASE 0xF2581000 -#define MVHW_CP0_UTMI1_CFG_BASE 0xF2440444 -#define MVHW_CP0_UTMI1_USB_CFG_BASE 0xF2440420 -#define MVHW_CP0_UTMI1_ID 0x1 -#define MVHW_CP1_UTMI0_BASE 0xF4580000 -#define MVHW_CP1_UTMI0_CFG_BASE 0xF4440440 -#define MVHW_CP1_UTMI0_USB_CFG_BASE 0xF4440420 -#define MVHW_CP1_UTMI0_ID 0x0 -#define MVHW_CP1_UTMI1_BASE 0xF4581000 -#define MVHW_CP1_UTMI1_CFG_BASE 0xF4440444 -#define MVHW_CP1_UTMI1_USB_CFG_BASE 0xF4440420 -#define MVHW_CP1_UTMI1_ID 0x1 - -#define DECLARE_A7K8K_UTMI_TEMPLATE \ -STATIC \ -MVHW_UTMI_DESC mA7k8kUtmiDescTemplate = {\ - 4,\ - { MVHW_CP0_UTMI0_ID, MVHW_CP0_UTMI1_ID,\ - MVHW_CP1_UTMI0_ID, MVHW_CP1_UTMI1_ID },\ - { MVHW_CP0_UTMI0_BASE, MVHW_CP0_UTMI1_BASE,\ - MVHW_CP1_UTMI0_BASE, MVHW_CP1_UTMI1_BASE },\ - { MVHW_CP0_UTMI0_CFG_BASE, MVHW_CP0_UTMI1_CFG_BASE,\ - MVHW_CP1_UTMI0_CFG_BASE, MVHW_CP1_UTMI1_CFG_BASE },\ - { MVHW_CP0_UTMI0_USB_CFG_BASE, MVHW_CP0_UTMI1_USB_CFG_BASE,\ - MVHW_CP1_UTMI0_USB_CFG_BASE, MVHW_CP1_UTMI1_USB_CFG_BASE }\ -} - #endif /* __MVHWDESCLIB_H__ */ diff --git a/Silicon/Marvell/Include/Library/UtmiPhyLib.h b/Silicon/Marvell/Include/Library/UtmiPhyLib.h index 7c62cba..6f4e355 100644 --- a/Silicon/Marvell/Include/Library/UtmiPhyLib.h +++ b/Silicon/Marvell/Include/Library/UtmiPhyLib.h @@ -35,6 +35,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #ifndef __UTMIPHYLIB_H__ #define __UTMIPHYLIB_H__ +#include + EFI_STATUS UtmiPhyInit ( VOID diff --git a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h index 0d7d72e..7e56f1a 100644 --- a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h +++ b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h @@ -35,6 +35,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #ifndef __UTMIPHY_H__ #define __UTMIPHY_H__ +#include + #include #include #include @@ -42,6 +44,9 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include #include #include +#include + +#include #define UTMI_USB_CFG_DEVICE_EN_OFFSET 0 #define UTMI_USB_CFG_DEVICE_EN_MASK (0x1 << UTMI_USB_CFG_DEVICE_EN_OFFSET) diff --git a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c index 2cd9cfa..cef1279 100644 --- a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c +++ b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c @@ -33,9 +33,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *******************************************************************************/ #include "UtmiPhyLib.h" -#include - -DECLARE_A7K8K_UTMI_TEMPLATE; typedef struct { EFI_PHYSICAL_ADDRESS UtmiBaseAddr; @@ -288,67 +285,47 @@ UtmiPhyInit ( VOID ) { + MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol; + MV_BOARD_UTMI_DESC *BoardDesc; UTMI_PHY_DATA UtmiData; - UINT8 *UtmiDeviceTable, *XhciDeviceTable, *UtmiPortType, Index; - MVHW_UTMI_DESC *Desc = &mA7k8kUtmiDescTemplate; - - /* Obtain table with enabled Utmi PHY's*/ - UtmiDeviceTable = (UINT8 *)PcdGetPtr (PcdUtmiControllersEnabled); - if (UtmiDeviceTable == NULL) { - /* No UTMI PHY on platform */ - return EFI_SUCCESS; - } - - if (PcdGetSize (PcdUtmiControllersEnabled) > MVHW_MAX_XHCI_DEVS) { - DEBUG ((DEBUG_ERROR, "UTMI: Wrong PcdUtmiControllersEnabled format\n")); - return EFI_INVALID_PARAMETER; - } + EFI_STATUS Status; + UINTN Index; - /* Make sure XHCI controllers table is present */ - XhciDeviceTable = (UINT8 *)PcdGetPtr (PcdPciEXhci); - if (XhciDeviceTable == NULL) { - DEBUG ((DEBUG_ERROR, "UTMI: Missing PcdPciEXhci\n")); - return EFI_INVALID_PARAMETER; + /* Obtain board description */ + Status = gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid, + NULL, + (VOID **)&BoardDescProtocol); + if (EFI_ERROR (Status)) { + return Status; } - /* Obtain port type table */ - UtmiPortType = (UINT8 *)PcdGetPtr (PcdUtmiPortType); - if (UtmiPortType == NULL || - PcdGetSize (PcdUtmiPortType) != PcdGetSize (PcdUtmiControllersEnabled)) { - DEBUG ((DEBUG_ERROR, "UTMI: Wrong PcdUtmiPortType format\n")); - return EFI_INVALID_PARAMETER; + Status = BoardDescProtocol->BoardDescUtmiGet (BoardDescProtocol, &BoardDesc); + if (EFI_ERROR (Status)) { + return Status; } /* Initialize enabled chips */ - for (Index = 0; Index < PcdGetSize (PcdUtmiControllersEnabled); Index++) { - if (!MVHW_DEV_ENABLED (Utmi, Index)) { - continue; - } - - /* UTMI PHY without enabled XHCI controller is useless */ - if (!MVHW_DEV_ENABLED (Xhci, Index)) { - DEBUG ((DEBUG_ERROR, "UTMI: Disabled Xhci controller %d\n", Index)); - return EFI_INVALID_PARAMETER; - } - + for (Index = 0; Index < BoardDesc->UtmiDevCount; Index++) { /* Get base address of UTMI phy */ - UtmiData.UtmiBaseAddr = Desc->UtmiBaseAddresses[Index]; + UtmiData.UtmiBaseAddr = BoardDesc[Index].SoC->UtmiBaseAddress; /* Get usb config address */ - UtmiData.UsbCfgAddr = Desc->UtmiUsbConfigAddresses[Index]; + UtmiData.UsbCfgAddr = BoardDesc[Index].SoC->UsbConfigAddress; /* Get UTMI config address */ - UtmiData.UtmiCfgAddr = Desc->UtmiConfigAddresses[Index]; + UtmiData.UtmiCfgAddr = BoardDesc[Index].SoC->UtmiConfigAddress; /* Get UTMI PHY ID */ - UtmiData.PhyId = Desc->UtmiPhyId[Index]; + UtmiData.PhyId = BoardDesc[Index].SoC->UtmiPhyId; /* Get the usb port type */ - UtmiData.UtmiPhyPort = UtmiPortType[Index]; + UtmiData.UtmiPhyPort = BoardDesc[Index].UtmiPortType; /* Currently only Cp110 is supported */ Cp110UtmiPhyInit (&UtmiData); } + BoardDescProtocol->BoardDescFree (BoardDesc); + return EFI_SUCCESS; } -- 2.7.4