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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id q75-v6sm387272lfq.47.2018.06.17.13.12.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 17 Jun 2018 13:12:35 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com Date: Sun, 17 Jun 2018 22:11:48 +0200 Message-Id: <1529266325-18371-9-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529266325-18371-1-git-send-email-mw@semihalf.com> References: <1529266325-18371-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH v2 08/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 17 Jun 2018 20:12:38 -0000 This patch introduces new library callback (ArmadaSoCDescPp2Get ()), which dynamically allocates and fills MV_SOC_PP2_DESC structure with the SoC description of PP2 NICs. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h | 6 ++++ Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h | 15 ++++++++++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 29 ++++++++++++++++++++ 3 files changed, 50 insertions(+) diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h index c5711b0..d63c3b5 100644 --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h @@ -24,6 +24,12 @@ #define MV_SOC_CP_BASE(Cp) (0xF2000000 + ((Cp) * 0x2000000)) // +// Platform description of PP2 NIC +// +#define MV_SOC_PP2_BASE(Cp) MV_SOC_CP_BASE ((Cp)) +#define MV_SOC_PP2_CLK_FREQ 333333333 + +// // Platform description of UTMI PHY's // #define MV_SOC_UTMI_PER_CP_COUNT 2 diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h index 0d45684..cafcc0f 100644 --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h @@ -15,6 +15,21 @@ #define __ARMADA_SOC_DESC_LIB_H__ // +// PP2 NIC devices SoC description +// +typedef struct { + UINTN Pp2BaseAddress; + UINTN Pp2ClockFrequency; +} MV_SOC_PP2_DESC; + +EFI_STATUS +EFIAPI +ArmadaSoCDescPp2Get ( + IN OUT MV_SOC_PP2_DESC **Pp2Desc, + IN OUT UINTN *DescCount + ); + +// // UTMI PHY devices SoC description // typedef struct { diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c index 63fb224..61b4e30 100644 --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c @@ -30,6 +30,35 @@ EFI_STATUS EFIAPI +ArmadaSoCDescPp2Get ( + IN OUT MV_SOC_PP2_DESC **Pp2Desc, + IN OUT UINTN *DescCount + ) +{ + MV_SOC_PP2_DESC *Desc; + UINTN CpCount, CpIndex; + + CpCount = FixedPcdGet8 (PcdMaxCpCount); + + Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_PP2_DESC)); + if (Desc == NULL) { + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); + return EFI_OUT_OF_RESOURCES; + } + + for (CpIndex = 0; CpIndex < CpCount; CpIndex++) { + Desc[CpIndex].Pp2BaseAddress = MV_SOC_PP2_BASE (CpIndex); + Desc[CpIndex].Pp2ClockFrequency = MV_SOC_PP2_CLK_FREQ; + } + + *Pp2Desc = Desc; + *DescCount = CpCount; + + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI ArmadaSoCDescUtmiGet ( IN OUT MV_SOC_UTMI_DESC **UtmiDesc, IN OUT UINTN *DescCount -- 2.7.4