From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::243; helo=mail-lf0-x243.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org Received: from mail-lf0-x243.google.com (mail-lf0-x243.google.com [IPv6:2a00:1450:4010:c07::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id EB7ED2110A3D0 for ; Mon, 18 Jun 2018 15:59:26 -0700 (PDT) Received: by mail-lf0-x243.google.com with SMTP id i15-v6so27174345lfc.2 for ; Mon, 18 Jun 2018 15:59:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=8Gy3cHCMsm0ecmSBRI6IGHVj5v9VQ927WS3W+nixQpg=; b=qBfrbueZvHHHUA7J7IQMYBbxT211HJdYnPnECSAOuUfZPdvJuKSAyVnDRj09+7hfiC Y4VtN1Wn18Z7aWAxwLfx9+q4HCMcQGiUqP5pgn6w+/Fzj+Dm1p3ANgeCRfuI3URT8QEh PWSM5IDZvki+Ly5rbCEHSTxAIcNORBw0T8MO8IhIKD5glxMs5rLErz238o6YIUl/VV9P T0Zx9nsgfqsc0zxyvmW1dJG6cihsSnDVl/iXlNIVhXFVJwdqcOaXhNK0gRQWZZ+tdnWv UgAch7Xk6/i5u6PXhArmS3oqsJ4NQh9RNCpvxZDF/pOl/mNiWJ5vX4hoPrzSkMVDIJE+ TCAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8Gy3cHCMsm0ecmSBRI6IGHVj5v9VQ927WS3W+nixQpg=; b=kSt4+A/3qERuQBHXUKjupw2si9VhWOZ1CbqKNvdl8NphH3BrSJraNqncijNB8xwTLd E3HgmOzqjmAvDQyKTArsA9hHeMzdQvJ9xnjhXTvJyyOMOv0GXHfuDXh73mvg9I2hTQ5B +/RgUdGrAJHOL/hQWTdYwMXty0gefULxwzN3N2Rq5xx+mzhIIvO+RRa7YcnrUcpoY7AZ 9QGkpE49QMIo2T311y2tBSukfvMkjjwTHtzm3Nx9anaDgNrfBWlsHnbsjAXEFoeN1OjE EcsxXzgOXZ4SnwxfOdRkBkOni2FVWmV4L1G0ilEm31GISrN2Yhcn3yDCMloi07N1pY5I Oz3g== X-Gm-Message-State: APt69E1q4eqIXlNuFPrfz2uOseT2i/JiJInQmVdeKwjon7X1lwGZoD8X mLbgMtipLX9O2zuKkDgvbfNdmEAc1WY= X-Google-Smtp-Source: ADUXVKJ29SowFo8k7yxzFXOmgDCYij9uk0KlTNrT5l0cOrCGDvCqVgmb5QzigAjk2Yes/29uidOTvQ== X-Received: by 2002:a2e:635b:: with SMTP id x88-v6mr9916812ljb.103.1529362765041; Mon, 18 Jun 2018 15:59:25 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id h136-v6sm3020754lfe.23.2018.06.18.15.59.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Jun 2018 15:59:24 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, nadavh@marvell.com, jinghua@marvell.com, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com Date: Tue, 19 Jun 2018 00:58:39 +0200 Message-Id: <1529362724-9244-21-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529362724-9244-1-git-send-email-mw@semihalf.com> References: <1529362724-9244-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH v3 20/25] Marvell/Drivers: MvMdioDxe: Enable 64bit addressing X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 18 Jun 2018 22:59:27 -0000 In order to be prepared for operating on registers in 64-bit address space, this patch adjusts the MDIO controllers base address array. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c index 12aabad..6c0a129 100644 --- a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c +++ b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c @@ -70,7 +70,7 @@ MdioCheckParam ( STATIC EFI_STATUS MdioWaitReady ( - UINT32 MdioBase + UINTN MdioBase ) { UINT32 Timeout = MVEBU_SMI_TIMEOUT; @@ -92,7 +92,7 @@ MdioWaitReady ( STATIC EFI_STATUS MdioWaitValid ( - UINT32 MdioBase + UINTN MdioBase ) { UINT32 Timeout = MVEBU_SMI_TIMEOUT; @@ -122,7 +122,7 @@ MdioOperation ( IN OUT UINT32 *Data ) { - UINT32 MdioBase = This->BaseAddresses[MdioIndex]; + UINTN MdioBase = This->BaseAddresses[MdioIndex]; UINT32 MdioReg; EFI_STATUS Status; -- 2.7.4