From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.20; helo=mga02.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6B2BF211F8864 for ; Thu, 28 Jun 2018 03:14:03 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:14:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,283,1526367600"; d="scan'208";a="241348798" Received: from shwdeopenpsi068.ccr.corp.intel.com ([10.239.158.46]) by fmsmga006.fm.intel.com with ESMTP; 28 Jun 2018 03:14:01 -0700 From: Star Zeng To: edk2-devel@lists.01.org Cc: Star Zeng , Amy Chan , Hong-chihX Hsueh , Jiewen Yao , Sami Mujawar , Ruiyu Ni , Hao Wu Date: Thu, 28 Jun 2018 18:13:58 +0800 Message-Id: <1530180838-174660-1-git-send-email-star.zeng@intel.com> X-Mailer: git-send-email 2.7.0.windows.1 Subject: [PATCH] MdeModulePkg SataControllerDxe: Calculate ChannelCount based on PI value X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 28 Jun 2018 10:14:03 -0000 Current code calculates ChannelCount based on CAP(NP) value. It only works when the ports implemented number are <= CAP(NP), for example, platform has CAP(NP) = 5 (means 6 ports) and ports implemented are 0, 1, 2, 3, 4 and 5. But we have some platform that has CAP(NP) = 1 (means 2 ports) and ports implemented are 1 and 2, and has no port 0 implemented, then current code does not work. This patch updates the code to calculate ChannelCount based on PI value. Cc: Amy Chan Cc: Hong-chihX Hsueh Cc: Jiewen Yao Cc: Sami Mujawar Cc: Ruiyu Ni Cc: Hao Wu Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng --- .../Bus/Pci/SataControllerDxe/SataController.c | 28 ++++++++++++++++++---- .../Bus/Pci/SataControllerDxe/SataController.h | 1 + 2 files changed, 25 insertions(+), 4 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.c b/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.c index 7dc40f82e819..d47e918f5757 100644 --- a/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.c +++ b/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.c @@ -366,6 +366,7 @@ SataControllerStart ( UINT32 Data32; UINTN TotalCount; UINT64 Supports; + UINT8 MaxPortNumber; DEBUG ((EFI_D_INFO, "SataControllerStart start\n")); @@ -472,12 +473,31 @@ SataControllerStart ( Private->DeviceCount = IDE_MAX_DEVICES; } else if (IS_PCI_SATADPA (&PciData)) { // - // Read Host Capability Register(CAP) to get Number of Ports(NPS) and Supports Port Multiplier(SPM) - // NPS is 0's based value indicating the maximum number of ports supported by the HBA silicon. - // A maximum of 32 ports can be supported. A value of '0h', indicating one port, is the minimum requirement. + // Read Ports Implemented(PI) to calculate max port number (0 based). + // + Data32 = AhciReadReg (PciIo, R_AHCI_PI); + DEBUG ((DEBUG_INFO, "Ports Implemented(PI) = 0x%x\n", Data32)); + if (Data32 == 0) { + Status = EFI_UNSUPPORTED; + goto Done; + } + MaxPortNumber = 31; + while (MaxPortNumber > 0) { + if (Data32 & (1 << MaxPortNumber)) { + break; + } + MaxPortNumber--; + } + // + // Make the ChannelCount equal to the max port number (0 based) plus 1. + // + Private->IdeInit.ChannelCount = MaxPortNumber + 1; + + // + // Read HBA Capabilities(CAP) to get Supports Port Multiplier(SPM). // Data32 = AhciReadReg (PciIo, R_AHCI_CAP); - Private->IdeInit.ChannelCount = (UINT8) ((Data32 & B_AHCI_CAP_NPS) + 1); + DEBUG ((DEBUG_INFO, "HBA Capabilities(CAP) = 0x%x\n", Data32)); Private->DeviceCount = AHCI_MAX_DEVICES; if ((Data32 & B_AHCI_CAP_SPM) == B_AHCI_CAP_SPM) { Private->DeviceCount = AHCI_MULTI_MAX_DEVICES; diff --git a/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.h b/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.h index 436eff2dc673..7ffd3e218a61 100644 --- a/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.h +++ b/MdeModulePkg/Bus/Pci/SataControllerDxe/SataController.h @@ -44,6 +44,7 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gSataControllerComponentName2; #define R_AHCI_CAP 0x0 #define B_AHCI_CAP_NPS (BIT4 | BIT3 | BIT2 | BIT1 | BIT0) // Number of Ports #define B_AHCI_CAP_SPM BIT17 // Supports Port Multiplier +#define R_AHCI_PI 0xC /// /// AHCI each channel can have up to 1 device -- 2.7.0.windows.1